CN107293516B - Method for processing wafer - Google Patents
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- CN107293516B CN107293516B CN201710228155.4A CN201710228155A CN107293516B CN 107293516 B CN107293516 B CN 107293516B CN 201710228155 A CN201710228155 A CN 201710228155A CN 107293516 B CN107293516 B CN 107293516B
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 230000004048 modification Effects 0.000 claims abstract description 17
- 238000012986 modification Methods 0.000 claims abstract description 17
- 230000001939 inductive effect Effects 0.000 claims abstract description 7
- 230000001681 protective effect Effects 0.000 claims description 27
- 230000001678 irradiating effect Effects 0.000 claims description 8
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- 230000007547 defect Effects 0.000 abstract description 5
- 238000003672 processing method Methods 0.000 abstract description 5
- 238000013329 compounding Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 122
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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Abstract
Provided is a wafer processing method for preventing defects from occurring at the corners of a device or preventing a notch near the corner from meandering. In the method for processing a wafer, in the 1 st modified layer forming step or the 2 nd modified layer forming step, or in the 1 st modified layer forming step and the 2 nd modified layer forming step, the modified layer (M) formed inside the wafer (W) is formed by compounding at least 1 induced modified layer (Mi) and at least 1 adjusted modified layer (Ma) for each 1 line to be divided, the induced modification layer induces crack growth from the modification layer to the front surface (Wa) of the wafer, the modified layer is used for adjusting the growth of cracks from the modified layer to the front surface of the wafer, it is possible to induce cracks generated from the modified layer to the front surface side of the wafer by inducing the modified layer, furthermore, the growth of the crack reaching the front surface is adjusted by adjusting the modified layer, so that the wafer can be divided into individual devices in a good manner.
Description
Technical Field
The present invention relates to a method for processing a wafer, which divides the wafer into individual devices.
Background
In the above processing, there is a problem that a modified layer is formed inside a wafer and then grinding is performed to chip devices, and the devices singulated during grinding move to make the devices contact each other, thereby causing defects at the corners of the devices. This problem is caused by movement when the device is singulated. Therefore, in order to adjust the timing of singulation in order to adjust the growth of cracks from the modified layer to the front surface, there is a processing method in which laser light for forming the modified layer is irradiated in a dotted line shape to the inside of the wafer (for example, see patent document 1 below).
Patent document 1: japanese patent laid-open publication No. 2014-33163
However, in recent years, silicon wafers or the like having a crystal orientation at an angle of 45 ° with respect to a line to be divided have been frequently used in order to improve electrical characteristics, and when laser light is irradiated into the silicon wafers to form a modified layer in a dotted line shape, a notch is meandering in the vicinity of a corner of a device. This is considered to be because the modified layer is formed in a dotted line shape, and therefore cracks from the modified layer to the front surface cannot grow smoothly along the lines to divide.
Disclosure of Invention
The present invention has been made in view of the above circumstances, and an object thereof is to provide a wafer processing method for preventing chipping at corners of devices or preventing a notch near the corner from meandering in processing of forming a modified layer and then grinding the modified layer to divide the modified layer into individual devices.
The present invention is a method for processing a wafer, in which a wafer having devices formed in a plurality of regions defined by a plurality of first planned dividing lines extending in a predetermined direction and a plurality of second planned dividing lines intersecting the plurality of first planned dividing lines on a front surface thereof is divided along the first planned dividing lines and the second planned dividing lines, the method comprising the steps of: a protective member sticking step of sticking the protective member to the front surface side of the wafer; a 1 st modified layer forming step of holding the protective member side after the protective member attaching step, positioning a converging point of a laser beam having a wavelength that is transparent to the wafer inside the wafer from the back surface side of the wafer, and irradiating the wafer along the 1 st planned dividing line to form a 1 st modified layer inside the wafer along the 1 st planned dividing line; a2 nd modified layer forming step of irradiating the wafer with a laser beam having a wavelength that is transparent to the wafer while locating a converging point of the laser beam inside the wafer from the back surface side of the wafer along the 2 nd planned dividing line, and forming a2 nd modified layer inside the wafer along the 2 nd planned dividing line; and a dividing step of, after the first modified layer forming step and the second modified layer forming step are performed, holding the protective member side, grinding the wafer from the back surface of the wafer by a grinding unit to thin the wafer to a finished thickness, and growing a crack reaching the front surface of the wafer from the modified layer as a starting point along the planned dividing line by a grinding operation to divide the wafer into devices, wherein in the first modified layer forming step or the second modified layer forming step, or in both the first modified layer forming step and the second modified layer forming step, the modified layer is formed by combining at least 1 or more induced modified layers and at least 1 or more adjusted modified layers for each 1 planned dividing line, the induced modified layers inducing the growth of the crack from the modified layer to the front surface of the wafer, the modified layer is used for adjusting the growth of cracks from the modified layer to the front surface of the wafer.
The method is characterized in that the adjustment modified layer has a non-modified layer region separated by a predetermined interval in the wafer by stopping the irradiation of the laser beam at least 1 time on one side of each device with the predetermined interval.
The induced modification layer has a non-modified layer region smaller than the non-modified layer region with a predetermined interval in the wafer interior by stopping the irradiation of the laser beam at least 1 time on one side of each device with a predetermined interval shorter than the non-modified layer region.
The wafer processing method of the present invention comprises: a protective member sticking step of sticking the protective member to the front surface side of the wafer; a 1 st modified layer forming step of forming a 1 st modified layer along a 1 st planned dividing line in the wafer; a2 nd modified layer forming step of forming a2 nd modified layer along the 2 nd planned dividing line in the wafer; a dividing step of growing a crack reaching the front surface of the wafer from the modified layer as a starting point along a planned dividing line by a grinding operation, and dividing the wafer into devices, wherein the modified layer formed inside the wafer is compositely formed by at least 1 or more induced modified layers for inducing the growth of the crack from the modified layer to the front surface of the wafer and at least 1 or more adjusted modified layers for adjusting the growth of the crack from the modified layer to the front surface of the wafer per 1 planned dividing line, in the first modified layer forming step or the second modified layer forming step, or in both the first modified layer forming step and the second modified layer forming step, so that the crack generated from the modified layer is induced to the front surface side of the wafer by the induced modified layers, and the growth of the crack reaching the front surface is adjusted by the adjusted modified layers, therefore, when the wafer is divided into individual devices, defects can be prevented from occurring at the corners of the device chips or the cuts near the corners can be prevented from occurring.
Since the modified layer has the non-modified layer region separated by the predetermined interval in the wafer by stopping the irradiation of the laser beam at least 1 time on one side of each device with the predetermined interval, cracks are not generated from the non-modified layer region at the time of dividing the wafer, and the timing of singulating the devices is adjusted so that adjacent devices do not contact each other, and therefore, chipping at the corners of the devices or meandering of the notch near the corners can be effectively prevented.
By providing a predetermined interval shorter than the unmodified layer region and stopping the irradiation of the laser beam at least 1 time to one side of each device, the induced modified layer has an unmodified layer region smaller than the unmodified layer region with a predetermined interval therebetween in the wafer, and therefore, a crack is not induced from the small unmodified layer region, and the movement of the device can be restricted during the division of the wafer, and chipping at the corner of the device or notch meandering in the vicinity of the corner can be more effectively prevented.
Drawings
Fig. 1 is a perspective view showing a protective member attaching process.
Fig. 2 is a partially enlarged cross-sectional view showing a modified layer forming process.
Fig. 3 is a partially enlarged cross-sectional view showing a state in which 1 or more induced modified layers and 1 or more adjusted modified layers are formed in the wafer through the modified layer forming step.
Fig. 4 is a partially enlarged cross-sectional view illustrating the dividing process.
Fig. 5 (a) is a cross-sectional view showing a state before the expanding step is performed, and fig. 5 (b) is a cross-sectional view showing a state where the intervals between the devices are expanded by the expanding step.
Fig. 6 is a partially enlarged cross-sectional view showing a modified layer forming step 1 according to a modification example.
Fig. 7 is a partially enlarged cross-sectional view showing a modified layer forming step according to modification 2.
Description of the reference symbols
1: a protective member; 2. 3, 4: regions of non-modifying layer; 5: a gap; 6: a height position; 10: a holding table; 11: a holding surface; 20: a laser beam irradiation unit; 21: an oscillator; 22: a condenser; 30: a grinding unit; 31: a main shaft; 32: grinding the grinding wheel; 33: grinding the grinding tool; 40: a chuck table; 41: a holding section; 42: a holding surface; 50: a band expanding unit; 51: a support table; 52: a frame mounting table; 53: a clamping portion; 54: a lifting unit; 54 a: a cylinder; 54 b: a piston; w, W1, W2: a wafer; wa: a front side; wb: a back side; d: a device; s1: a 1 st division predetermined line; s2: a2 nd division predetermined line; m, M1, M2: a modified layer; m 1: 1, modifying layer; m 2: a2 nd modified layer; mi, Mi 2: inducing a modified layer; ma, Ma 2: adjusting the modified layer; h1, H2, H3: at a predetermined interval.
Detailed Description
The wafer W shown in fig. 1 is an example of a workpiece having a circular plate-shaped substrate. On the front side Wa of the wafer W, the devices D are formed in a plurality of regions defined by a plurality of lines to divide 1S 1 and a plurality of lines to divide 2S 2, the plurality of lines to divide 1S 1 extending in, for example, the 1 st direction being a predetermined direction, and the plurality of lines to divide 2S 2 extending in the 2 nd direction intersecting the plurality of lines to divide 1S 1. On the other hand, the surface of the wafer W opposite to the front surface Wa is a ground rear surface Wb. The wafer W is, for example, a silicon wafer having a crystal orientation at an angle of 45 ° to the extending direction of the 1 st line S1 and the 2 nd line S2, and a notch N oriented at 45 ° to the crystal orientation is formed in the outer periphery thereof. Hereinafter, a method of processing a wafer W into individual devices D will be described.
(1) Protective member attaching step
As shown in fig. 1, the protective member 1 is attached to the front side Wa of the wafer W. The protective member 1 is formed to have at least substantially the same diameter as the wafer W. When the entire surface of the front surface Wa of the wafer W is covered with the protective member 1, each device D is protected. The material of the protective member 1 is not particularly limited as long as it has at least adhesiveness. (2) Tape sticking process
As shown in fig. 2, an expandable tape T is stuck to a lower portion of an annular frame F and the tape T is stuck to the entire surface of a protective member 1, wherein the protective member 1 is stuck to a wafer W. Thus, the wafer W is integrated with the frame F in a state where the back surface Wb side is exposed upward.
(3) Modified layer formation step
The modified layer forming step is performed in a first modified layer forming step 1 and a second modified layer forming step 2. In the present embodiment, a case where the 2 nd modified layer forming step is performed after the 1 st modified layer forming step is performed will be described. The 1 st modified layer forming step may be performed after the 2 nd modified layer forming step. (3-1) modified layer formation step 1
After the protective member bonding step and the tape bonding step are performed, the protective member 1 side is held by the rotatable holding table 10, and the modified layer M (1 st modified layer M1) is formed inside the wafer W along the 1 st line to divide S1 by using the laser beam irradiation unit 20 disposed above the holding table 10. The upper surface of the holding table 10 serves as a holding surface 11 for receiving a suction action from a suction source to suction and hold the wafer W. Although not shown, the holding table 10 is connected to a moving unit that relatively moves the holding table 10 and the laser beam irradiation unit 20 in the horizontal direction (X-axis direction and Y-axis direction) perpendicular to the vertical direction (Z-axis direction).
The laser beam irradiation unit 20 includes at least: an oscillator 21 that oscillates a laser beam LB having a wavelength that is transparent to the wafer W; a condenser 22 for condensing the laser beam LB; and an output adjuster for adjusting the output of the laser light. The laser beam irradiation unit 20 is movable in the Z-axis direction, and can adjust the converging position of the laser beam LB by moving the condenser 22 in the Z-axis direction.
When the 1 st modified layer m1 is formed inside the wafer W, the wafer W is placed on the holding surface 11 of the holding table 10 with the tape T facing downward, and the protective member 1 is sucked and held on the holding surface 11 of the holding table 10 by the suction force of the suction source with the back surface Wb of the wafer W facing upward. The laser beam irradiation unit 20 lowers the condenser 22 in the Z-axis direction close to the wafer W, and adjusts the converging point P of the laser beam LB to a desired position. Next, for example, while the holding table 10 is moved in the X-axis direction by the moving means, and the laser beam irradiation unit 20 and the holding table 10 are relatively moved in the direction (X-axis direction) parallel to the back surface Wb of the wafer W, the laser beam LB having a wavelength transparent to the wafer W is irradiated from the back surface Wb side of the wafer W along the 1 st line to be divided S1 in a dotted line shape by the oscillator 21, and the 1 st modified layer 1 is formed inside the wafer W. The laser beam LB is irradiated along all the 1 st planned dividing lines S1 to form the 1 st modified layer m1, and the 1 st modified layer forming step is completed.
(3-2) modified layer Forming step 2
Next, the modified layer M (the 2 nd modified layer M2) is formed inside the wafer W along the 2 nd planned dividing line S2 by using the laser beam irradiation unit 20. Specifically, the wafer W shown in fig. 1 is rotated by 90 ° by rotating the holding table 10, so that the 2 nd line to divide S2 oriented in the 2 nd direction is oriented in the X axis direction, for example. The laser beam irradiation unit 20 lowers the condenser 22 in the Z-axis direction close to the wafer W to adjust the converging point P of the laser beam LB to a desired position. Next, for example, while the holding table 10 is moved in the X-axis direction and the laser beam irradiation unit 20 and the holding table 10 are relatively moved in the direction (X-axis direction) parallel to the back surface Wb of the wafer W, the laser beam LB having a wavelength transparent to the wafer W is irradiated from the back surface Wb side of the wafer W in a broken line shape along the 2 nd planned dividing line S2, and the 2 nd modified layer m2 is formed inside the wafer W. The 2 nd modified layer m2 is formed by irradiating the entire 2 nd line to be divided S2 with the laser beam LB, and the 2 nd modified layer forming step is completed.
The modified layer M (the 1 st modified layer M1 and the 2 nd modified layer M2) is a region in which the intensity and physical properties of the inside of the wafer W are changed by irradiation of the laser beam LB. As shown in the enlarged view of FIG. 2, the modified layer M is formed above the converging point P, and the width t between the upper end and the lower end of the modified layer M is, for example, about 20 to 30 μ M.
Here, in the 1 st modified layer forming step or the 2 nd modified layer forming step, or in the case of performing both the 1 st modified layer forming step and the 2 nd modified layer forming step, as shown in fig. 3, the modified layer M (the 1 st modified layer M1 and the 2 nd modified layer M2) formed inside the wafer W is formed by a composite of at least 1 or more induced modified layers Mi that induce crack growth from the modified layer M to the front surface Wa of the wafer W and at least 1 or more adjusted modified layers Ma that adjust crack growth from the modified layer M to the front surface Wa of the wafer W, for each 1 planned dividing line. The modified layer M in the illustrated example is composed of 1 induced modified layer Mi formed at a position closest to the front surface Wa of the wafer W and two modified layers Ma formed above the induced modified layer Mi.
When the induced modification layer Mi is formed inside the wafer W, the laser beam irradiation unit 20 may irradiate the laser beam LB with the condensing point P of the laser beam LB positioned closer to the front side Wa by shifting the position of the condenser 22, thereby forming the induced modification layer Mi. The number and thickness of the induced modification layers Mi are not particularly limited. Therefore, the number and thickness of the induced modification layers Mi can be set according to the thickness of the wafer W or the like. In the example of fig. 3, the induced modification layer Mi is formed at a position closest to the front side Wa of the wafer W, but is not limited to this position. As shown in this embodiment, the modified layer M may be formed at a height position 6 where it is removed by grinding in a subsequent dividing step.
When the modified layer Ma is formed inside the wafer W, the laser beam irradiation unit 20 shifts the position of the condenser 22 further upward, and irradiates the laser beam LB stepwise with a uniform interval from the front surface Wa side to the back surface Wb side, thereby forming two modified layers Ma. At this time, the laser beam irradiation unit 20 is controlled to stop irradiation of the laser beam LB at least 1 time on one side of each device D shown in fig. 1, with a predetermined interval H1 set. Specifically, the laser beam irradiation unit 20 irradiates the laser beam LB to the region other than the predetermined interval H1 without irradiating the laser beam LB to the portion where the predetermined interval H1 is provided in the 1 st line to divide S1 or the 2 nd line to divide S2, or both the 1 st line to divide S1 and the 2 nd line to divide S2. The modified adjustment layer Ma thus formed has the unmodified layer region 2 spaced apart by the predetermined interval H1 in the wafer W, and the intensity of the portion irradiated with the laser beam LB is reduced. The unmodified region 2 is a region in which the strength of the interior of the wafer W is not reduced and cracks are not generated at the time of subsequent division. The number and thickness of the adjustment modified layer Ma are also not particularly limited.
(4) Dividing step
After the first modified layer forming step 1 and the second modified layer forming step 2 are performed, as shown in fig. 4, the protective member 1 is held on a rotatable chuck table 40, and is thinned to a finished thickness 100 by grinding by a grinding unit 30 from the rear surface Wb of the wafer W, and a crack reaching the front surface Wa of the wafer W from the modified layer M as a starting point is grown along a planned dividing line by the grinding operation, thereby dividing the wafer W into the devices D. The chuck table 40 has a holding portion 41 formed of, for example, a porous member, and an upper surface thereof is a holding surface 42 for sucking and holding the wafer W. The holding surface 42 is connected to a suction source not shown. The grinding unit 30 has: a main shaft 31 having a vertical axis; a grinding wheel 32 mounted on a lower portion of the main shaft 31; and a grinding wheel 33 fixedly attached to a lower portion of the grinding wheel 32 in a ring shape, and the grinding unit 30 is capable of moving up and down as a whole while rotating the grinding wheel 32.
As shown in fig. 4, the chuck table 40 is rotated while the tape T side is held on the chuck table 40 with the back surface Wb of the wafer W directed upward. The grinding unit 30 lowers the grinding wheel 32 at a predetermined grinding feed rate while rotating it in the direction of arrow a, for example, and grinds the back surface Wb of the wafer W by the grinding whetstone 33 while pressing it until the wafer W is thinned to a predetermined finish thickness 100. By this grinding operation, a crack reaching the front side Wa of the wafer W from the modified layer M as a starting point grows along the 1 st line S1 and the 2 nd line S2. That is, when a crack occurs from the position where the modified layer M is formed, the crack is induced toward the front side Wa by the induced modified layer Mi shown in fig. 3. Further, the timing of singulating the device D is adjusted by adjusting the growth of cracks from the modified layer M to the front surface Wa without generating cracks from the non-modified layer region 2 of the modified layer Ma. Therefore, when the wafer W is divided into the individual devices D along with thinning, the adjacent devices D are prevented from being broken by contact.
(5) Extension procedure
After the dividing step is performed, as shown in fig. 5, the pitch of each of the devices D obtained by the division is extended by the band extending unit 50. As shown in fig. 5 (a), the tape expanding unit 50 includes: a support table 51 for supporting the wafer W; a frame mounting table 52 disposed on the outer peripheral side of the support table 51 and mounting the frame F thereon; a clamping portion 53 that clamps the frame F placed on the frame placing table 52; and a lifting unit 54 coupled to a lower portion of the frame stage 52 and lifting and lowering the frame stage 52 in the vertical direction. The elevating unit 54 is composed of a cylinder 54a and a piston 54b driven to elevate by the cylinder 54a, and can elevate the frame mounting table 52 by moving the piston 54b up and down.
When the wafer W is to be expanded, the protective member 1 side is placed on the support table 51, and the frame stage 52 is placed on the frame F. Thereafter, the clamping portion 53 presses the upper portion of the frame F to fix it immovably. Next, as shown in fig. 5 (b), the piston 54b moves downward to lower the frame table 52, and the frame table 52 is lowered relative to the support table 51. Thereby, the tape T and the protective member 1 are radially expanded, and an external force in the radial direction is applied to the wafer W, so that the intervals between the devices D are expanded to form the gaps 5 between the devices D. Then, each device D is picked up by a conveyance unit or the like and conveyed to a desired conveyance position.
As described above, in the wafer processing method of the present invention, in the 1 st modified layer forming step, the 2 nd modified layer forming step, or both the 1 st modified layer forming step and the 2 nd modified layer forming step, the modified layer M formed inside the wafer W is compositely formed by at least 1 or more induced modified layers Mi for inducing the growth of cracks from the modified layer M to the front surface Wa of the wafer W and at least 1 or more adjusted modified layers Ma for adjusting the growth of cracks from the modified layer M to the front surface Wa of the wafer W, so that the cracks generated from the modified layer M are induced to the front surface Wa side of the wafer W by the induced modified layers Mi, and the growth of cracks reaching the front surface Wa is adjusted by the adjusted modified layers Ma, per 1 planned dividing line, therefore, when the wafer W is divided into the devices D, defects can be prevented from occurring at the corners of the device chips or the cuts near the corners can be prevented from occurring. Further, since the modified layer Ma has the non-modified layer region 2 spaced apart by the predetermined interval H1, when the dividing step is performed, the timing of singulating the devices D is adjusted so that the adjacent devices D do not come into contact with each other by the non-modified layer region 2, and hence defects can be effectively prevented from occurring at the corners of the devices D or the cuts near the corners are prevented from meandering.
The modified layer M1 (the 1 st modified layer M1 and the 2 nd modified layer M2) shown in fig. 6 is formed inside the wafer W1 by the 1 st modification of the modified layer forming step. Similarly to the above, by performing the 1 st modified layer forming step and the 2 nd modified layer forming step, the modified layer M1 is composed of the 1 induced modified layer Mi2 formed at the position closest to the front surface Wa of the wafer W1 and the two adjustment modified layers Ma formed above the induced modified layer Mi 2.
When the induced modified layer Mi2 is formed inside the wafer W1, the laser beam irradiation unit 20 is controlled so that the position of the condenser 22 is shifted and the laser beam LB is stopped from being irradiated at least 1 time on one side of each device D while the converging point P of the laser beam LB is positioned closer to the front side Wa, with a predetermined interval H2 being set, where the interval H2 is shorter than the non-modified layer region 2 of the modified layer Ma to be adjusted. Specifically, the laser beam irradiation unit 20 irradiates the laser beam LB to a region other than the predetermined interval H2 without irradiating the laser beam LB to a portion where the predetermined interval H2 is provided in the 1 st line to divide S1 or the 2 nd line to divide S2 or both the 1 st line to divide S1 and the 2 nd line to divide S2 shown in fig. 1. The induced modified layer Mi2 thus formed has an unmodified layer region 3 smaller than the unmodified layer region 2 with a predetermined distance H2 in the wafer W1, and the intensity of the portion irradiated with the laser beam LB is reduced. The unmodified layer region 3 is a region in which no crack is generated at the time of division, like the unmodified layer region 2.
After the modified layer forming step of modification 1 is performed, the process proceeds to the same dividing step as described above, and a crack that reaches the front surface Wa of the wafer W1 from the modified layer M1 is grown along the lines to divide 1S 1 and the lines to divide 2S 2 by the grinding operation. That is, when a crack is generated from the position where the modified layer M1 is formed, the crack is induced toward the front side Wa side by the induced modified layer Mi 2. Further, without generating cracks from the non-modified layer region 2 of the modified layer Ma to be adjusted and the non-modified layer region 3 of the modified layer Mi2 to be induced, the timing of singulating the devices D is adjusted so that adjacent devices D do not contact each other, and the wafer W1 can be divided into the individual devices D. In this way, in modified layer M1, induced modified layer Mi2 has non-modified layer region 3 smaller than non-modified layer region 2 of modified layer Ma to be adjusted, and therefore, even when wafer W1 is divided, cracks are not induced from small non-modified layer region 3 to front surface Wa of wafer W1, and therefore, movement of singulated devices D can be restricted, and chipping at corners of devices D or notch meandering in the vicinity of corners can be more effectively prevented.
The modified layer M2 (the 1 st modified layer M1 and the 2 nd modified layer M2) shown in fig. 7 is formed inside the wafer W2 by the 2 nd modification of the modified layer forming step. Similarly to the above, by performing the 1 st modified layer forming step and the 2 nd modified layer forming step, the modified layer M2 is composed of the 1 induced modified layer Mi2 formed at the position closest to the front surface Wa side of the wafer W2 and the two adjustment modified layers Ma and Ma2 formed above the induced modified layer Mi2 with a predetermined interval. The structures of the induced modified layer Mi2 and the modified layer Ma are the same as those of the above-described modification 1.
When the alignment modified layer Ma2 is formed inside the wafer W2, the laser beam irradiation unit 20 is controlled to stop irradiation of the laser beam LB at least 1 time on one side of each device D by providing a predetermined interval H3, where the interval H3 is longer than the unmodified layer region 3 and shorter than the unmodified layer region 2. Specifically, the laser beam irradiation unit 20 irradiates the laser beam LB to a region other than the predetermined interval H2 without irradiating the laser beam LB to a portion where the predetermined interval H3 is provided in the 1 st line to divide S1 or the 2 nd line to divide S2 or both the 1 st line to divide S1 and the 2 nd line to divide S2 shown in fig. 1. Adjustment modified layer Ma2 has unmodified layer region 4 larger than unmodified layer region 3 and smaller than unmodified layer region 2 with predetermined interval H3 in wafer W2, and the intensity of the portion irradiated with laser beam LB is reduced.
After the modified layer forming step of modification 2 is performed, the process proceeds to the same dividing step as described above, and a crack that reaches the front surface Wa of the wafer W2 from the modified layer M2 is grown along the 1 st line to divide S1 and the 2 nd line to divide S2 by the grinding operation. That is, when a crack is generated from the position where the modified layer M2 is formed, the crack is induced toward the front side Wa side by the induced modified layer Mi 2. Further, since the timing of singulating the devices D is adjusted without generating cracks from the non-modified layer regions 2, 3, and 4, the wafer W2 can be divided into the individual devices D. In this way, since the modified layer M2 is configured such that the regions not irradiated with the laser beam LB are gradually reduced in the order of the non-modified layer regions 2,4, and 3 from the back surface Wb to the front surface Wa of the wafer W2, movement of the singulated devices D can be restricted, and missing or missing portions at the corners of the devices D can be prevented from meandering.
Examples of the laser irradiation conditions used in the modified layer forming step shown in the present embodiment include a light source, a wavelength, an output, a feed speed of the holding table 10, and a width of a predetermined interval H1 to H3 where the laser beam LB is not irradiated. The predetermined intervals H1 to H3 set for each line to be divided may not be constant intervals. Since the central portion of the wafer W is less likely to move than the outer peripheral portion and an undivided region is likely to occur, the width of the predetermined interval H1 to H3 may be set to be narrow in the central portion region, for example. Examples of the grinding conditions used in the dividing step include the type of grinding wheel 33, the grinding feed speed, and the rotation speed of the chuck table 40. The laser irradiation conditions and the grinding conditions may be appropriately combined and adjusted according to the thickness, material, and the like of the wafer W.
Claims (2)
1. A method for processing a wafer, wherein a wafer having devices formed in a plurality of regions defined by a plurality of first planned dividing lines extending in a predetermined direction and a plurality of second planned dividing lines intersecting the plurality of first planned dividing lines on a front surface thereof is divided along the first planned dividing lines and the second planned dividing lines, the method comprising the steps of:
a protective member sticking step of sticking the protective member to the front surface side of the wafer;
a 1 st modified layer forming step of holding the protective member side after the protective member attaching step, positioning a converging point of a laser beam having a wavelength that is transparent to the wafer inside the wafer from the back surface side of the wafer, and irradiating the wafer along the 1 st planned dividing line to form a 1 st modified layer inside the wafer along the 1 st planned dividing line;
a2 nd modified layer forming step of irradiating the wafer with a laser beam having a wavelength that is transparent to the wafer while locating a converging point of the laser beam inside the wafer from the back surface side of the wafer along the 2 nd planned dividing line, and forming a2 nd modified layer inside the wafer along the 2 nd planned dividing line; and
a dividing step of holding the protective member side after the 1 st modified layer forming step and the 2 nd modified layer forming step, grinding the wafer from the back surface thereof by a grinding unit to thin the wafer to a finished thickness, and growing a crack reaching the front surface of the wafer from the modified layer as a starting point along the planned dividing line by the grinding operation to divide the wafer into individual devices,
in the 1 st modified layer forming step, the 2 nd modified layer forming step, or both the 1 st modified layer forming step and the 2 nd modified layer forming step,
the modified layer is compositely formed by at least 1 induced modified layer for inducing the growth of cracks from the modified layer to the front surface of the wafer and at least 1 adjusted modified layer for adjusting the growth of cracks from the modified layer to the front surface of the wafer, the induced modified layer is formed on the front surface side of the wafer, the adjusted modified layer is formed on the back surface side of the wafer relative to the induced modified layer, for each 1 predetermined dividing line,
the adjustment modified layer has non-modified layer regions (2,4) separated by a predetermined interval (H1, H3) in the wafer by stopping the irradiation of the laser beam at least 1 time to one side of each device with a predetermined interval (H1, H3),
setting a predetermined interval (H2) shorter than the unmodified layer regions (2,4) and stopping the irradiation of the laser beam at least 1 time on one side of each device, whereby the induced modification layer has an unmodified layer region (3) separated by the predetermined interval (H2) and smaller than the unmodified layer regions (2,4) of the adjusted modification layer in the interior of the wafer,
the regions of the modifying layer and the modifying-inducing layer which are not modified are gradually reduced from the back surface to the front surface of the wafer.
2. The method of processing a wafer according to claim 1,
the predetermined interval at the time of forming the modified layer is adjusted and the predetermined interval at the time of forming the induced modified layer is set to be smaller at the central portion of the wafer than at the peripheral portion.
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| JP7105058B2 (en) * | 2017-12-05 | 2022-07-22 | 株式会社ディスコ | Wafer processing method |
| JP7058320B2 (en) * | 2018-03-14 | 2022-04-21 | 東京エレクトロン株式会社 | Board processing system, board processing method and computer storage medium |
| US10388526B1 (en) * | 2018-04-20 | 2019-08-20 | Semiconductor Components Industries, Llc | Semiconductor wafer thinning systems and related methods |
| US11450578B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system and substrate processing method |
| US11450523B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system with eccentricity detection device and substrate processing method |
| JP7081993B2 (en) * | 2018-06-19 | 2022-06-07 | 株式会社ディスコ | Processing method of work piece |
| JP7088768B2 (en) * | 2018-07-24 | 2022-06-21 | 株式会社ディスコ | Wafer division method |
| JP7118804B2 (en) * | 2018-08-17 | 2022-08-16 | キオクシア株式会社 | Semiconductor device manufacturing method |
| WO2020129734A1 (en) | 2018-12-21 | 2020-06-25 | 東京エレクトロン株式会社 | Substrate processing apparatus and substrate processing method |
| WO2020129732A1 (en) | 2018-12-21 | 2020-06-25 | 東京エレクトロン株式会社 | Substrate processing device and substrate processing method |
| JP7233816B2 (en) | 2019-02-19 | 2023-03-07 | 株式会社ディスコ | Wafer processing method |
| CN113518686B (en) | 2019-03-28 | 2023-05-26 | 东京毅力科创株式会社 | Processing apparatus and processing method |
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| JP2010003817A (en) * | 2008-06-19 | 2010-01-07 | Tokyo Seimitsu Co Ltd | Laser dicing method, and laser dicing device |
| CN102481666A (en) * | 2009-08-21 | 2012-05-30 | 浜松光子学株式会社 | Laser machining method and chip |
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| KR102250209B1 (en) | 2021-05-07 |
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