CN107290588A - A kind of system of high-precision multithreading measurement frequency - Google Patents

Abstract

The invention discloses a kind of system of high-precision multithreading measurement frequency, the system includes the functional module of frequency meter, ARM functional module and FPGA, the functional module of the ARM mainly includes the FSMC EBIs that C language is realized, burning control driving, ADC drivings, DAC drivings, PMU drivings, GPIB drivings, CAN drivings, simulation SPI drivings；The functional module that the FPGA is realized mainly includes FSMC measurements interface, high speed I/O module, frequency measuring block, the SPI slave unit interface that Verilog is realized；The interconnection of the FPGA and ARM are connected using FSMC buses, i.e. FSMC EBIs and FSMC test interfaces by FSMC buses.

Description

A kind of system of high-precision multithreading measurement frequency

Technical field

The invention belongs to the technical field of frequency measurement, more particularly to a kind of system of parallel measurement channelized frequencies.

Background technology

The characteristic of mechanical periodicity is converted into electric signal by frequency measurement generally by corresponding sensor, then by electronics Frequency meter shows corresponding frequency, such as power frequency, audio frequency, vibration frequency.In addition, also using Doppler effect principle, Measurement to audio frequency.

The implementation method of our measurement frequencies, is typically entered using oscillograph, logic analyser or MCU timers at present OK, there is the deficiency of following several aspects in these measuring methods：First：Oscilloscope measurement frequency is not intelligent enough, and carries not side Just, second：Logic analyser, although have multichannel, but precision is not enough, and measurement data is manually recorded, the 3rd：MCU timings Device module testing different frequency coverage error is larger.

As patent application 201610674205.7 discloses a kind of multi channel signals frequency measurement mould based on on-chip system Block, the on-chip system is SoC chip or system level chip, and the frequency measuring block is conducive to by its high integration in very little Area on realize the accurate measurement of multi channel signals frequency, can also be cooperated, led to remote terminal by the TCP of extension The touch display screen curtain for crossing extension carries out man-machine interaction, it is characterised in that including on-chip system master controller, the on-chip system Master controller connects power module, touch-control module and peripheral interface respectively, and the on-chip system master controller includes main control list Member and the Auxiliary Control Element interconnected respectively with main control unit and FPGA module, the FPGA module connect frequency measurement module, institute Main control unit connection communication module is stated, the frequency measurement module has measured signal interface, and the communication module remote terminal connects Mouthful, the touch-control module has touch display screen interface.

And these measuring methods, its measurement accuracy will reduce with the decline of measured signal frequency, there is larger in practicality Limitation, and the need for parallel measurement channelized frequencies can not be met.

The content of the invention

Based on this, therefore the present invention primary mesh be to provide a kind of system of high-precision multithreading measurement frequency, this is Equal precision frequency meter of the system based on FPGA, and by being combined with ARM, by ARM calls frequency measurement outlet come reading frequency, energy Enough frequencies for effectively and accurately measuring multithreading.

It is to provide a kind of system of high-precision multithreading measurement frequency, system satisfaction pair another mesh of the present invention Frequency measurement accuracy demand (0.1Hz~1MHz+/- (0.01%), the data of 32 passages can be measured simultaneously.

To achieve the above object, the technical scheme is that：

A kind of system of high-precision multithreading measurement frequency, the system includes frequency meter, ARM functional module and FPGA Functional module, the functional module of the ARM mainly includes the FSMC EBIs that C language is realized, burning control driving (pro- Driver), ADC drivings, DAC drivings, PMU drivings, GPIB drivings, CAN drivings, simulation SPI drivings；The work(that the FPGA is realized Energy module mainly measures interface, high speed I/O module, frequency measuring block, SPI slave units including the FSMC that Verilog is realized and connect Mouthful；The interconnection of the FPGA and ARM are connected using FSMC buses, i.e. FSMC EBIs and FSMC test interfaces by FSMC buses Connect.

The frequency meter is using Ext_counter and the counter of Ref_Counter two 32 within the identical time Count, Ext_counter uses outside survey signal of matching somebody with somebody as clock, and Ref_Counter uses internal system time clock, is patrolled by gate Collect the time point that control counts beginning and end.

Further, the Ext_counter and Ref_Counter are two 32 high-speed counters, and benchmark is caught respectively The counting number of clock and the counting number of clock to be measured, and the Ext_counter is connected to Diff triggers, Diff is one Trigger, coordinate gate control logic (gate control logic) be used for control count at the beginning of between and the end time, Ref_ Counter parts are an accurately 10M clocks inside FPGA, and main function is to provide a reference clock source compared.

Further, the frequency meter has multichannel, to measure the frequency satisfied the need, so as to reach that parallel measurement multichannel is inputted The purpose of signal frequency.

The present invention uses said system, based on FPGA combination equal precision frequency meters, and by being combined with ARM, is adjusted by ARM With frequency measuring block come reading frequency, the frequency of multithreading can be effectively and accurately measured.With reference to essences such as frequency measurement function uses Degree measurement, ensures that measurement accuracy 5ppm, more than 1KHz signal measurement time 1ms, 1KHz signals below are surveyed to 0.05Hz~25MHz The amount time is 1~2 signal period.Meet to the demand of frequency measurement accuracy (0.1Hz~1MHz+/- (0.01%)).Can be same When measure the data of 32 passages.

Brief description of the drawings

Fig. 1 is the system architecture diagram that the present invention is implemented.

Fig. 2 is the frequency meter logic diagram that the present invention is implemented.

Fig. 3 is the structure chart that the present invention implements FSMC EBIs.

Fig. 4 is the structure chart that the present invention implements high speed I/O module.

Fig. 5 by the present invention implementation FPGA frequency measuring block structure chart.

Embodiment

In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and It is not used in the restriction present invention.

It is the system software architecture diagram that the present invention is realized shown in Fig. 1.Wherein the light-colored part of inframe is C code in ARM On realize functional module, dark parts are that Verilog code realizes functional module on FPGA/CPLD, and the part of outer frame is real Border hardware circuit module, the actual hardware circuit module is prior art, be will not be repeated here.

System mainly include C language realize FSMC EBIs, burning control driving (pro-driver), ADC driving, DAC drivings, PMU drivings, GPIB drivings, CAN drivings, simulation SPI drivings, this is the functional module for belonging to ARM；Verilog FSMC test interfaces, high speed I/O module, frequency measuring block, the SPI slave unit interface of realization, these are the functions that FPGA is realized Module.

It is frequency meter logic diagram shown in Fig. 2, shown in figure, frequency meter uses equal precision measurement method, uses two 32 Counter in the inside counting of identical time, Ext_counter uses outside with signal is surveyed as clock, and Ref_Counter makes With internal system time clock, controlled to count the time point of beginning and end by gate control logic.

Ext_counte and Ref_Counter are two 32 high-speed counters in Fig. 2, and the meter of reference clock is caught respectively The counting number of several numbers and clock to be measured, Diff is a trigger, coordinates gate control logic (gate control logic) For between controlling at the beginning of counting and the end time, Ref_Counter parts are an accurately 10M clocks inside FPGA, Main function is to provide a reference clock source compared, so as in identical time T, if reference clock counts number is Nref, the counting number of I/O port to be measured is Nx, according to T=Nx/fin=Nref/fref, so that when following equalities

The frequency fin=Nx*fref/ of input signal can be calculated.

By above equation, the extremely low signal frequency arrived higher than reference frequency can be accurately measured.This structure it is optimal Effect is to replicate, because FPGA signal can exactly have structure as multichannel with parallel processing, last effect To measure the frequency satisfied the need, so as to reach the purpose of parallel measurement multichannel frequency input signal.

Wherein：

Fin is the frequency of input signal；

Nx is Ext_counter count values；

Fref is the frequency of input signal；

Nref is Ref_counter count values.

During measurement, by ARM calls frequency measuring block come reading frequency, the frequency of multithreading can be accurately read.

Structure shown in Figure 3 for FSMC EBIs.FSMC EBIs possess 10 bit address buses, 16 data Bus, sampling clock 200MHz, design traffic rate ＞ 40MB/s.

The Pin description of corresponding frequency test module is：

Pin name	Reference clock		IO	Pin description
					clk_25m	-		I	External oscillator clock is inputted
bus_addr_sfr_o[9:0]	clk_200m		I	Bus address is inputted
					iodata[15:0]	clk_200m		IO	Bus data
wrn_i	clk_200m		I	Bus write signal
					rdn_i	clk_200m		I	Bus read signal
pe_dvr_en	clk_200m		O	Electronic pins output enables control
					pe_data_o	clk_200m		O	Electronic pins data output

Structure shown in Figure 4 for high speed I/O module.High speed I/O module includes 4 ioports modules, 32 High-speed I/Os Passage, I/O interface speed is more than 20MHz.Its Pin description is：

Pin name	Reference clock	IO	Pin description
				rst_n	-	I	Reset signal is inputted
bus_sfr_clk	clk_200m	I	Data/address bus clock
				bus_addr_sfr_i[9:0]	clk_200m	IO	Bus address is inputted
bus_data_sfr_i[7:0]	clk_200m	I	Bus data
				bus_wr_sfr_i	clk_200m	I	Bus read write signal
port_in	clk_200m	I	I/O signal is inputted
				bus_data_sfr_o[7:0]	clk_200m	O	Register data output bus
port_out	clk_200m	O	I/O data is exported
				port_en	clk_200m	O	IO outputs are enabled

The structure of frequency measuring block shown in Figure 5 for FPGA, its Pin description is：

Pin name	Reference clock	IO	Pin description
				rst_n	-	I	Reset signal is inputted
bus_sfr_clk	clk_200m	I	Data/address bus clock
				bus_addr_sfr_i[9:0]	clk_200m	IO	Bus address is inputted
bus_data_sfr_i[7:0]	clk_200m	I	Bus data is inputted
				bus_data_sfr_o[7:0]	clk_200m	O	Bus data is exported
bus_wr_sfr_i	clk_200m	I	Bus read write signal
				clk_200m	clk_200m	I	Reference frequency signal is inputted
ext_clk_m[31:0]	clk_200m	O	External frequency signals are inputted

In a word, the present invention is based on FPGA combination equal precision frequency meters, and by being combined with ARM, calls frequency to survey by ARM Amount module carrys out reading frequency, can effectively and accurately measure the frequency of multithreading.Equal precision measurement is used with reference to frequency measurement function, it is right 0.05Hz~25MHz ensures that measurement accuracy 5ppm, more than 1KHz signal measurement time 1ms, 1KHz signals below time of measuring is 1 ~2 signal periods.Meet to the demand of frequency measurement accuracy (0.1Hz~1MHz+/- (0.01%)).32 can be measured simultaneously to lead to The data in road.

The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention Any modifications, equivalent substitutions and improvements made within refreshing and principle etc., should be included in the scope of the protection.

Claims (4)

1. a kind of system of high-precision multithreading measurement frequency, the system includes frequency meter, ARM functional module and FPGA Functional module, the functional module of the ARM mainly includes the FSMC EBIs that C language is realized, burning control driving, ADC drive Dynamic, DAC drivings, PMU drivings, GPIB drivings, CAN drivings, simulation SPI drivings；The functional module that the FPGA is realized mainly is wrapped Include FSMC measurements interface, high speed I/O module, frequency measuring block, the SPI slave unit interface of Verilog realizations；The FPGA with ARM interconnection is connected using FSMC buses, i.e. FSMC EBIs and FSMC test interfaces by FSMC buses.

2. the system of high accuracy multithreading measurement frequency as claimed in claim 1, it is characterised in that the frequency meter is used Ext_counter and the counter of Ref_Counter two 32 are in the inside counting of identical time, and Ext_counter uses outer Portion is with signal is surveyed as clock, and Ref_Counter uses internal system time clock, is controlled to count beginning and end by gate control logic Time point.

3. the system of high accuracy multithreading measurement frequency as claimed in claim 2, it is characterised in that the Ext_counter and Ref_Counter is two 32 high-speed counters, and the counting number of reference clock and the counting of clock to be measured are caught respectively Number, and the Ext_counter is connected to Diff triggers, Diff is a trigger, coordinates gate control logic to be used for controlling to count At the beginning of between and the end time, Ref_Counter part be that accurately a 10M clock compares there is provided one inside FPGA Reference clock source.

4. the system of high accuracy multithreading measurement frequency as claimed in claim 2, it is characterised in that the frequency meter has many Road, to measure the frequency satisfied the need.