CN107275391A - Composite terminal structure and preparation method for SiC semiconductor power device - Google Patents
Composite terminal structure and preparation method for SiC semiconductor power device Download PDFInfo
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- CN107275391A CN107275391A CN201710551757.3A CN201710551757A CN107275391A CN 107275391 A CN107275391 A CN 107275391A CN 201710551757 A CN201710551757 A CN 201710551757A CN 107275391 A CN107275391 A CN 107275391A
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- 239000002131 composite material Substances 0.000 title claims abstract description 58
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 238000002360 preparation method Methods 0.000 title claims abstract description 26
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 7
- 238000002161 passivation Methods 0.000 claims description 7
- 239000011241 protective layer Substances 0.000 claims description 5
- 238000002347 injection Methods 0.000 abstract description 10
- 239000007924 injection Substances 0.000 abstract description 10
- 238000009792 diffusion process Methods 0.000 abstract description 7
- 238000005468 ion implantation Methods 0.000 abstract description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 39
- 150000002500 ions Chemical class 0.000 description 32
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 230000000903 blocking effect Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 238000003763 carbonization Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000000137 annealing Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- XEMZLVDIUVCKGL-UHFFFAOYSA-N hydrogen peroxide;sulfuric acid Chemical compound OO.OS(O)(=O)=O XEMZLVDIUVCKGL-UHFFFAOYSA-N 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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Abstract
It is a kind of for composite terminal structure of SiC semiconductor power device and preparation method thereof, in the case where not changing terminal area, improve the tolerance to terminal ion implantation concentration error；The influence of injection ion diffusion couple device terminal is farthest avoided, and reduces device terminal area, device yield is improved.The composite terminal structure includes：First knot terminal extends；Second knot terminal extends；Field limiting ring；First overlapping region of the intersection formation that the first knot terminal extension and second knot terminal extend；And the second overlapping region of the intersection formation of the field limiting ring and second knot terminal extension.
Description
Technical field
The present invention relates to SiC semiconductor power device preparation field, it is used for high pressure carbon SiClx half more particularly to one kind
The composite terminal structure and preparation method of conductor power device.
Background technology
Carborundum is as a kind of emerging third generation semi-conducting material, with excellent physically and electrically characteristic.In charging
The fields such as device, track traffic, intelligent grid, green energy resource have a wide range of applications.
Because the size of semiconductor devices is limited, cause asking for device breakdown to alleviate device edge electric field concentration
Topic, it will usually be provided for the junction termination structures of protection device at power device knot edge.Common terminal structure mainly has field
Plate, field limiting ring, knot terminal extension (JTE) etc., these terminal structures are widely used in classes of semiconductors power device.
For common silicon carbide power device, blocking voltage requirement can be met using only single terminal structure.So
And to the higher device of uniformity and reliability requirement, it is necessary to bigger terminal area and multiple photoetching, the technique of ion implanting
Process, is limited to the yield issues that material cost and terminal structure are brought, and the silicon carbide power device of single terminal end structure is cured
Aobvious inferior position：The terminal of high pressure carbonization silicon device takes that chip area is excessive, and technique number of times is more, yields and repeatable type compared with
It is low；Carborundum single terminal end may be because injection ion occurs to spread in annealing and terminal capabilities is declined to a great extent.
The content of the invention
In view of the above-mentioned problems, it is an object of the present invention to provide a kind of for the compound of SiC semiconductor power device
Terminal structure and preparation method.Using as far as possible few photoetching number of times and ion implanting number of times, formation area occupied is smaller, yields
High and the high SiC semiconductor power device of repeatability composite terminal structure.
The composite terminal structure can carborundum JBS diode components, PIN diode device, MOSFET element and
Realized in the devices such as IGBT device, but be not limited to this several power device.
The present invention provides a kind of composite terminal structure for SiC semiconductor power device, it is characterised in that including：
First knot terminal extends；Second knot terminal extends；Field limiting ring；What the first knot terminal extension and second knot terminal extended
First overlapping region of intersection formation；And the intersection formation of the field limiting ring and second knot terminal extension
Second overlapping region.
According to the composite terminal structure for SiC semiconductor power device of the present invention, wherein, first knot is whole
Hold the width of extension shorter than the width that second knot terminal extends, the second knot described in the depth ratio of the first knot terminal extension
The depth of termination extension is deep.
According to the present invention the composite terminal structure for SiC semiconductor power device, wherein, the field limiting ring and
First knot terminal extension is formed simultaneously, the field limiting ring and first knot terminal extension have identical doping concentration and
Depth.
According to the composite terminal structure for SiC semiconductor power device of the present invention, wherein, described first overlaps
The width in region is identical with the width that first knot terminal extends, and the doping concentration of first overlapping region is equal to described the
One knot terminal extends the doping concentration sum extended with second knot terminal；The width of second overlapping region and the field
The width for limiting ring is identical, and the doping concentration of second overlapping region is equal to second knot terminal and extended and the field limiting ring
Doping concentration sum.
According to the composite terminal structure for SiC semiconductor power device of the present invention, wherein, the composite terminal
Structure and main knot are formed on epitaxial wafer, and the composite terminal structure is joined directly together with the main knot, have phase with the main knot
Same doping type.
According to the composite terminal structure for SiC semiconductor power device of the present invention, wherein, first knot is whole
The depth of end extension and the field limiting ring is more than the depth of the main knot, and the depth of the second knot terminal extension is less than the master
The depth of knot.
The present invention also provides a kind of preparation method of the composite terminal structure for SiC semiconductor power device, and it is special
Levy and be, comprise the following steps：Deposit protective layer；First time terminal ion implanting；Second of terminal ion implanting；Aoxidize and sink
Product passivation layer.
According to the preparation method of the composite terminal structure for SiC semiconductor power device of the present invention, wherein, lead to
First time terminal ion implanting is crossed, while forming the extension of the first knot terminal and field limiting ring, the field limiting ring is whole with first knot
End extension has identical doping concentration and depth.
According to the preparation method of the composite terminal structure for SiC semiconductor power device of the present invention, wherein, lead to
Second of terminal ion implanting is crossed, the extension of the second knot terminal is formed, the width of the first knot terminal extension is than second knot
The width of termination extension is short, and the depth of the second knot terminal extension is deep described in the depth ratio of the first knot terminal extension.
According to the preparation method of the composite terminal structure for SiC semiconductor power device of the present invention, wherein, lead to
First time terminal ion implanting is crossed, the extension of the second knot terminal is formed.
According to the preparation method of the composite terminal structure for SiC semiconductor power device of the present invention, wherein, lead to
Second of terminal ion implanting is crossed, while forming the extension of the first knot terminal and field limiting ring, the field limiting ring is whole with first knot
End extension has identical doping concentration and depth, what the width that first knot terminal extends extended than second knot terminal
Width is short, and the depth of the second knot terminal extension is deep described in the depth ratio of the first knot terminal extension.
According to the preparation method of the composite terminal structure for SiC semiconductor power device of the present invention, wherein, institute
The intersection for stating the extension of the first knot terminal and second knot terminal extension is formed as the first overlapping region, and described first overlaps
The width in region is identical with the width that first knot terminal extends, and the doping concentration of first overlapping region is equal to described the
One knot terminal extends the doping concentration sum extended with second knot terminal, and the field limiting ring extends with second knot terminal
Intersection be formed as the second overlapping region, the width of second overlapping region is identical with the width of the field limiting ring, institute
The doping concentration for stating the second overlapping region is equal to second knot terminal extension and the doping concentration sum of the field limiting ring.
According to composite terminal structure provided by the present invention for SiC semiconductor power device and preparation method thereof, production
Following beneficial technique effect is given birth to：In the case where not changing terminal area, improve to terminal ion implantation concentration error
Tolerance；The influence of injection ion diffusion couple device terminal is farthest avoided, and reduces device terminal area,
Improve device yield.Using as far as possible few photoetching number of times and ion implanting number of times, the carbonization suitable for more than 600V is formed
The composite terminal structure of Si power device.The composite terminal structure is applied to high pressure carbonization Si power device, such as carborundum Xiao Te
The devices such as based diode, silicon carbide MOSFET, carborundum PiN diodes, carborundum IGBT.
Brief description of the drawings
Below with reference to the accompanying drawings it is described in conjunction with the embodiments the present invention.In the accompanying drawings：
Fig. 1 illustrates the composite terminal structure for high pressure carbonization Si power device of the embodiment of the present invention；
Fig. 2 (a) illustrates the terminal structure of conventional double JTE structures；
Fig. 2 (b) illustrates conventional double JTE structures when applying in 10kV magnitude SiC IGBT devices, ideally device
Relation between part blocking voltage and doping concentration；
Fig. 2 (c) illustrates conventional double JTE structures and applied in 10kV magnitude SiC IGBT devices, if there is injection ion
Diffusion, the relation between blocking voltage and doping concentration；
The composite terminal structure that Fig. 3 (a) illustrates the embodiment of the present invention is applied in 10kV magnitude SiC IGBT devices, device
Relation between the blocking voltage and doping concentration of part；
The composite terminal structure that Fig. 3 (b) illustrates the embodiment of the present invention is applied in 10kV magnitude SiC IGBT devices, resistance
During disconnected 12kV voltages, the electric-field intensity distribution of device terminal bottom；
Fig. 4 is the preparation flow figure of the composite terminal structure of the embodiment of the present invention.
Fig. 5 illustrates the processing step of the preparation flow of the composite terminal structure of the embodiment of the present invention；
Fig. 6 illustrates the processing step of the preparation flow of the composite terminal structure of the embodiment of the present invention.
Embodiment
To further illustrate the technology contents of the present invention, with reference to embodiments and accompanying drawing is described in detail.
Fig. 1 illustrates the composite terminal structure for high pressure carbonization Si power device of the embodiment of the present invention.Such as Fig. 1 institutes
Show, it is same that composite terminal structure extends 103 including the first knot terminal the 103, second knot terminal of extension extension 104, with the first knot terminal
When some field limiting rings 105, the first overlapping region 106 and the second overlapping region 107 that are formed.
Composite terminal structure and main knot 102 are formed on epitaxial wafer 101, the composite terminal structure and the direct phase of main knot 102
Even, there is identical doping type with main knot 102.Main knot 102 can be the p-type injection region of JBS diodes, the P of PIN diode
Type injection region or MOSFET and IGBT well region.
Reference picture 1, the first knot terminal extension 103 is adjacent with main knot 102 to be formed, and the second knot terminal extends 104 and is formed at the
One knot terminal extension 103 and the outside of field limiting ring 105.Wherein, the first knot terminal extension 103 width is shorter and depth compared with
Deep, the width of the second knot terminal extension 104 is longer and depth is shallower.The knot terminal of field limiting ring 105 and first extension 103 is while shape
Into on epitaxial wafer 101, therefore the knot terminal of field limiting ring 105 and first extension 103 has identical doping concentration and depth.First
The depth of knot terminal extension 103 and field limiting ring 105 is more than the depth of main knot 102.
The intersection of the extension 103 of first knot terminal and the second knot terminal extension 104 is the first overlapping region 106, first
The width that the width of overlapping region 106 and the first knot terminal extend 103 is identical, and the doping concentration of the first overlapping region 106 is about etc.
In the doping concentration sum of the extension 103 of the first knot terminal and the second knot terminal extension 104.The knot terminal of field limiting ring 105 and second expands
The intersection of exhibition 104 is the second overlapping region 107, and the width of the second overlapping region 107 is identical with the width of field limiting ring 105,
The doping concentration of second overlapping region 107 is approximately equal to the second knot terminal extension 104 and the doping concentration sum of field limiting ring 105.It is multiple
Close the passivation layer 108 for thermal oxide and PECVD formation above terminal structure.
The effect of field limiting ring 105 is for the increase ion implantation doping concentration in the case where not increasing composite terminal area
Tolerance.The ring width of field limiting ring 105 is 3 μm, and the distance that first ring to the first knot terminal extends 103 is 3 μm, second
The distance of ring to first ring is 4 μm, and the distance of the 3rd ring to second ring is 5 μm, by that analogy, but number, the chi of ring
Very little and spacing is not limited.
The device of correspondence 600V voltage class, the width of the first knot terminal extension 103 is about 60 μm, correspondence 20kV voltages etc.
The device of level, the width of the first knot terminal extension 103 is about 250 μm.
The Implantation Energy of second knot terminal extension 104 is less than main knot 102, therefore its depth is less than main knot 102.Correspondence is different
The device of voltage class, the width of the second knot terminal extension 104 is also different.The device of correspondence 600V voltage class, the second knot is whole
The width of end extension 104 is about 60 μm, the device of correspondence 20kV voltage class, and the width of the second knot terminal extension 104 is about 400
μm。
The composite terminal structure of the present invention is contrasted with existing terminal structure below, to illustrate that the present invention's is compound
Technique effect achieved by terminal structure.
Fig. 2 (a) illustrates conventional double JTE terminal structures.As shown in Fig. 2 (a), conventional double JTE terminal structures parts
203, second knot terminal extension 204 is extended by the first adjacent knot terminal and passivation layer 205 is constituted.Fig. 2 (b) illustrates routine
Double JTE terminal structures are applied in carborundum 10kV magnitude P-channel IGBT, the different JTE doping of correspondence, the blocking electricity of device
Pressure；Fig. 2 (c) is illustrated after there is the diffusion of injection ion, the different JTE doping of correspondence, the blocking voltage of device.
Shown according to Fig. 2 (b) He Fig. 2 (c) result it is recognized that while ideally, conventional double JTE terminal structures energy
Effective terminalization is enough played, but injection ion occurs after diffusion, and the effect of conventional double JTE terminal structures declines to a great extent,
The actual blocking voltage of device is caused to be difficult to meet design requirement.
Fig. 3 (a) is illustrated after the composite terminal structure using the present invention, the different JTE doping of correspondence, the blocking electricity of device
Pressure.In the composite terminal structure of the present invention, because the extension of the first knot terminal and the extension of the second knot terminal are overlapped, because
This diffusion couple device performance of injection ion in SiC material has little to no effect, while the structure causes composite terminal to adulterate
The tolerance of concentration improves.
Fig. 3 (b) is illustrated when device blocks 12kV voltages, the electric-field intensity of composite terminal bottom.Can be with from Fig. 3 (b)
Find out, additional field limiting ring serves the effect of the fringe field of reduction the first knot terminal extension, increases the expansion of the first knot terminal
The feasible doping scope of exhibition.
It was found from contrast more than, the composite terminal structure suitable for high pressure carbonization Si power device that the present invention is designed,
In the case where not changing terminal area, the tolerance to terminal ion implantation concentration error is improved；Farthest keep away
Exempt from the influence of injection ion diffusion couple device terminal, and reduced the terminal area of device, improve the yields of device.
Consider in terms of device performance, process costs, yields, below with 10kV magnitude carborundum P-channels
Realized in IGBT device exemplified by composite terminal structure, be described with reference to the accompanying drawings the preparation method of composite terminal structure.Fig. 4 is this
The preparation flow figure of the composite terminal structure of inventive embodiments.
As shown in figure 4, first, in step S401, depositing protective layer.Fig. 5 and Fig. 6 illustrate the compound of the embodiment of the present invention
The processing step of the preparation flow of terminal structure.Reference picture 5, before deposition protective layer, first prepares work using the IGBT of standard
Skill forms main knot 102 on epitaxial wafer 101.Because embodiment is P-channel IGBT device, main knot 102 is the IGBT traps of n-type doping
Area, depth is 0.6um, and knot is doped to 1E18cm-3.Then, layer of silicon dioxide protective layer is deposited using PECVD in surface of SiC,
Thickness is 100nm.The effect of this layer of silicon dioxide layer of protection is to avoid forming low-doped high resistant after ion implanting in surface of SiC
Area, while protecting SiC material surface during ion implanting.
Then, in step S402, first time terminal ion implanting is implemented.By first time terminal ion implanting, the is formed
One knot terminal extension 103 and field limiting ring 105.
Specifically, after wafer surface gluing, baking, photoetching is carried out using first terminal reticle.Evaporated after development
Thickness is 300nm Ni and peels off the mask as ion implanting.
Then first time terminal ion implanting is carried out using high energy implanters, box shaped distribution of adulterating.Pass through first
The first knot terminal of secondary terminal ion implanting formation extension 103 and field limiting ring 105, the width of the first knot terminal extension 103 is 130 μ
M, depth be 0.65 μm, doping concentration about based on the concentration of knot 102 1/15.First knot terminal extension in the present embodiment 103
Doping concentration is 7E16cm-3；Field limiting ring 5 by three ring groups into the width of, ring be 3 μm, between ring at intervals of 3 μm, 4 μm, 5 μ
M, the doping concentration and depth of field limiting ring 5 is identical with the extension 103 of the first knot terminal.
Then, in step S403, second of terminal ion implanting is implemented.By second of terminal ion implanting, the is formed
Two knot terminals extension 104.
Specifically, complete after step S402, use HNO3, HCl 3:1 mixed liquor, concentrated sulfuric acid hydrogen peroxide 3:1 mixed liquor
And BOE solution, the metal and silica of SiC material remained on surface in removal step S401, deposit again after cleaning chip
100nm silica.
As shown in figure 5, after wafer surface gluing, baking, photoetching is carried out using second terminal reticle.Evaporated after development
Thickness is 300nm Ni and peels off the mask as ion implanting.Then second of terminal is carried out using high energy implanters
Ion implanting, box shaped distribution of adulterating.By second of terminal ion implanting the second knot terminal of formation extension 104, the second knot is whole
The width of end extension 104 is 200 μm, depth is 0.4 μm, doping concentration about based on tie the 1/8 of concentration.In the present embodiment, mix
Miscellaneous concentration is 1.2E17cm-3。
The intersection of the extension 103 of first knot terminal and the second knot terminal extension 104 is formed as the first overlapping region 106,
The width of first overlapping region 106 is identical with the width that the first knot terminal extends 103, the doping concentration of the first overlapping region 106
It is approximately equal to the doping concentration sum of the extension 103 of the first knot terminal and the second knot terminal extension 104.The knot of field limiting ring 105 and second is whole
The intersection of end extension 104 is formed as the second overlapping region 107, the width of the second overlapping region 107 and the width of field limiting ring 105
Degree is identical, and the doping concentration of the second overlapping region 107 is approximately equal to the second knot terminal extension 104 and the doping concentration of field limiting ring 105
Sum.
Then, in step S404, aoxidize and deposit passivation layer.
Specifically, complete after step S403, reuse HNO3、HCl 3:1 mixed liquor, concentrated sulfuric acid hydrogen peroxide 3:1 mixes
Close the metal and silica of SiC material remained on surface in liquid and BOE solution removal steps S402.
Then whole surface of SiC is placed in oxidation furnace at 1250 DEG C and carries out dry-oxygen oxidation, and carried out at 950 DEG C wet
Oxygen is aoxidized, and Ar in-situ annealings and NO annealing are carried out afterwards.So in device surface formation about 50nm oxide layer.In follow-up grid
During oxide layer etching, gate electrode etching and Ohmic contact preparation etc., the whole quilts of this layer of oxide layer on terminal area
Carefully retain, the SiO until depositing about 1.2 μm in surface PECVD2Passivation layer and etch form passivation layer 108.
Embodiment above is described by first time terminal ion implanting the first knot terminal of formation extension 103 and field limiting ring
105th, by second of terminal ion implanting the second knot terminal of formation extension 104, still, the two steps can also exchange suitable
Sequence, i.e., noted by first time terminal ion implanting the second knot terminal of formation extension 104, by second of terminal ion
Enter to be formed the first knot terminal extension 103 and field limiting ring 105.
Describe the preferred embodiments of the present invention above, but the spirit and scope of the present invention be not limited to it is disclosed herein
Particular content.Those skilled in the art can make more embodiments and application, these realities according to the teachings of the present invention
Mode and application are applied all in the spirit and scope of the present invention.The spirit and scope of the present invention are not limited by specific embodiment
It is fixed, and be defined by the claims.
Claims (12)
1. a kind of composite terminal structure for SiC semiconductor power device, it is characterised in that including：
First knot terminal extends；
Second knot terminal extends；
Field limiting ring；
First overlapping region of the intersection formation that the first knot terminal extension and second knot terminal extend；And
Second overlapping region of the intersection formation of the field limiting ring and second knot terminal extension.
2. the composite terminal structure according to claim 1 for SiC semiconductor power device, wherein,
The width of the first knot terminal extension is shorter than the width that second knot terminal extends, the first knot terminal extension
The depth that second knot terminal described in depth ratio extends is deep.
3. the composite terminal structure according to claim 1 for SiC semiconductor power device, wherein,
The field limiting ring extends with first knot terminal to be formed simultaneously, and the field limiting ring has with first knot terminal extension
Identical doping concentration and depth.
4. the composite terminal structure according to claim 1 for SiC semiconductor power device, wherein,
The width of first overlapping region is identical with the width that first knot terminal extends, and first overlapping region is mixed
Miscellaneous concentration is equal to first knot terminal and extends the doping concentration sum extended with second knot terminal；Described second overlaps area
The width in domain is identical with the width of the field limiting ring, and the doping concentration of second overlapping region expands equal to second knot terminal
Exhibition and the doping concentration sum of the field limiting ring.
5. the composite terminal structure according to claim 1 for SiC semiconductor power device, wherein,
The composite terminal structure and main knot are formed on epitaxial wafer, and the composite terminal structure is joined directly together with the main knot,
There is identical doping type with the main knot.
6. the composite terminal structure according to claim 5 for SiC semiconductor power device, wherein,
The depth of the first knot terminal extension and the field limiting ring is more than the depth of the main knot, the second knot terminal extension
Depth be less than the main knot depth.
7. a kind of preparation method of composite terminal structure for SiC semiconductor power device, it is characterised in that including with
Lower step：
Deposit protective layer；
First time terminal ion implanting；
Second of terminal ion implanting；
Aoxidize and deposit passivation layer.
8. the preparation method of the composite terminal structure according to claim 7 for SiC semiconductor power device, its
In,
By first time terminal ion implanting, while form the extension of the first knot terminal and field limiting ring, the field limiting ring and described the
The extension of one knot terminal has identical doping concentration and depth.
9. the preparation method of the composite terminal structure according to claim 8 for SiC semiconductor power device, its
In,
By second of terminal ion implanting, the extension of the second knot terminal is formed, the width of the first knot terminal extension is than described
The width of second knot terminal extension is short, and the depth of the second knot terminal extension is deep described in the depth ratio of the first knot terminal extension.
10. the preparation method of the composite terminal structure according to claim 7 for SiC semiconductor power device, its
In,
By first time terminal ion implanting, the extension of the second knot terminal is formed.
11. the preparation method of the composite terminal structure according to claim 10 for SiC semiconductor power device,
Wherein,
By second of terminal ion implanting, while form the extension of the first knot terminal and field limiting ring, the field limiting ring and described the
The extension of one knot terminal has identical doping concentration and depth, and the width of the first knot terminal extension is than second knot terminal
The width of extension is short, and the depth of the second knot terminal extension is deep described in the depth ratio of the first knot terminal extension.
12. the preparation side of the composite terminal structure for SiC semiconductor power device according to claim 9 or 11
Method, wherein,
The intersection that first knot terminal extension extends with second knot terminal is formed as the first overlapping region, and described the
The width of one overlapping region is identical with the width that first knot terminal extends, and the doping concentration of first overlapping region is equal to
The doping concentration sum that the first knot terminal extension extends with second knot terminal, the field limiting ring is whole with second knot
The intersection of end extension is formed as the second overlapping region, the width of second overlapping region and the width phase of the field limiting ring
Together, the doping concentration of second overlapping region be equal to second knot terminal extend with the doping concentration of the field limiting ring it
With.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2958452A1 (en) * | 2010-03-30 | 2011-10-07 | Alstom Transport Sa | Semiconductor device i.e. high voltage power component, has rings arranged adjacent to surface of substrate, where cumulative dose of impurities in rings is lower than or equal to cumulative dose of impurities in epitaxial layer |
| CN102479807A (en) * | 2010-11-26 | 2012-05-30 | 三菱电机株式会社 | Silicon carbide semiconductor device and manufacturing method therefor |
| CN105304688A (en) * | 2015-11-04 | 2016-02-03 | 中国工程物理研究院电子工程研究所 | Junction termination structure for silicon carbide power device and fabrication method |
| CN106098751A (en) * | 2016-07-14 | 2016-11-09 | 电子科技大学 | A kind of power semiconductor terminal structure |
| WO2016194216A1 (en) * | 2015-06-05 | 2016-12-08 | 株式会社日立製作所 | Semiconductor device, method for manufacturing same, and power module |
| CN106252385A (en) * | 2015-06-05 | 2016-12-21 | 黄智方 | Semiconductor structure |
| CN207009439U (en) * | 2017-07-07 | 2018-02-13 | 泰科天润半导体科技（北京）有限公司 | Composite terminal structure for SiC semiconductor power device |
-
2017
- 2017-07-07 CN CN201710551757.3A patent/CN107275391B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2958452A1 (en) * | 2010-03-30 | 2011-10-07 | Alstom Transport Sa | Semiconductor device i.e. high voltage power component, has rings arranged adjacent to surface of substrate, where cumulative dose of impurities in rings is lower than or equal to cumulative dose of impurities in epitaxial layer |
| CN102479807A (en) * | 2010-11-26 | 2012-05-30 | 三菱电机株式会社 | Silicon carbide semiconductor device and manufacturing method therefor |
| WO2016194216A1 (en) * | 2015-06-05 | 2016-12-08 | 株式会社日立製作所 | Semiconductor device, method for manufacturing same, and power module |
| CN106252385A (en) * | 2015-06-05 | 2016-12-21 | 黄智方 | Semiconductor structure |
| CN105304688A (en) * | 2015-11-04 | 2016-02-03 | 中国工程物理研究院电子工程研究所 | Junction termination structure for silicon carbide power device and fabrication method |
| CN106098751A (en) * | 2016-07-14 | 2016-11-09 | 电子科技大学 | A kind of power semiconductor terminal structure |
| CN207009439U (en) * | 2017-07-07 | 2018-02-13 | 泰科天润半导体科技（北京）有限公司 | Composite terminal structure for SiC semiconductor power device |
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