CN107256883B - A kind of two-way TVS diode of two-way and preparation method thereof - Google Patents
A kind of two-way TVS diode of two-way and preparation method thereof Download PDFInfo
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- CN107256883B CN107256883B CN201710315387.3A CN201710315387A CN107256883B CN 107256883 B CN107256883 B CN 107256883B CN 201710315387 A CN201710315387 A CN 201710315387A CN 107256883 B CN107256883 B CN 107256883B
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 61
- 238000002161 passivation Methods 0.000 claims abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 42
- 238000004519 manufacturing process Methods 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 30
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 29
- 238000002513 implantation Methods 0.000 claims description 25
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 24
- 239000000377 silicon dioxide Substances 0.000 claims description 19
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 18
- 235000012239 silicon dioxide Nutrition 0.000 claims description 18
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 17
- 229910052796 boron Inorganic materials 0.000 claims description 17
- 150000002500 ions Chemical class 0.000 claims description 17
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 9
- 229910052698 phosphorus Inorganic materials 0.000 claims description 9
- 239000011574 phosphorus Substances 0.000 claims description 9
- 238000001039 wet etching Methods 0.000 claims description 8
- 230000008020 evaporation Effects 0.000 claims description 6
- 238000001704 evaporation Methods 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- 238000004026 adhesive bonding Methods 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000005260 corrosion Methods 0.000 claims description 5
- 230000007797 corrosion Effects 0.000 claims description 5
- 238000011161 development Methods 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 claims description 5
- -1 aluminium copper silicon Chemical group 0.000 claims description 4
- 239000003153 chemical reaction reagent Substances 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 239000007788 liquid Substances 0.000 claims description 4
- 238000004806 packaging method and process Methods 0.000 claims description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 4
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 239000004408 titanium dioxide Substances 0.000 claims 1
- 238000002955 isolation Methods 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 description 6
- 241000790917 Dioxys <bee> Species 0.000 description 3
- 229910003978 SiClx Inorganic materials 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- KYWXBCABTMUGFC-UHFFFAOYSA-N [F-].[NH4+].[Si]=O Chemical compound [F-].[NH4+].[Si]=O KYWXBCABTMUGFC-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
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- 230000015556 catabolic process Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
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- 235000009566 rice Nutrition 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0646—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
Abstract
The invention discloses two-way TVS diodes of a kind of two-way and preparation method thereof.It include: back electrode, N+ substrate, P- epitaxial layer, two p-wells being set side by side in P- epitaxial layer, N-type isolated area positioned at p-well two sides, P-doped zone in each p-well, N-doped zone in each P-doped zone, positioned at the oxide layer of P- epi-layer surface, the position that each N-doped zone is corresponded in oxide layer is equipped with contact hole, two front electrodes are electrically connected by respective contact hole with corresponding N-doped zone, positioned at front electrode and the passivation layer of oxide layer.Two TVS diodes are made of n-type doping region, P-doped zone domain, p-well and N+ substrate respectively, and the structure of distinctive NPN makes TVS diode have the function of bi-directional symmetrical.It is distinguished between two TVS by N-type isolation, and also has N-type isolation at the edge of device, this is preferably minimized the electric leakage of electric leakage and device edge in device before two diodes.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of two-way TVS diode of two-way and preparation method thereof.
Background technique
With the development of semiconductor technology, sub-micro has become the prevailing technology of integrated circuit processing.But
Various interface sections can always have various unexpected surges and electrostatic, for the reliability for ensuring integrated circuit, with bis- pole TVS
Protection class device based on pipe is widely applied to sensitive generated at the port of surge.TVS diode is parallel to and is protected
The front end of circuit.Under normal condition, TVS is in high impedance, can regard open circuit as in perfect condition.When extraneous one transient state of input suddenly
High pressure, TVS utilize the avalanche breakdown effects of PN junction at once, impedance are reduced, and the surge that high pressure generates is shunted by TVS diode.
The voltage at the both ends TVS is clamped down on to below maximum clamp voltage simultaneously.After surge disappears, TVS is restored to previous high resistant again
Anti- state.
TVS diode is very widely used, and mobile phone, tablet computer, liquid crystal display, camera, set-top box have its
Figure.The upper engineer of tradition application can on the port for the surge being also easy to produce a TVS diode all in parallel, so if
If the port I/O is more, cost is not talked, and resource on too many pcb board is also occupied.
Summary of the invention
The technical problems to be solved by the present invention are: how a kind of two-way TVS diode of two-way and preparation method thereof is provided,
The present invention utilizes the two-way TVS diode of Integration Concept design, and a device can protect two-way I/O interface.
The present invention is achieved by the following technical programs:
A kind of production method of the two-way TVS diode of two-way, comprising the following steps:
(1) N+ substrate is provided；
(2) silicon dioxide layer and silicon nitride layer are successively grown respectively in the tow sides of the N+ substrate；
(3) the positive silicon dioxide layer and silicon nitride layer for removing the N+ substrate, retain the two of the N+ substrate back
Silicon oxide layer and silicon nitride layer are as back sealing；
(4) in the one P- epitaxial layer of front growth of N+ substrate, then wet etching removes the dioxy of the N+ substrate back
SiClx layer and silicon nitride layer；
(5) it carries out boron doping in the P-epitaxial layer using exposure mask and forms two p-wells being set side by side；
(6) N-type isolated area is formed by phosphorus doping between P- epitaxial layer both sides of the edge and two p-wells；
(7) P-doped zone is formed by boron ion implantation in each p-well；
(8) N-doped zone is formed by ion implanting phosphorus in each P-doped zone；
(9) oxide layer is formed on the P- epitaxial layer, the position that each N-doped zone is corresponded in oxide layer, which is formed, to be connect
Contact hole, in each contact hole and oxidation layer surface deposits to form front electrode；
(10) passivation layer is formed on front electrode surface, forms the hole as rear end packaging and routing in the passivation layer；
(11) the N+ substrate is thinned, then prepares rear electrode at the back side of the N+ substrate, it is two-way to complete two-way
The production of TVS diode.
Preferably, N+ substrate described in the step (1) is<111>crystal orientation, As, resistivity 0.007 are mixed
Ohm.cm, 675 microns of thickness.
Preferably, in the step (2), the silicon dioxide layer with a thickness of 1-3 microns, the thickness of the silicon nitride layer
Degree is 1-3 microns, and in the step (3), the positive silicon nitride layer of the N+ substrate is removed first with plasma etching,
Then the positive silicon dioxide layer of the N+ substrate is removed using the mix reagent of hydrofluoric acid and ammonium fluoride.
Preferably, in the step (4), the P- epitaxial layer with a thickness of 3-6 microns, the resistance of the P- epitaxial layer
Rate is 50-150 Ohm.cm, protects the P- epitaxial layer using photoresist, the etching liquid of wet etching is hydrofluoric acid.
Preferably, the step (5) specifically comprises the processes of: the oxide layer of 700 nanometers of growth, then gluing, photoetching, aobvious
Shadow, corrosion, in region openings appropriate, the ion implanting boron element in being open, implantation dosage is 4E14/cm2, Implantation Energy
For 70KeV.
Preferably, the step (5) specifically comprises the processes of: form exposure mask, then gluing, photoetching, development, corrosion, In
Region windowing appropriate, the ion implanting boron element in window, implantation dosage are 4E14/cm2, Implantation Energy 70KeV,
The step (6) specifically comprises the processes of: form exposure mask in region windowing appropriate and the N+ substrate is then put into 1000
DEG C boiler tube, be passed through PoCL3 gas and be doped, outside P- Yanzhong formed N-doped zone, connect with N-type substrate, form N
Type isolated area.
Preferably, the step (7) specifically comprises the processes of: exposure mask is formed, in the Production Zones Suitable windowing of the p-well,
And ion implanting boron element, implantation dosage are 4E14/cm2, Implantation Energy 160KeV, formation P-doped zone；The step
(8) specifically comprises the processes of: exposure mask is formed, in the Production Zones Suitable windowing of the P-doped zone, and ion implanting P elements, note
Entering dosage is 3E15/cm2, Implantation Energy 45KeV, formation N-doped zone.
Preferably, the step (9) specifically comprises the processes of: oxide layer is silicon dioxide layer, oxide layer with a thickness of
200-500 nanometers, front electrode be aluminium copper silicon electrode, front electrode with a thickness of 1-4 microns.
Preferably, the step (10) specifically comprises the processes of: in 1-3 microns of thick PSG (phosphorus of front electrode surface deposition
Silica glass) and 1-3 microns of thick Si3N4As passivation layer.
Preferably, the step (11) specifically comprises the processes of: the N+ substrate thinning passes through evaporation to 250 microns
Technique production back gold, forms rear electrode.
The back gold can be metallic element evaporation and be made, it is preferred to use gold element evaporation is made.
The invention also provides a kind of two-way TVS diode of two-way, the two-way TVS diode of two-way is according to above-mentioned two-way
Prepared by the production method of two-way TVS diode.
Two TVS diodes of the invention are respectively by the n-type doping region of region, P-doped zone domain, p-well and N
+ substrate and constitute, the structure of distinctive NPN, so that TVS diode is had the function of bi-directional symmetrical.By N-type between two TVS
Isolation distinguishes, and also has N-type isolation at the edge of device, this makes electric leakage and device in device before two diodes
The electric leakage at edge is preferably minimized, and two two-way TVS diodes are integrated in a chips by the present invention using integrated thinking,
One device can protect the port two-way I/O, and the area occupied on pcb board is greatly saved, has saved cost.
Detailed description of the invention
Fig. 1-11 is the flow chart of the production method of the two-way TVS diode of two-way of the invention.
Specific embodiment
As shown in figs. 1-11, the production method of the two-way TVS diode of a kind of two-way, comprising the following steps:
(1) N+ substrate is provided, as shown in Figure 1, the N+ substrate is<111>crystal orientation, mixes As, resistivity 0.007
Ohm.cm, 675 microns of thickness；
(2) silicon dioxide layer and silicon nitride layer are successively grown respectively in the tow sides of the N+ substrate, as shown in Fig. 2,
The silicon dioxide layer with a thickness of 1-3 microns, the silicon nitride layer with a thickness of 1-3 microns；
(3) the positive silicon dioxide layer and silicon nitride layer for removing the N+ substrate, retain the two of the N+ substrate back
Silicon oxide layer and silicon nitride layer are as back sealing, as shown in figure 3, specifically, removing the N+ first with plasma etching
Then the positive silicon nitride layer of substrate removes positive the two of the N+ substrate using the mix reagent of hydrofluoric acid and ammonium fluoride
Silicon oxide layer；
(4) in the one P- epitaxial layer of front growth of N+ substrate, then wet etching removes the dioxy of the N+ substrate back
SiClx layer and silicon nitride layer, as shown in figure 4, the P- epitaxial layer with a thickness of 3-6 microns, the resistivity of the P- epitaxial layer is
50-150 Ohm.cm protects the P- epitaxial layer using photoresist, and the etching liquid of wet etching is hydrofluoric acid；
(5) it carries out boron doping in the P-epitaxial layer using exposure mask and forms two p-wells being set side by side, as shown in figure 5,
Its specifically comprises the processes of: the oxide layer of 700 nanometers of growth, then gluing, photoetching, development, corrosion, in region openings appropriate, In
Ion implanting boron element in being open, implantation dosage are 4E14/cm2, Implantation Energy 70KeV；
(6) N-type isolated area is formed by phosphorus doping between P- epitaxial layer both sides of the edge and two p-wells,
As shown in fig. 6, its specifically comprises the processes of: exposure mask is formed in region windowing appropriate, and the N+ substrate is then put into 1000 DEG C
Boiler tube, be passed through PoCL3 gas and be doped, outside P- Yanzhong formed N-doped zone, connect with N-type substrate, form N-type
Isolated area；
(7) P-doped zone is formed by boron ion implantation in each p-well, as shown in fig. 7, its specifically comprises the processes of: it is formed
Exposure mask, in the Production Zones Suitable windowing of the p-well, and ion implanting boron element, implantation dosage are 4E14/cm2, Implantation Energy
For 160KeV, P-doped zone is formed；
(8) N-doped zone is formed by ion implanting phosphorus in each P-doped zone, as shown in figure 8, its concrete technology
Are as follows: form exposure mask, in the Production Zones Suitable windowing of the P-doped zone, and ion implanting P elements, implantation dosage be 3E15/
cm2, Implantation Energy 45KeV, formation N-doped zone；
(9) oxide layer is formed on the P- epitaxial layer, the position that each N-doped zone is corresponded in oxide layer, which is formed, to be connect
Contact hole, in each contact hole and oxidation layer surface deposits to form front electrode, as shown in figure 9, its specifically comprises the processes of: oxidation
Layer is silicon dioxide layer, oxide layer with a thickness of 200-500 nanometer, front electrode is aluminium copper silicon electrode, the thickness of front electrode
It is 1-4 microns；
(10) passivation layer is formed on front electrode surface, forms the hole as rear end packaging and routing in the passivation layer, such as schemes
Shown in 10, specifically comprises the processes of: in the thick PSG (phosphorosilicate glass) of 1-3 microns of front electrode surface deposition and 1-3 microns of thickness
Si3N4As passivation layer；
(11) the N+ substrate is thinned, then prepares rear electrode at the back side of the N+ substrate, as shown in figure 11, tool
Body technology are as follows: the N+ substrate thinning, by the technique production back gold of evaporation, forms rear electrode, to 250 microns to complete two
The production of the two-way TVS diode in road.
The invention also provides a kind of two-way TVS diodes of two-way, as shown in figure 11, the two-way TVS diode of two-way
According to prepared by the production method of the two-way TVS diode of above-mentioned two-way.
Embodiment 1
As shown in figs. 1-11, the production method of the two-way TVS diode of a kind of two-way, comprising the following steps:
(1) N+ substrate is provided, as shown in Figure 1, the N+ substrate is<111>crystal orientation, mixes As, resistivity 0.007
Ohm.cm, 675 microns of thickness；
(2) silicon dioxide layer and silicon nitride layer are successively grown respectively in the tow sides of the N+ substrate, as shown in Fig. 2,
The silicon dioxide layer with a thickness of 1 micron, the silicon nitride layer with a thickness of 1 micron；
(3) the positive silicon dioxide layer and silicon nitride layer for removing the N+ substrate, retain the two of the N+ substrate back
Silicon oxide layer and silicon nitride layer are as back sealing, as shown in figure 3, specifically, removing the N+ first with plasma etching
Then the positive silicon nitride layer of substrate removes positive the two of the N+ substrate using the mix reagent of hydrofluoric acid and ammonium fluoride
Silicon oxide layer；
(4) in the one P- epitaxial layer of front growth of N+ substrate, then wet etching removes the dioxy of the N+ substrate back
SiClx layer and silicon nitride layer, as shown in figure 4, the P- epitaxial layer with a thickness of 6 microns, the resistivity of the P- epitaxial layer is
100 Ohm.cm protect the P- epitaxial layer using photoresist, and the etching liquid of wet etching is hydrofluoric acid, i.e., will be carried on the back with hydrofluoric acid
The SiO in face2And Si3N4All drift is gone；
(5) it carries out boron doping in the P-epitaxial layer using exposure mask and forms two p-wells being set side by side, as shown in figure 5,
Its specifically comprises the processes of: the oxide layer of 700 nanometers of growth, then gluing, photoetching, development, corrosion, in region openings appropriate, In
Ion implanting boron element in being open, implantation dosage are 4E14/cm2, Implantation Energy 70KeV；
(6) N-type isolated area is formed by phosphorus doping between P- epitaxial layer both sides of the edge and two p-wells,
As shown in fig. 6, its specifically comprises the processes of: exposure mask is formed in region windowing appropriate, and the N+ substrate is then put into 1000 DEG C
Boiler tube, be passed through PoCL3 gas and be doped, outside P- Yanzhong formed N-doped zone, connect with N-type substrate, form N-type
Isolated area；
(7) P-doped zone is formed by boron ion implantation in each p-well, as shown in fig. 7, its specifically comprises the processes of: it is formed
Exposure mask, in the Production Zones Suitable windowing of the p-well, and ion implanting boron element, implantation dosage are 4E14/cm2, Implantation Energy
For 160KeV, P-doped zone is formed；
(8) N-doped zone is formed by ion implanting phosphorus in each P-doped zone, as shown in figure 8, its concrete technology
Are as follows: form exposure mask, in the Production Zones Suitable windowing of the P-doped zone, and ion implanting P elements, implantation dosage be 3E15/
cm2, Implantation Energy 45KeV, formation N-doped zone；
(9) oxide layer is formed on the P- epitaxial layer, the position that each N-doped zone is corresponded in oxide layer, which is formed, to be connect
Contact hole, in each contact hole and oxidation layer surface deposits to form front electrode, as shown in figure 9, its specifically comprises the processes of: oxidation
Layer is silicon dioxide layer, oxide layer with a thickness of 300 nanometers, front electrode is aluminium copper silicon electrode, front electrode it is micro- with a thickness of 2
Rice；
(10) passivation layer is formed on front electrode surface, forms the hole as rear end packaging and routing in the passivation layer, such as schemes
Shown in 10, specifically comprises the processes of: in 1 micron of thick PSG (phosphorosilicate glass) of front electrode surface deposition and 1 micron of thick Si3N4Come
As passivation layer；
(11) the N+ substrate is thinned, then prepares rear electrode at the back side of the N+ substrate, as shown in figure 11, tool
Body technology are as follows: the N+ substrate thinning, by the technique production back gold of evaporation, forms rear electrode, to 250 microns to complete two
The production of the two-way TVS diode in road.
The invention also provides a kind of two-way TVS diodes of two-way, as shown in figure 11, the two-way TVS diode of two-way
According to prepared by the production method of the two-way TVS diode of above-mentioned two-way.
The above is a preferred embodiment of the present invention, it is noted that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (8)
1. a kind of production method of the two-way TVS diode of two-way, which comprises the following steps:
(1) N+ substrate is provided；
(2) silicon dioxide layer and silicon nitride layer are successively grown respectively in the tow sides of the N+ substrate；
(3) the positive silicon dioxide layer and silicon nitride layer for removing the N+ substrate, retain the titanium dioxide of the N+ substrate back
Silicon layer and silicon nitride layer are as back sealing；
(4) in the one P- epitaxial layer of front growth of N+ substrate, then wet etching removes the silica of the N+ substrate back
Layer and silicon nitride layer；
(5) it carries out boron doping in the P-epitaxial layer using exposure mask and forms two p-wells being set side by side；The step (5)
Specifically comprises the processes of: the oxide layer of 700 nanometers of growth, then gluing, photoetching, development, corrosion are being opened in region openings appropriate
Ion implanting boron element in mouthful, implantation dosage 4E14/cm2, Implantation Energy 70KeV；
(6) N-type isolated area is formed by phosphorus doping between P- epitaxial layer both sides of the edge and described two p-wells；
(7) P-doped zone is formed by boron ion implantation in each p-well；
(8) N-doped zone is formed by ion implanting phosphorus in each P-doped zone, the junction depth of N-doped zone is mixed less than p-type
Miscellaneous area, thus to obtain the structure for the NPN being made of n-type doping region, P-doped zone domain, p-well and N+ substrate；Wherein, p-well
It is deep into N+ substrate interior；
(9) oxide layer is formed on the P- epitaxial layer, the position that each N-doped zone is corresponded in oxide layer forms contact
Hole, in each contact hole and oxidation layer surface deposits to form front electrode；
(10) passivation layer is formed on front electrode surface, forms the hole as rear end packaging and routing in the passivation layer；
(11) the N+ substrate is thinned, then rear electrode is prepared at the back side of the N+ substrate, to complete the two-way TVS bis- of two-way
The production of pole pipe.
2. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (1)
In, the N+ substrate is<111>crystal orientation, mix As, resistivity 0.007Ohm.cm, 675 microns of thickness.
3. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (2)
In, the silicon dioxide layer with a thickness of 1-3 microns, the silicon nitride layer with a thickness of 1-3 microns, it is first in the step (3)
The positive silicon nitride layer of the N+ substrate is removed first with plasma etching, then utilizes the mixing of hydrofluoric acid and ammonium fluoride
Reagent removes the positive silicon dioxide layer of the N+ substrate.
4. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (4)
In, the P- epitaxial layer with a thickness of 3-6 microns, the resistivity of the P- epitaxial layer is 50-150Ohm.cm, utilizes photoresist
The P- epitaxial layer is protected, the etching liquid of wet etching is hydrofluoric acid.
5. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (6)
Specifically comprises the processes of: it forms exposure mask and then the N+ substrate is put into 1000 DEG C of boiler tube, be passed through in region windowing appropriate
PoCl3Gas is doped, and Yanzhong forms N-doped zone outside P-, is connect with N+ substrate, is formd N-type isolated area.
6. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (7)
Specifically comprises the processes of: exposure mask is formed, in the Production Zones Suitable windowing of the p-well, and ion implanting boron element, implantation dosage are
4E14/cm2, Implantation Energy 160KeV, formation P-doped zone；The step (8) specifically comprises the processes of: exposure mask is formed, in institute
State the Production Zones Suitable windowing of P-doped zone, and ion implanting P elements, implantation dosage 3E15/cm2, Implantation Energy is
45KeV forms N-doped zone.
7. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (9)
Specifically comprises the processes of: oxide layer is silicon dioxide layer, oxide layer with a thickness of 200-500 nanometers, front electrode is aluminium copper silicon electrode,
Front electrode with a thickness of 1-4 microns.
8. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (10)
Specifically comprises the processes of: in front electrode surface deposition 1-3 microns of thick PSG and 1-3 microns of thick Si3N4As passivation layer, institute
State step (11) specifically comprises the processes of: the N+ substrate thinning, by the technique production back gold of evaporation, forms back to 250 microns
Face electrode.
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| CN106384710A (en) * | 2016-09-30 | 2017-02-08 | 上海华虹宏力半导体制造有限公司 | Method for preventing external diffusion of substrate impurities |
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| CN106384710A (en) * | 2016-09-30 | 2017-02-08 | 上海华虹宏力半导体制造有限公司 | Method for preventing external diffusion of substrate impurities |
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