CN107195649A - Back-illuminated cmos image sensors and its manufacture method - Google Patents
Back-illuminated cmos image sensors and its manufacture method Download PDFInfo
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- CN107195649A CN107195649A CN201710419611.3A CN201710419611A CN107195649A CN 107195649 A CN107195649 A CN 107195649A CN 201710419611 A CN201710419611 A CN 201710419611A CN 107195649 A CN107195649 A CN 107195649A
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- 238000000034 method Methods 0.000 title claims abstract description 45
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 229910052751 metal Inorganic materials 0.000 claims abstract description 123
- 239000002184 metal Substances 0.000 claims abstract description 123
- 238000002955 isolation Methods 0.000 claims abstract description 107
- 239000010410 layer Substances 0.000 claims description 156
- 239000007769 metal material Substances 0.000 claims description 67
- 239000003989 dielectric material Substances 0.000 claims description 27
- 239000000463 material Substances 0.000 claims description 18
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical group [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 3
- 238000003384 imaging method Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052735 hafnium Inorganic materials 0.000 description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 3
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 3
- 230000000007 visual effect Effects 0.000 description 3
- 229910052726 zirconium Inorganic materials 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- VKJLWXGJGDEGSO-UHFFFAOYSA-N barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[Ti+4].[Ba+2] VKJLWXGJGDEGSO-UHFFFAOYSA-N 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- INIGCWGJTZDVRY-UHFFFAOYSA-N hafnium zirconium Chemical compound [Zr].[Hf] INIGCWGJTZDVRY-UHFFFAOYSA-N 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- KJXBRHIPHIVJCS-UHFFFAOYSA-N oxo(oxoalumanyloxy)lanthanum Chemical compound O=[Al]O[La]=O KJXBRHIPHIVJCS-UHFFFAOYSA-N 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910001928 zirconium oxide Inorganic materials 0.000 description 2
- 229910015801 BaSrTiO Inorganic materials 0.000 description 1
- 229910004129 HfSiO Inorganic materials 0.000 description 1
- 229910020654 PbScTaO Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 229910006501 ZrSiO Inorganic materials 0.000 description 1
- OLBVUFHMDRJKTK-UHFFFAOYSA-N [N].[O] Chemical compound [N].[O] OLBVUFHMDRJKTK-UHFFFAOYSA-N 0.000 description 1
- UQERHEJYDKMZJQ-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].O.[Sc+3].[Ta+5] Chemical compound [O-2].[O-2].[O-2].[O-2].O.[Sc+3].[Ta+5] UQERHEJYDKMZJQ-UHFFFAOYSA-N 0.000 description 1
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 description 1
- RFBRDHGMLHXGOB-UHFFFAOYSA-N [Si].[Zr].[Hf] Chemical compound [Si].[Zr].[Hf] RFBRDHGMLHXGOB-UHFFFAOYSA-N 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- KQHQLIAOAVMAOW-UHFFFAOYSA-N hafnium(4+) oxygen(2-) zirconium(4+) Chemical compound [O--].[O--].[O--].[O--].[Zr+4].[Hf+4] KQHQLIAOAVMAOW-UHFFFAOYSA-N 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 230000003902 lesion Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- KTUFCUMIWABKDW-UHFFFAOYSA-N oxo(oxolanthaniooxy)lanthanum Chemical compound O=[La]O[La]=O KTUFCUMIWABKDW-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 230000035479 physiological effects, processes and functions Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- PWYYWQHXAPXYMF-UHFFFAOYSA-N strontium(2+) Chemical compound [Sr+2] PWYYWQHXAPXYMF-UHFFFAOYSA-N 0.000 description 1
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention provides a kind of back-illuminated cmos image sensors and its manufacture method, the structures such as pad can be formed by the use of four light shields, the use of light shield is reduced；Further, the metal grill formed is connected with the pad, it includes the 3rd metal wire of the first metal wire positioned at first isolation channel, the second metal wire positioned at second isolation channel and the connection pad, the first metal wire and the second metal wire, it can be good at limiting incident light by the metal grill, crosstalk is avoided the occurrence of, the quality of back-illuminated cmos image sensors is improved.Further, negative pressure is applied with the pad, thus negative pressure is also applied with the metal grill being connected with the pad, namely the first isolation structure formed in first isolation channel and negative pressure is applied with the second isolation structure formed in second isolation channel, it can suppress the generation of noise and dark current by applying negative pressure on first isolation structure and second isolation structure.
Description
Technical field
The present invention relates to imaging sensor manufacturing technology field, more particularly to a kind of back-illuminated cmos image sensors and its
Manufacture method.
Background technology
Imaging sensor grows up on the basis of photoelectric technology, so-called imaging sensor, can exactly experience light
Learn image information and convert thereof into the sensor of exportable signal.Imaging sensor can improve the visual range of human eye, make
It is seen that the naked eyes microcosmos and macrocosm that can not see, it is seen that people temporarily can not the generation of the place of arrival thing, see
To various physics, the chemical change process beyond naked eyes visual range, life, physiology, the generation evolution of lesion, etc..
Visual picture sensor plays very important effect in the culture of people, physical culture, production, life and scientific research.Can be with
Say, modern humans' activity can not leave imaging sensor.
Principle that imaging sensor can be used according to it and divide into charge coupled device (Charge-Coupled
Device) imaging sensor (that is, being commonly called as ccd image sensor) and CMOS (Complementary Metal Oxide
Semiconductor) imaging sensor, wherein cmos image sensor are based on CMOS complementary metal-oxide-semiconductor (CMOS) skill
Art and manufacture.Because cmos image sensor is made using traditional cmos circuit technique, thus can by imaging sensor with
And its required peripheral circuit is integrated, so that cmos image sensor has wider array of application prospect.
According to receive light position difference, cmos image sensor can be divided into before illuminated cmos image sensor and
Back-illuminated cmos image sensors, wherein, back-illuminated cmos image sensors are maximum compared with preceding illuminated cmos image sensor
Optimization in place of be exactly by the structural change of element internal, i.e., the element input path of photosensitive layer to be turned into direction, allow light
It can enter from back side direct projection, it is to avoid in preceding illuminated CMOS image sensor structure, light can be by lenticule and photoelectricity two
The influence of structure and thickness between pole pipe, improves the efficiency of light receiver.
But in the back-illuminated cmos image sensors of prior art, still needed to after pixel wafer and logic wafer bonding
Multiple light shields (it is generally necessary to using six light shields) are used to form the structures such as metal pad, so as to obtain back-illuminated type CMOS figures
As sensor.The use of light shield how to be reduced to reduce manufacturing cost, needs to solve all the time into those skilled in the art
A problem.Meanwhile, more and more back-illuminated cmos image sensors reduce light path crosstalk using deep trench isolation, still
New deep trench isolation processing procedure is introduced, defective workmanship can be introduced, can conversely increase noise and dark current.How to subtract in new technology
Few noise and dark current are also into the problem of needing to solve.
The content of the invention
It is an object of the invention to provide a kind of back-illuminated cmos image sensors and its manufacture method, to solve existing skill
Still need after pixel wafer and logic wafer bonding using multiple light shields to form the isostructural problem of metal pad in art.
In order to solve the above technical problems, the present invention provides a kind of manufacture method of back-illuminated cmos image sensors, it is described
The manufacture method of back-illuminated cmos image sensors includes：
The logic wafer and pixel wafer being bonded together are provided；
Using first light shield, to form pad area, the first isolation channel and the second isolation at the back side of the pixel wafer
Groove；
Form layer of dielectric material, the layer of dielectric material cover the pad area, first isolation channel, described second every
From the back side of groove and the pixel wafer；
Using second light shield, to expose metal level in the pad area；
Metal material layer is formed, the metal material layer covers the metal level, the pad area, first isolation
The back side of groove, second isolation channel and the pixel wafer；
Using the 3rd light shield, so that in pad area formation pad, the pad is connected with the metal level；
Using the 4th light shield, to form metal grill, the metal grill is connected with the pad, the metal grill
Including the first metal wire positioned at first isolation channel, the second metal wire positioned at second isolation channel and the connection weldering
3rd metal wire of disk, first metal wire and second metal wire.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, the layer of dielectric material is individual layer
Structure or multi-layer laminate structure.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, the layer of dielectric material includes high K
Dielectric layer and the cushion being formed in the high-K dielectric layer.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, the metal material layer includes the
One metal material layer and the second metal material layer being formed on first metal material layer, first metal material layer
Material is tungsten.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, second metal material layer
Material is aluminium or copper.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, using the 3rd light shield, with institute
Stating pad area formation pad includes：
The mask layer for the 3rd light shield is formed, the mask layer for being used for the 3rd light shield covers the metal material
Layer；
By the 3rd light shield, formation is patterned to be used for the mask layer of the 3rd light shield, the patterned use
In the mask layer of the 3rd light shield expose first isolation channel, second isolation channel, the back side of the pixel wafer and
The metal material layer of the part pad area；
Remove second metal material layer in the metal material layer exposed, the first metal described in exposed portion
Material layer, to form the pad, the pad includes part first metal material layer and remaining second metal
Material layer.
Optionally, in the manufacture method of described back-illuminated cmos image sensors, using the 4th light shield, to be formed
Metal grill includes：
The mask layer for the 4th light shield is formed, the mask layer for being used for the 4th light shield covers the pad and dew
First metal material layer gone out；
By the 4th light shield, formation is patterned to be used for the mask layer of the 4th light shield, the patterned use
In the mask layer of the 4th light shield, first metal material layer at the back side of the part pixel wafer is exposed；
First metal material layer exposed is removed, to form the metal grill.
Optionally, in the manufacture method of described back of the body back-illuminated cmos image sensors, the back-illuminated type cmos image
The manufacture method of sensor also includes：Lenticule is formed in the metal grill.
Optionally, in the manufacture method of described back of the body back-illuminated cmos image sensors, the back-illuminated type cmos image
The manufacture method of sensor also includes：Negative pressure is applied to the pad.
The present invention also provides a kind of back-illuminated cmos image sensors, and the back-illuminated cmos image sensors include：
The logic wafer and pixel wafer being bonded together；
The back side of the pixel wafer is formed with pad area, the first isolation channel and the second isolation channel；
Layer of dielectric material, the layer of dielectric material covers the pad area, first isolation channel, second isolation channel
And the back side of the pixel wafer；
Pad, the pad is located at the pad area, and the pad is connected with the metal wire in the pixel wafer, described
Negative pressure is applied with pad；
Metal grill, the metal grill is connected with the pad, and the metal grill includes being located at the described first isolation
First metal wire of groove, the second metal wire positioned at second isolation channel and the connection pad, connection first metal
3rd metal wire of line and second metal wire.
In the back-illuminated cmos image sensors and its manufacture method that the present invention is provided, the use by four light shields is
The structures such as pad can be formed, the use of light shield is reduced；Further, the back-illuminated cmos image sensors formed include gold
Belong to grid, the metal grill is connected with the pad, the metal grill includes the first gold medal positioned at first isolation channel
Belong to line, the second metal wire positioned at second isolation channel and connect the pad, first metal wire and second gold medal
Belong to the 3rd metal wire of line, can be good at limiting incident light by the metal grill, it is to avoid crosstalk occur, improve
The quality of back-illuminated cmos image sensors.Further, negative pressure is applied with the pad, is thus connected with the pad
Metal grill on be also applied with negative pressure, namely the first isolation structure for being formed in first isolation channel and described second
Negative pressure is applied with the second isolation structure formed in isolation channel, by first isolation structure and second isolation junction
The generation of noise and dark current can be suppressed by applying negative pressure on structure.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the manufacture method of the back-illuminated cmos image sensors of the embodiment of the present invention；
Fig. 2 is the diagrammatic cross-section of the logic wafer the being bonded together and pixel wafer provided in the embodiment of the present invention；
Fig. 3 is the diagrammatic cross-section using the structure obtained after first light shield in the embodiment of the present invention；
Fig. 4 is the diagrammatic cross-section that the structure obtained after layer of dielectric material is formed in the embodiment of the present invention；
Fig. 5 is the diagrammatic cross-section using the structure obtained after second light shield in the embodiment of the present invention；
Fig. 6 is the diagrammatic cross-section that the structure obtained after metal material layer is formed in the embodiment of the present invention；
Fig. 7 is the diagrammatic cross-section using the structure obtained after the 3rd light shield in the embodiment of the present invention；
Fig. 8 is the diagrammatic cross-section that the structure obtained after chapter 4 light shield is used in the embodiment of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments to back-illuminated cmos image sensors proposed by the present invention and its manufacturer
Method is described in further detail.According to following explanation and claims, advantages and features of the invention will become apparent from.Need explanation
, accompanying drawing uses very simplified form and uses non-accurately ratio, only conveniently, lucidly to aid in illustrating originally
The purpose of inventive embodiments.
First, Fig. 1 is refer to, it is the flow of the manufacture method of the back-illuminated cmos image sensors of the embodiment of the present invention
Schematic diagram.As shown in figure 1, the manufacture method of the back-illuminated cmos image sensors includes：
Step S10：The logic wafer and pixel wafer being bonded together are provided；
Step S11：Using first light shield, with formed at the back side of the pixel wafer pad area, the first isolation channel and
Second isolation channel；
Step S12：Layer of dielectric material is formed, the layer of dielectric material covers the pad area, first isolation channel, institute
State the back side of the second isolation channel and the pixel wafer；
Step S13：Using second light shield, to expose metal level in the pad area；
Step S14：Form metal material layer, the metal material layer covers the metal level, the pad area, described the
The back side of one isolation channel, second isolation channel and the pixel wafer；
Step S15：Using the 3rd light shield, so that in pad area formation pad, the pad connects with the metal level
Connect；
Step S16：Using the 4th light shield, to form metal grill, the metal grill is connected with the pad, described
Metal grill includes the first metal wire, the second metal wire positioned at second isolation channel and the company positioned at first isolation channel
Connect the 3rd metal wire of the pad, first metal wire and second metal wire.
Subsequently, Fig. 2 to Fig. 8 is refer to, the embodiment of the present application will combine the section signal for completing to obtain after different step
Figure is further described.
First, Fig. 2 is refer to there is provided semiconductor structure 20, specifically, providing the logic wafer and picture being bonded together
Plain wafer.Wherein, the logic wafer can include the first substrate and be formed in first substrate and/or be formed described
Logic circuit on first substrate；The pixel wafer can include the second substrate and formed in second substrate and/or
The structures such as the photodiode and metal level that are formed on second substrate, wherein, the metal level can specifically include
The structure of the metal material such as metal interconnecting wires and metal contact hole.Further, the logic wafer and the pixel wafer
After bonding, the pixel wafer can also carry out technique for thinning back side.
Then, Fig. 3 is refer to, in the embodiment of the present application, using first light shield, with the back side of the pixel wafer
Form pad area 21, the first isolation channel 22 and the second isolation channel 23.I.e. here, by a light shield, in the pixel wafer
The back side at least forms three kinds of structures, respectively pad area 21, the first isolation channel 22 and the second isolation channel 23.Implement in the application
In example, first isolation channel 22 and second isolation channel 23 are used for forming isolation structure, mainly there is profile between the two
On difference, specifically, the depth and/or cross-sectional width of first isolation channel 22 and second isolation channel 23 can not phases
Together.
Wherein, using first light shield, to form pad area 21, the and of the first isolation channel 22 at the back side of the pixel wafer
Second isolation channel 23 can specifically include：The first mask layer is formed at the back side of the pixel wafer；Using first light shield pair
First mask layer performs photoetching process, to form patterned first mask layer (i.e. described patterned first mask layer
Expose the surface in the region that the pixel wafer needs to form pad area 21, the first isolation channel 22 and the second isolation channel 23)；It is right
The pixel wafer performs etching technics, so as to form pad area 21, the and of the first isolation channel 22 at the back side of the pixel wafer
Second isolation channel 23；Remove patterned first mask layer.
Then, it refer to Fig. 4, form layer of dielectric material 24, the layer of dielectric material 24 covers the pad area 21, described
The back side (such as two adjacent second isolation of first isolation channel 22, second isolation channel 23 and the pixel wafer
The surface of semiconductor structure 20 between groove 23, and for example partly leading between first isolation channel 22 and second isolation channel 23
The surface of body structure 20, the surface of semiconductor structure 20 also as described between the first isolation channel 22 and the pad area 21).
Specifically, the layer of dielectric material 24 can be single layer structure or multi-layer laminate structure.In the embodiment of the present application
In, the layer of dielectric material 24 is multi-layer laminate structure, specifically includes high-K dielectric layer and is formed in the high-K dielectric layer
Cushion, thus, the isolation structure thus formed have splendid isolation effect.Specifically, the material of the high-K dielectric layer
Can be hafnium oxide (HfO2), oxynitriding hafnium (HfON), hafnium silicate (HfSiO), hafnium silicon oxynitide (HfSiON), zirconium oxide
(ZrO2), zirconium oxynitride (ZrON), zirconium silicate (ZrSiO), zirconium oxynitride silicon (ZrSiON), hafnium oxide zirconium (HfZrO2), oxygen nitrogen
Change hafnium zirconium (HfZrON), hafnium silicate zirconium (HfZrSiO), oxynitriding hafnium zirconium silicon (HfZrSiON), aluminum oxide (Al2O3), titanium oxide
(TiO2), lanthana (La2O3), lanthanum aluminum oxide (LaAlO3), cerium oxide (CeO2), yittrium oxide (Y2O3), strontium barium oxide titanium
Thing (BaSrTiO), barium titanium oxide (BaTiO), strontium titanium oxide (SrTiO3), lead scandium tantalum pentoxide (PbScTaO) etc. or
Combination more than both.The material of the cushion can for silica, silicon nitride or silicon oxynitride etc. or they
More than two combinations.
In the embodiment of the present application, because the layer of dielectric material 24 covers first isolation channel 22 and described second
Isolation channel 23, it will also be appreciated that covering first isolation channel 22 by the layer of dielectric material 24 forms the first isolation
Structure, covers second isolation channel 23 by the layer of dielectric material 24 and forms the second isolation structure.
Then, Fig. 5 is refer to, using second light shield, to expose metal level 25 in the pad area 21.In the application
In embodiment, the metal level 25 can specifically include the structure of the metal materials such as metal interconnecting wires and metal contact hole.Enter
One step, the metal level 25 can be single layer structure or multi-layer laminate structure；Its material can selected from aluminium, copper,
One or more in the materials such as nickel, tungsten.
Wherein, using second light shield, it can specifically be included with exposing metal level 25 in the pad area 21：Form the
Two mask layers, second mask layer covers the layer of dielectric material 24；Second mask layer is held using second light shield
Row photoetching process, to form patterned second mask layer, (i.e. described patterned second mask layer exposes part and given an account of
The material bed of material 24)；Pixel wafer (namely semiconductor structure 20) to the layer of dielectric material 24 exposed and under it is held
Row etching technics, so as to expose metal level 24；Remove patterned second mask layer.
In the embodiment of the present application, then, Fig. 6 is refer to, metal material layer 26 is formed, the metal material layer 26 is covered
The metal level 25, the pad area 21, first isolation channel 22, the back of the body of second isolation channel 23 and the pixel wafer
Face.That is, the metal material layer 26 covers (remaining) described layer of dielectric material 24 and (exposing) described metal level 25.
In the embodiment of the present application, the metal material layer 26 is multi-layer laminate structure, it is preferred that the metal material layer
26 include the first metal material layer 260 and the second metal material layer 261 being formed on first metal material layer 260.More
Good, the material of first metal material layer 260 is tungsten；Further, the material of second metal material layer 261 is aluminium
Or copper.Here, being tungsten by first metal material layer 260 selection, it is ensured that for first isolated groove 22
With the filling quality of second isolated groove 23；Further, it is tungsten by first metal material layer 260 selection, can
To realize that noise suppresses.In the embodiment of the present application, the material of second metal material layer 261 is preferably aluminium or copper, from
And high-quality metal contact can be realized.
Then, Fig. 7 is refer to, using the 3rd light shield, with the pad area 21 formation pad, the pad 27 and institute
State 26 layers of connection of metal.In the embodiment of the present application, the pad 27 is laminated construction, specifically includes (part) first metal material
The bed of material 260 and the second metal material layer 261 on (part) first metal material layer 260.
Wherein, using the 3rd light shield, to be specifically included in the pad area 21 formation pad 27：Formed for the 3rd
The mask layer (being the 3rd mask layer herein) of light shield, mask layer (i.e. the 3rd mask layer) covering for being used for the 3rd light shield
The metal material layer 26；Photoetching (is performed to the 3rd mask layer using the 3rd light shield by the 3rd light shield
Technique), formation is patterned to be used for the mask layer (i.e. patterned 3rd mask layer) of the 3rd light shield, the patterned use
First isolation channel 22, second isolation are exposed in the mask layer (i.e. patterned 3rd mask layer) of the 3rd light shield
The metal material layer of groove 23, the back side of the pixel wafer and the part pad area 21；Remove the metal material exposed
Second metal material layer 261 in the bed of material 26, the first metal material layer 260 described in exposed portion, to form the pad
27, the pad 27 includes part first metal material layer 260 and remaining second metal material layer 261.Enter one
Step, in addition to：Remove patterned 3rd mask layer.
Then, Fig. 8 is refer to, using the 4th light shield, to form metal grill 28, the metal grill 28 and the weldering
Disk 27 is connected, the metal grill 28 include positioned at first isolation channel 22 the first metal wire 280, positioned at described second every
The second metal wire 281 and the connection pad 27, first metal wire 280 and second metal wire 281 from groove 23
3rd metal wire 282.
Wherein, using the 4th light shield, specifically included with forming metal grill 28：Form the mask for the 4th light shield
Layer (being the 4th mask layer herein), the mask layer (i.e. the 4th mask layer) for being used for the 4th light shield covers the pad 27
With first metal material layer 260 exposed；(covered by the 4th light shield using the 4th light shield to the described 4th
Film layer performs photoetching process), formation is patterned to be used for the mask layer (i.e. patterned 4th mask layer) of the 4th light shield, institute
State the patterned mask layer (i.e. patterned 4th mask layer) for being used for the 4th light shield and expose the part pixel wafer
First metal material layer 260 at the back side (mainly expose first between two adjacent second isolation channels 23 herein
Metal material layer 260)；First metal material layer 260 exposed is removed, to form the metal grill 28.Further
, in addition to：Remove patterned 4th mask layer.
In the embodiment of the present application, the manufacture method of the back-illuminated cmos image sensors further may also include：
Lenticule (not shown) is formed in the metal grill 28.Here, the lenticule has been filled primarily with described the removed
The region of one metal material layer 260.Isolation can be good at by the first metal material layer 260 in second isolation channel 23
Two adjacent lenticules, so as to reduce crosstalk.
Further, the manufacture method of the back-illuminated cmos image sensors also includes：Negative is applied to the pad 27
Pressure.Thus negative pressure is also applied with the metal grill 28 being connected with the pad 27, noise can be suppressed by the negative pressure
Produce, so as to improve the quality of formed back-illuminated cmos image sensors.
Manufacture method by above-mentioned back-illuminated cmos image sensors is an available back-illuminated cmos image sensors,
Specifically, the back-illuminated cmos image sensors include：The logic wafer and pixel wafer being bonded together；The pixel is brilliant
The round back side is formed with pad area 21, the first isolation channel 22 and the second isolation channel 23；Layer of dielectric material 24, the layer of dielectric material
24 cover the back side of the pad areas 21, first isolation channel 22, second isolation channel 23 and the pixel wafer；Pad
27, the pad is located at the pad area 21, and the pad 27 is connected with the metal wire 25 in the pixel wafer, the pad
Negative pressure is applied with 27；Metal grill 28, the metal grill 28 is connected with the pad 27, and the metal grill 28 includes position
The first metal wire 280 in first isolation channel 22, the second metal wire 281 positioned at second isolation channel 23 and connection institute
State pad, connect the 3rd metal wire 282 of first metal wire 280 and second metal wire 281.
Here, the structures such as pad can be formed by the use of four light shields, the use of light shield is reduced；Further,
The back-illuminated cmos image sensors formed include metal grill, and the metal grill is connected with the pad, the metal
Grid includes the first metal wire positioned at first isolation channel, the second metal wire positioned at second isolation channel and connection institute
The 3rd metal wire of pad, first metal wire and second metal wire is stated, be can be good at by the metal grill
Limit incident light, it is to avoid crosstalk occur, improve the quality of back-illuminated cmos image sensors.Further, it is described
Negative pressure is applied with pad, negative pressure is also applied with the metal grill being thus connected with the pad, namely described first every
Negative pressure is applied with the second isolation structure formed from the first isolation structure formed in groove and in second isolation channel, is led to
The generation of noise and dark current can be suppressed by crossing the application negative pressure on first isolation structure and second isolation structure.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Scope.
Claims (10)
1. a kind of manufacture method of back-illuminated cmos image sensors, it is characterised in that the back-illuminated cmos image sensors
Manufacture method include：
The logic wafer and pixel wafer being bonded together are provided；
Using first light shield, to form pad area, the first isolation channel and the second isolation channel at the back side of the pixel wafer；
Layer of dielectric material is formed, the layer of dielectric material covers the pad area, first isolation channel, second isolation channel
And the back side of the pixel wafer；
Using second light shield, to expose metal level in the pad area；
Metal material layer is formed, the metal material layer covers the metal level, the pad area, first isolation channel, institute
State the back side of the second isolation channel and the pixel wafer；
Using the 3rd light shield, so that in pad area formation pad, the pad is connected with the metal level；
Using the 4th light shield, to form metal grill, the metal grill is connected with the pad, and the metal grill includes
The first metal wire positioned at first isolation channel, the second metal wire positioned at second isolation channel and the connection pad,
3rd metal wire of first metal wire and second metal wire.
2. the manufacture method of back-illuminated cmos image sensors as claimed in claim 1, it is characterised in that the dielectric material
Layer is single layer structure or multi-layer laminate structure.
3. the manufacture method of back-illuminated cmos image sensors as claimed in claim 1, it is characterised in that the dielectric material
Layer includes high-K dielectric layer and the cushion being formed in the high-K dielectric layer.
4. the manufacture method of back-illuminated cmos image sensors as claimed in claim 1, it is characterised in that the metal material
Layer includes the first metal material layer and the second metal material layer being formed on first metal material layer, first metal
The material of material layer is tungsten.
5. the manufacture method of back-illuminated cmos image sensors as claimed in claim 4, it is characterised in that second metal
The material of material layer is aluminium or copper.
6. the manufacture method of back-illuminated cmos image sensors as claimed in claim 5, it is characterised in that using the 3rd light
Cover, to include in pad area formation pad：
The mask layer for the 3rd light shield is formed, the mask layer for being used for the 3rd light shield covers the metal material layer；
By the 3rd light shield, formed it is patterned be used for the mask layer of the 3rd light shield, it is described patterned to be used for the
The mask layer of three light shields exposes first isolation channel, second isolation channel, the back side and part of the pixel wafer
The metal material layer of the pad area；
Remove second metal material layer in the metal material layer exposed, the first metal material described in exposed portion
Layer, to form the pad, the pad includes part first metal material layer and remaining second metal material
Layer.
7. the manufacture method of back-illuminated cmos image sensors as claimed in claim 6, it is characterised in that using the 4th light
Cover, is included with forming metal grill：
Form the mask layer for the 4th light shield, the mask layer for being used for the 4th light shield covers the pad and exposed
First metal material layer；
By the 4th light shield, formed it is patterned be used for the mask layer of the 4th light shield, it is described patterned to be used for the
The mask layer of four light shields exposes first metal material layer at the back side of the part pixel wafer；
First metal material layer exposed is removed, to form the metal grill.
8. such as the manufacture method of back-illuminated cmos image sensors according to any one of claims 1 to 7, it is characterised in that
The manufacture method of the back-illuminated cmos image sensors also includes：Lenticule is formed in the metal grill.
9. such as the manufacture method of back-illuminated cmos image sensors according to any one of claims 1 to 7, it is characterised in that
The manufacture method of the back-illuminated cmos image sensors also includes：Negative pressure is applied to the pad.
10. a kind of back-illuminated cmos image sensors, it is characterised in that the back-illuminated cmos image sensors include：
The logic wafer and pixel wafer being bonded together；
The back side of the pixel wafer is formed with pad area, the first isolation channel and the second isolation channel；
Layer of dielectric material, the layer of dielectric material covers the pad area, first isolation channel, second isolation channel and institute
State the back side of pixel wafer；
Pad, the pad is located at the pad area, and the pad is connected with the metal wire in the pixel wafer, the pad
On be applied with negative pressure；
Metal grill, the metal grill is connected with the pad, and the metal grill is included positioned at first isolation channel
First metal wire, the second metal wire positioned at second isolation channel and connect the pad, connect first metal wire and
3rd metal wire of second metal wire.
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