CN107124827A - A kind of pcb board processing technology - Google Patents
A kind of pcb board processing technology Download PDFInfo
- Publication number
- CN107124827A CN107124827A CN201710515795.3A CN201710515795A CN107124827A CN 107124827 A CN107124827 A CN 107124827A CN 201710515795 A CN201710515795 A CN 201710515795A CN 107124827 A CN107124827 A CN 107124827A
- Authority
- CN
- China
- Prior art keywords
- welding resistance
- pcb board
- processing technology
- hole
- consent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/143—Treating holes before another process, e.g. coating holes before coating the substrate
Abstract
The invention discloses a kind of pcb board processing technology, comprise the following steps that lamination → drilling → heavy copper → welding resistance consent → welding resistance baking → ceramics nog plate → outer photoimaging → welding resistance silk-screen → welding resistance baking, welding resistance jack process is advanced to the process after heavy Copper fabrication by the processing sequence after normal outer photoimaging,, repairing cause product rejection the problem of high using filling holes with resin cost to solve.
Description
Technical field
The present invention relates to pcb board manufacture field, more particularly to a kind of pcb board processing technology.
Background technology
The development of science and technology is followed by, processing method is continued to optimize, wanted while improving production efficiency and product yield
It is the trend being determined to win to seek each manufacturing reduction processing cost.The technique of PCB product consent is different can be to product yield
And cost can have certain difference, for the characteristics of PCB product needs welding, most of product via is required to use
Consent makes, and in order to reduce PCB processed finished products, many clients can select impedance consent, then for some local weldings
Position need local windowing or one side windowing, and welding position only has 5mil (to be typically designed needs apart from via
12mil), the problem of some are because of design space via and the pad of welding position are joined directly together.Welding resistance consent is so caused to dry
Welding resistance oil, which is emerged, after roasting pollutes pad, and such design is general in industry only can select the technique of filling holes with resin to realize, but so
Processing PCB processing cost can be risen.In addition also some PCB processing business fortunately selection manually repair pad on solder mask or
Person burns up the ink of pollution pad using laser, so can cause product is a certain proportion of to scrap, and influences product yield.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of pcb board processing technology, solve PCB product design welding resistance plug
The problem of hole one side windowing or local location windowing pollution pad need to be repaired, solves directly change using welding resistance consent
Cause the problem of processing cost rises for filling holes with resin, to solve caused above-mentioned multinomial defect in the prior art.
To achieve the above object, the present invention provides following technical scheme:A kind of pcb board processing technology, including following work
Skill step,
1) it is laminated, is answered by wiring board, core plate dielectric layer, wiring board, insulating barrier, wiring board, core plate dielectric layer and wiring board
Conjunction is formed, and forms pcb board;
2) drill, in pcb board Vertical Square up-hole;
3) heavy copper, makes the pcb board hole wall after drilling conductive, forms plated-through hole;
4) welding resistance consent, passes through solder mask welding resistance consent;
5) ceramic nog plate, processing is polished to the ink that two sides at turn hole is protruded;
6) outer photoimaging, top layer and bottom to pcb board carry out outer photoimaging;
7) welding resistance silk-screen, windowing pad and welding resistance silk-screen.
It is preferred that, the step 4) and step 7) welding resistance baking procedure is added afterwards, the temperature control of welding resistance baking exists
160-168 DEG C, time control is in 20-25min.
It is preferred that, the step 1) in, operating parameter be vacuum state under, the Stress control of lamination in 320-380psi,
Wiring board is risen to 175 DEG C -185 DEG C from room temperature, wherein in the range of 100 DEG C -170 DEG C the rate of heat addition control 2.5-3.5 DEG C/
Min, 170 DEG C of -185 DEG C of maintenance 60-70min of high temperature, is then cooled to room temperature, cooldown rate is less than 3 DEG C/min.
It is preferred that, the step 3) in, the copper thickness that heavy copper plating is obtained is 5-15 μm.
It is preferred that, the step 6) in, comprise the following steps, outer layer nog plate, outer layer pad pasting, film aligning, exposure and aobvious
Shadow.
Beneficial effect using above technical scheme is:Structure of the present invention by welding resistance jack process by normal outer photoimaging
Processing sequence afterwards is advanced to the process after heavy Copper fabrication, and high using filling holes with resin cost to solve, repairing causes product
The problem of scrapping.
Brief description of the drawings
Fig. 1 is the schematic diagram after present invention lamination;
Fig. 2 is the schematic diagram after present invention drilling;
Fig. 3 is the schematic diagram after the heavy copper of the present invention;
Fig. 4 is the schematic diagram after welding resistance consent of the present invention;
Fig. 5 is the schematic diagram after ceramic nog plate of the invention;
Fig. 6 is the schematic diagram of normal outer photoimaging post-processing welding resistance of the invention.
Wherein, 1-- wiring boards, 2-- core plates dielectric layer, 3-- insulating barriers, 4-- solder masks, 5-- windowing pads.
Embodiment
The preferred embodiment that the invention will now be described in detail with reference to the accompanying drawings.
With reference to Fig. 1 -- shown in Fig. 6,
Embodiment 1:
A kind of pcb board processing technology, is comprised the following steps that,
1) it is laminated, by wiring board 1, core plate dielectric layer 2, wiring board 1, insulating barrier 3, wiring board 1, core plate dielectric layer 2 and line
Road plate 1 is composited, and forms pcb board, operating parameter is under vacuum state, the Stress control of lamination is in 320psi, by wiring board 1
185 DEG C are risen to from room temperature, wherein rate of heat addition control is in 2.5 DEG C/min, 185 DEG C of maintenances of high temperature in the range of 100 DEG C -170 DEG C
60min, is then cooled to room temperature, and cooldown rate is less than 3 DEG C/min;
2) drill, in pcb board Vertical Square up-hole;
3) heavy copper, makes the pcb board hole wall after drilling conductive, forms plated-through hole, and the copper that heavy copper plating is obtained is thick
For 5 μm;
4) welding resistance consent, by the welding resistance consent of solder mask 4, adds welding resistance baking procedure, the temperature of welding resistance baking afterwards
Control is at 160 DEG C, and time control is in 25min;
5) ceramic nog plate, processing is polished to the ink that two sides at turn hole is protruded;
6) outer photoimaging, top layer and bottom to pcb board carry out outer photoimaging, comprise the following steps, outer layer nog plate, outer layer
It is pad pasting, film aligning, exposed and developed;
7) welding resistance silk-screen, windowing pad 5 and welding resistance silk-screen, add welding resistance baking procedure, the temperature control of welding resistance baking afterwards
System is at 160 DEG C, and time control is in 35min.
Embodiment 2:
A kind of pcb board processing technology, is comprised the following steps that,
1) it is laminated, by wiring board 1, core plate dielectric layer 2, wiring board 1, insulating barrier 3, wiring board 1, core plate dielectric layer 2 and line
Road plate 1 is composited, and forms pcb board, operating parameter is under vacuum state, the Stress control of lamination is in 380psi, by wiring board 1
175 DEG C are risen to from room temperature, wherein rate of heat addition control is in 3.5 DEG C/min, 175 DEG C of maintenances of high temperature in the range of 100 DEG C -170 DEG C
70min, is then cooled to room temperature, and cooldown rate is less than 3 DEG C/min;
2) drill, in pcb board Vertical Square up-hole;
3) heavy copper, makes the pcb board hole wall after drilling conductive, forms plated-through hole, and the copper that heavy copper plating is obtained is thick
For 15 μm;
4) welding resistance consent, by the welding resistance consent of solder mask 4, adds welding resistance baking procedure, the temperature of welding resistance baking afterwards
Control is at 168 DEG C, and time control is in 20min;
5) ceramic nog plate, processing is polished to the ink that two sides at turn hole is protruded;
6) outer photoimaging, top layer and bottom to pcb board carry out outer photoimaging, comprise the following steps, outer layer nog plate, outer layer
It is pad pasting, film aligning, exposed and developed;
7) welding resistance silk-screen, windowing pad 5 and welding resistance silk-screen, add welding resistance baking procedure, the temperature control of welding resistance baking afterwards
System is at 168 DEG C, and time control is in 20min.
Embodiment 3:
A kind of pcb board processing technology, is comprised the following steps that,
1) it is laminated, by wiring board 1, core plate dielectric layer 2, wiring board 1, insulating barrier 3, wiring board 1, core plate dielectric layer 2 and line
Road plate 1 is composited, and forms pcb board, operating parameter is under vacuum state, the Stress control of lamination is in 350psi, by wiring board 1
180 DEG C are risen to from room temperature, wherein rate of heat addition control is in 3 DEG C/min, 180 DEG C of maintenances of high temperature in the range of 100 DEG C -170 DEG C
65min, is then cooled to room temperature, and cooldown rate is less than 3 DEG C/min;
2) drill, in pcb board Vertical Square up-hole;
3) heavy copper, makes the pcb board hole wall after drilling conductive, forms plated-through hole, and the copper that heavy copper plating is obtained is thick
For 10 μm;
4) welding resistance consent, by the welding resistance consent of solder mask 4, adds welding resistance baking procedure, the temperature of welding resistance baking afterwards
Control is at 164 DEG C, and time control is in 23min;
5) ceramic nog plate, processing is polished to the ink that two sides at turn hole is protruded;
6) outer photoimaging, top layer and bottom to pcb board carry out outer photoimaging, comprise the following steps, outer layer nog plate, outer layer
It is pad pasting, film aligning, exposed and developed;
7) welding resistance silk-screen, windowing pad 5 and welding resistance silk-screen, add welding resistance baking procedure, the temperature control of welding resistance baking afterwards
System is at 164 DEG C, and time control is in 22min.
It is processed after welding resistance consent is advanced into heavy copper, by the way that ceramic nog plate is by solder mask consent projection and toasts
The ink upspring is ground smooth.
Existing PCB industries are connected or one side windowing pad pitch welding resistance for the pad of local windowing with welding resistance plug cock hole
The problem of plug cock pitch of holes < 12mil product can not solve solder mask pollution pad, or by changing filling holes with resin oil
Ink increases the method for cost to improve, and of the invention by the way that welding resistance consent is advanced into heavy copper post-processing, and ceramic nog plate grinding is flat
It is whole, it can effectively solve local windowing pad pitch solder mask consent and be connected or apart from small product solder mask consent
The problem of pollution, and processing cost can be reduced.
The present invention can effectively solve local windowing pad pitch solder mask consent and be connected or apart from small product
The problem of solder mask consent pollutes, and processing cost can be reduced.
Above-described is only the preferred embodiment of the present invention, it is noted that for one of ordinary skill in the art
For, without departing from the concept of the premise of the invention, various modifications and improvements can be made, these belong to the present invention
Protection domain.
Claims (5)
1. a kind of pcb board processing technology, it is characterised in that comprise the following steps that,
1) it is laminated, is composited by wiring board, core plate dielectric layer, insulating barrier, core plate dielectric layer and wiring board, forms pcb board;
2) drill, in pcb board Vertical Square up-hole;
3) heavy copper, makes the pcb board hole wall after drilling conductive, forms plated-through hole;
4) welding resistance consent, passes through solder mask welding resistance consent;
5) ceramic nog plate, processing is polished to the ink that two sides at turn hole is protruded;
6) outer photoimaging, top layer and bottom to pcb board carry out outer photoimaging;
7) welding resistance silk-screen, windowing pad and welding resistance silk-screen.
2. pcb board processing technology according to claim 1, it is characterised in that the step 4) and step 7) add afterwards
Welding resistance baking procedure, the temperature control of welding resistance baking is at 160-168 DEG C, and time control is in 20-25min.
3. pcb board processing technology according to claim 1, it is characterised in that the step 1) in, operating parameter is vacuum
Under state, wiring board is risen to 175 DEG C -185 DEG C, wherein 100 DEG C -170 by the Stress control of lamination in 320-380psi from room temperature
Then rate of heat addition control be cooled in 2.5-3.5 DEG C/min, 170 DEG C of -185 DEG C of maintenance 60-70min of high temperature in the range of DEG C
Room temperature, cooldown rate is less than 3 DEG C/min.
4. pcb board processing technology according to claim 1, it is characterised in that the step 3) in, the copper that heavy copper plating is obtained
Thickness is 5-15 μm.
5. pcb board processing technology according to claim 1, it is characterised in that the step 6) in, comprise the following steps,
It is outer layer nog plate, outer layer pad pasting, film aligning, exposed and developed.
Priority Applications (1)
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CN201710515795.3A CN107124827A (en) | 2017-06-29 | 2017-06-29 | A kind of pcb board processing technology |
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CN201710515795.3A CN107124827A (en) | 2017-06-29 | 2017-06-29 | A kind of pcb board processing technology |
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CN107124827A true CN107124827A (en) | 2017-09-01 |
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Cited By (5)
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CN108811347A (en) * | 2018-06-19 | 2018-11-13 | 苏州市华扬电子股份有限公司 | A kind of thermosetting production method of flexible PCB |
CN109831874A (en) * | 2019-02-21 | 2019-05-31 | 深圳崇达多层线路板有限公司 | A method of solving the upper PAD of the quick-fried oil of welding resistance |
CN111132473A (en) * | 2019-12-27 | 2020-05-08 | 重庆秦嵩科技有限公司 | PCB assembly processing technology |
CN112188732A (en) * | 2019-07-03 | 2021-01-05 | 胜宏科技(惠州)股份有限公司 | Manufacturing method of medical instrument detection plate |
CN114885515A (en) * | 2022-05-27 | 2022-08-09 | 东莞联桥电子有限公司 | Manufacturing process of circuit board capable of preventing false copper exposure |
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CN104349607A (en) * | 2013-07-31 | 2015-02-11 | 深圳崇达多层线路板有限公司 | Processing method of resistance welding plugged hole of circuit board |
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CN104349607A (en) * | 2013-07-31 | 2015-02-11 | 深圳崇达多层线路板有限公司 | Processing method of resistance welding plugged hole of circuit board |
CN103906379A (en) * | 2014-02-28 | 2014-07-02 | 奥士康精密电路(惠州)有限公司 | Press fit method for multi-layer printed circuit board |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108811347A (en) * | 2018-06-19 | 2018-11-13 | 苏州市华扬电子股份有限公司 | A kind of thermosetting production method of flexible PCB |
CN109831874A (en) * | 2019-02-21 | 2019-05-31 | 深圳崇达多层线路板有限公司 | A method of solving the upper PAD of the quick-fried oil of welding resistance |
CN112188732A (en) * | 2019-07-03 | 2021-01-05 | 胜宏科技(惠州)股份有限公司 | Manufacturing method of medical instrument detection plate |
CN111132473A (en) * | 2019-12-27 | 2020-05-08 | 重庆秦嵩科技有限公司 | PCB assembly processing technology |
CN114885515A (en) * | 2022-05-27 | 2022-08-09 | 东莞联桥电子有限公司 | Manufacturing process of circuit board capable of preventing false copper exposure |
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Application publication date: 20170901 |