CN107122276A - Running status output circuit and running status output intent - Google Patents
Running status output circuit and running status output intent Download PDFInfo
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- CN107122276A CN107122276A CN201710305526.4A CN201710305526A CN107122276A CN 107122276 A CN107122276 A CN 107122276A CN 201710305526 A CN201710305526 A CN 201710305526A CN 107122276 A CN107122276 A CN 107122276A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2247—Verification or detection of system hardware configuration
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
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Abstract
The embodiment of the invention discloses a kind of running status output circuit that can be integrated on processor board.The running status output circuit includes：EBI, it is connected to bus；Display interface, it is connected to display portion；And processing module, it is configured as, from running state data is read in non-I/O address 80h I/O address in bus, running state data being converted to the control signal of display portion, and exports the control signal of the display portion of reflection running state data.Using the running status output circuit of the embodiment of the present invention, can accurately feedback processor board running status.
Description
Technical field
The present invention relates to field of computer technology, more particularly, to a kind of running status output circuit and operation shape
State output intent.
Background technology
In the processor board start operation of mainframe computer, because the available machine time is longer, when processor board can not
During normal boot-strap, in the case of no running status output circuit, operating personnel can not learn board running status, cause
Waste of time, under special circumstances, can result in greater loss.If in addition, there is no running status output circuit, working as processing
Device board is entered after operating system, and the running status of processing board is also known nothing.
With the integrated level more and more higher of processor board, machine system is more and more huger, miscue and operation shape
The necessity of state prompting is more obvious.If such a huge machine system occurs in that failure in the process of running, if
Make positioning without efficiently method, but conventionally progressively investigate failure, will expend substantial amounts of manpower and materials with
Time.
Therefore, the working condition of a fault cues or reflection board in different phase is built for processor board
Prompt system is necessary.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of operation for the running status prompting for realizing processor board
State output circuit.
According to an aspect of the present invention there is provided a kind of running status output circuit, including it is connected to the bus of bus and connects
Mouthful；It is connected to the display interface of display portion；And, processing module, it is configured as by bus from non-I/O address 80h's
Running state data is read in I/O address, running state data is converted to the display signal of display portion, and exports reflection fortune
The display signal of the display portion of row status data.
In one embodiment of the invention, running status output circuit or processing module include memory, and it stores fortune
Row status data.In one embodiment of the invention, running state data includes starting shape for open state and/or BIOS
Unique corresponding fault message of state；And/or, into operating system after running status unique corresponding running status prompting letter
Breath.
In one embodiment of the invention, non-I/O address 80h I/O address is I/O address 290h.
In one embodiment of the invention, processing module includes PLD.In the implementation of the present invention
In example, EBI or display interface can be the EBI part or display being defined in the pin of PLD
Interface section.In another embodiment of the present invention, EBI or display interface can be respective self-existent interfaces.
EBI is electrically connected with PLD as the pin portions of bus input end.Display interface and FPGA
The pin portions as display signal output part of device are electrically connected.
In one embodiment of the invention, processing module also includes memory, its store program codes, program code bag
Include communication monitoring code, decoding code and display output code；Wherein, communication monitoring code is configured operation to monitor bus
Output and read running state data；Decoding code is configured operation to obtain running state data and parse and decoding operation
Status data be converted to the status data of display portion；And, it is aobvious to obtain that display output code is configured operation
Show the status data of part and the display signal of output display part.
In one embodiment of the invention, processing module includes the control signal input being connected with control signal wire；
Communication monitoring code is configured operation to monitor the control signal of control signal input, and according to control signal through control with
Running state data is read from I/O address 80h.
According to another aspect of the present invention there is provided a kind of processor board, including：Bus；Cpu chip, is configured as
Status bit message is write in non-I/O address 80h I/O address in the start of processor board and/or BIOS start-up courses.Place
Managing device board also includes running status output circuit, and it is electrically connected by bus with cpu chip.The running status output circuit bag
Include：It is connected to the EBI of bus；It is connected to the display interface of display portion；And, processing module, it is configured as passing through
Bus reads running state data from non-I/O address 80h I/O address, and running state data is converted into display portion
Signal is shown, and exports the display signal of the display portion of reflection running state data.
In one embodiment of the invention, running state data includes opening for processor board open state or BIOS
Unique corresponding fault message of dynamic state.Processing module is configured as processor board open state or BIOS startups
Unique corresponding fault message of state is converted to the control signal of display portion.
In one embodiment of the invention, processing module is configured as processor on processor board after electricity operation
The running state data of board is transferred in non-I/O address 80h I/O address.
In one embodiment of the invention, running state data includes entering after operating system for processor plate card and transported
Unique corresponding running status prompt message of row state.Processing module is configured as that operation will be entered for processor plate card
Unique corresponding running status prompt message of running status is converted to the display signal of display portion after system.
In one embodiment of the invention, non-I/O address 80h I/O address is 290h.
In one embodiment of the invention, processor board also includes display portion.
In one embodiment of the invention, display portion includes 8 LEDs or 8 segment numeral pipes with two row arrangements, its
In, often it is classified as 4 LEDs or charactron；Wherein 8 LEDs or 8 segment numeral pipes are arranged on the front panel side of processor board
And above the pusher of processor board.
According to another aspect of the invention, a kind of running status output intent is additionally provided, this method includes：Running status
The operation shape that output circuit is transmitted by the cpu chip of bus reading processor board from non-I/O address 80h I/O address
State data；Running status output circuit is converted to running state data the display signal of display portion；And, running status is defeated
Go out the display signal of the display portion of circuit output reflection running state data.
In one embodiment of the invention, running state data is converted to display portion by running status output circuit
Show that signal includes running status output circuit by for the unique of the open state of processor board and/or BIOS starting states
Corresponding fault message is converted to the display signal of display portion.In another embodiment of the present invention, running status is exported
Circuit is converted to the unique corresponding running status prompt message for entering running status after operating system for processor plate card
The display signal of display portion.
In one embodiment of the invention, non-I/O address 80h I/O address is 290h.
In one embodiment of the invention, the output intent further comprises running status output circuit monitoring control letter
Number and running state data is read from I/O address 80h through controlling according to control signal.
The embodiment of the present invention is different from I/O address 80h specific I/O address (such as 290h) by defining one and carried out
Fault cues and running status prompting, can avoid bringing the situation of miscue to user.Furthermore, it is possible to which improving user judges event
Hinder the efficiency and accuracy of point.
Brief description of the drawings
Fig. 1 shows the schematic block diagram of processor board according to an embodiment of the invention.
Fig. 2 shows the LED arrangement of Fig. 1 display circuit part 16.
Fig. 3 shows the principle schematic of running status output circuit according to an embodiment of the invention.
Periodic transfer form when Fig. 4 is the EPLD chip operations shown in Fig. 3 according to embodiments of the present invention.
Fig. 5 shows the schematic flow sheet of running status output intent according to an embodiment of the invention.
Embodiment
Following disclosure provides many different embodiments or example, to realize the different characteristic of the present invention.Describe below
The specific example of part and method and step is to simplify the disclosure.Certainly, these are only that example is not intended to limit.It should realize
Arrive, content disclosed herein can be applied in a variety of broad forms, and any specific structure disclosed herein and/
Or function is only descriptive.Based on content taught herein, it will be appreciated by those skilled in the art that can be independently of
Any other aspect realizes aspect disclosed herein, and can in many ways in these aspects it is two or more enter
Row combination.
In some existing applications, I/O address 80h is used for fault detect.For example, Intel meetings inside CPU
Trouble point is defined；And BIOS (Basic Input Output System, basic input and output) producer is also to trouble point
It is defined.However, because ununified trouble point defines standard, this causes the feelings of the multiple definition of trouble point correspondence
Shape.Moreover, also there is a situation where that a failure code occurs in multiple places in the prior art.For example：Locate in certain application
Reason device board faults point is parked in 65 positions.Fault bit defined in BIOS is equipped with CPU Cache, PCI peripheral hardwares, PCH etc..It is this
Compare vague definition so that can not judge current processor board in assorted exactly when being parked in 65 position in being run in board
Failure.The reason for operating personnel's failure judgement occurs for this causes difficulty.If carrying out failure item by item to processor plate card
Investigation, hence it is evident that waste time and energy.
The running status output circuit and processing board proposed according to embodiments of the present invention solves above-mentioned technical problem.
Fig. 1 shows the structural representation of processor board according to an embodiment of the invention.As shown in figure 1, should
Board 10 includes the cpu chip 12 being integrated on board 10 and the running status output circuit 14 being integrated on board 10.Operation
State output circuit 14 is electrically connected by bus with cpu chip 12.The cpu chip of the present invention can be Intel, AMD, Nvidia
Deng central processing unit or other there is the process chips of similar functions.Running status output circuit 14 is by separate lines with showing
Show that part 16 is electrically connected.According to an example of the present invention, running status output circuit 14 includes processing module 22.
According to an example of the present invention, display portion 16 includes LED and LED drive circuit.Further, LED
The side of the front panel 18 of board 10 can be arranged on and positioned at the top of pusher, to show running status output circuit 14
Output.The benefit for choosing the position is that LED is located at the top of processor board 10 when processor board is inserted vertically into cabinet
Point.The eye-catching display information for being easy to observe LED in position where so may be such that LED etc., and before processor board 10
The cable that panel 18 is drawn will not block LED.It will be appreciated by those skilled in the art that being used as the finger of running status using LED
Show an example of only display portion.Display portion is it is of course possible to 8 with other embodiments, such as two-way arrangement
Segment numeral pipe.In an alternative embodiment, display circuit part can also be LCDs.The example of these display portions all exists
In the range of this patent display portion.
According to one embodiment of present invention, the cpu chip 12 of processor board 10 will processor board start or
Write in BIOS start-up courses by the BIOS status informations set in specific I/O address, realize the defeated of init state
Go out.The status information is included for example for open state and/or unique corresponding fault message of BIOS starting states.Work as processing
On device board 10 after electricity operation, the running status of processor board 10 is sent in specific I/O address by cpu chip 12, the fortune
Row status data includes unique corresponding running status prompt message for example into running status after operating system.
According to one embodiment of present invention, the specific I/O address that non-I/O address 80h is exported as running status is chosen.
According to an example of the present invention, non-I/O address 80h specific I/O address is I/O address 290h.
First, I/O address 80h is the public I/O address of exploitation, and all producers can be written to data.Due to not
Definitions with producer are also inconsistent, may also be different so running code information (coding information exported after operation).In order to
The trouble point of decision processor board, operating personnel also need the definitions of cost time understanding different manufacturers.
Secondly, according to one embodiment of present invention, processor board is reflected using a running status output circuit
Board enters the running status in each stage after system is applied.However, processor plate card enters after system application, I/O address 80h
Output data will be used to.Because I/O address 80h is open I/O address, all programs can pass through I/O address 80h
Write operation is carried out, this can equally bring some problems.For example, peopleware is when calling standard library function, due to some marks
Containing the operation for writing I/O address 80h in quasi- built-in function, peopleware can be caused to take for the program of oneself and run to operation shape
The position that state output circuit is shown.
Therefore, embodiments in accordance with the present invention define a specific I/O address for being different from I/O address 80h (for example
290h) pointed out to carry out fault cues and running status.Further, inventor also defines the failure generation with unique relationships
Code, so may insure the specificity of I/O address and runs the uniqueness of code information, trouble point is found exactly.
It will be appreciated by those skilled in the art that after processor plate card enters operating system, it is contemplated that the specificity of software
With the accuracy of code, it ensure that by the new I/O address 290h specially opened up the running status outputs for entering line program operation
Specific I/O address is special, it is to avoid bring the situation of miscue to peopleware.
According to one embodiment of present invention, on processor board integrated operation state output circuit by being arranged on plate
The LED of the front panel of card is lighted or extinguishes to reflect the running status of processor board.The LED of setting can be 8.
In processor board start process or BIOS start-up courses, the running state information of processor board is put into and set by cpu chip
Fixed specific I/O ports 290h, running status output circuit reads I/O port 290h running state information, and controls display
Part is shown the running status of processor board by being arranged in the LED of front panel.User by with running status
The light on and off state of the LED of association is exported it is determined that whether board run location and work are good.
Fig. 2 shows the schematic diagram of the LED arrangement of display portion as shown in Figure 1.According to one of present invention implementation
Example, as shown in Fig. 2 display portion 16 includes 8 LEDs for being divided into two row arrangement, each column has 4 LEDs；Wherein, a row
LED shows high position data, and a row LED shows low data.H, L is taken to distinguish high-low-position, H is that high position data, L are lower-order digit
According to wherein 4 LED of a high position are designated H1, H2, H4 and H8,4 LED of low level are designated L1, L2, L4 and L8.Each LED is represented
The binary digit of diverse location, by the flicker of LED, is combined into different data, so as to represent corresponding predefined letter
Breath.
Table 1 shows Digital ID when LED lamp is bright.
Table 1：
| The bright label of LED | Digital ID | The bright label of LED | Digital ID |
| H1 | 1 | L1 | 1 |
| H2 | 2 | L2 | 2 |
| H1H2 | 3 | L1L2 | 3 |
| H4 | 4 | L4 | 4 |
| H4H1 | 5 | L4L1 | 5 |
| H4H2 | 6 | L4L2 | 6 |
| H4H2H1 | 7 | L4L2L1 | 7 |
| H8 | 8 | L8 | 8 |
| H8H1 | 9 | L8L1 | 9 |
| H8H2 | A | L8L2 | A |
| H8H2H1 | B | L8L2L1 | B |
| H8H4 | C | L8L4 | C |
| H8H4H1 | D | L8L4L1 | D |
| H8H4H2 | E | L8L4L2 | E |
| H8H4H2H1 | F | L8L4L2L1 | F |
Table 2 shows the failure code and fault message that LED lamp circuit part 16 can represent, 0 represents corresponding LED
For OFF state.
Table 2：
According to one embodiment of present invention, in processor board start process, running status output circuit is uninterrupted
Ground output data directly feeds back the start running status of processor board to display portion.
According to one embodiment of present invention, after processor plate card enters operating system, 20-FF 223 codes altogether
Mark is supplied to user, facilitates user's definition status to export.For example, for complicated system and multi-computer system, user can be with
The output of certain self-defined state, such as board identification, board work, board data receiver, board start；For whole complete machine
Under system, the state output of each board applicable cases.According to one embodiment of present invention, running status can for example be specified
The bright special applications for being expressed as client of some LED in output circuit；Certain several LED is bright, and to be expressed as some functions complete
Into.
Fig. 3 shows the circuit theory schematic diagram of running status output circuit according to an embodiment of the invention.Such as
Shown in Fig. 3, running status output circuit includes being used as processing module 22.According to an example of the present invention, processor module is
EPLD (erasable Programmadle logic device) chip.It will be understood by those skilled in the art that EPLD chips are defeated as running status
The processing module for going out circuit is only example, and processing module can also be realized by other kinds of fpga chip.In addition, operation shape
State output circuit can also be a device being independently arranged relative to processor board, and it is specially when processor board is tested
Use, be not integrated on processor board.
As shown in figure 3, according to one embodiment of present invention, EPLD chips have the bus signals input being connected with bus
End.Bus is connected to using bus signals input EPLD chips, and cpu chip is further connected to by bus.
Processor plate card by provide to EPLD chips bus-in singal type include reset signal BUF_RST_N,
Protocol signal LPC_FRAME_N, LPC_LAD0, LPC_LAD1, LPC_LAD2, LPC_LAD3 and clock signal clk；Wherein,
Reset signal BUF_RST_N is used for the reset of EPLD chips；Protocol signal LPC_FRAME_N is used to originate operating state signal
Transmission；And protocol signal LPC_LAD0, LPC_LAD1, LPC_LAD2, LPC_LAD3 (i.e. LPC_LAD [3..0]) are used to run shape
The transmission of state signal.
According to one embodiment of present invention, EPLD chips also have the control signal input being connected with control signal wire
End.Control signal GPIO is sent to the control signal input of EPLD chips by control signal wire.Input control signal GPIO
Selection available for control I/O address.For example, control signal GPIO judge when being high level carry data I/O address as
80h, control signal GPIO judge the I/O address for carrying data as 290h when being low level.
According to one embodiment of present invention, EPLD chips also have the display output end being connected with display circuit.Such as Fig. 3
Shown, EPLD chips include controlling 8 display output ends of 8 LEDs respectively.
In the embodiment shown in fig. 3, a part of pin of EPLD chips is defined as EBI, EPLD chips
Another part pin is defined as display interface.In another embodiment of the present invention, EBI or display interface can
To be respective self-existent interface.EBI and PLD are electrically connected as the pin portions of bus input end
Connect.Display interface is electrically connected with the pin portions as display signal output part of PLD.
According to one embodiment of present invention, the burning program that EPLD chips also include being connected with burning program part is used
End.Burning program circuit part is for the jtag circuit of the EPLD burning chip programs in running status output circuit.It can pass through
EPLD program code is written in EPLD chips by jtag interface.
According to one embodiment of present invention, the program code of storage part storage includes communication monitoring generation in EPLD chips
Code, decoding code and display output code.EPLD chips run the output of communication monitoring code monitors bus, and read CPU cores
The processor board running state data of piece write bus.EPLD chips operation decoding code obtains processor board running status
Data, and will parse and decoding running state data its progress is converted to the state of LED.EPLD chips run display output generation
Code obtains the state of LED, and the display signal of output control correspondence LED.
Fig. 4 is the work schedule schematic diagram when EPLD chip operations of embodiment are shown according to Fig. 3 of the present invention.Such as Fig. 4 institutes
Show, when signal LPC_FRAME_N from high to low when, show will there is new running status in bus, opened into LPC_LAD [3..0]
Beginning span line；When LPC_FRAME_N from low to high when, start LPC_LAD [3..0] span line, it is formal by I/O address 290h
Running state data is transmitted to EPLD chips.According to one embodiment of present invention, EPLD chips are write by I/O address 290h
Or realization of the realization of reading data with writing or reading data by I/O address 80h can be adopted in a like fashion.
According to one embodiment of present invention, the input electricity of EPLD chips operation communication monitoring code monitors GPIO port
It is flat.When it is low level to monitor control signal GPIO, the running status transmitted by cpu chip is read from I/O address 290h
Data.When it is high level to monitor control signal GPIO, the running status transmitted by cpu chip is read from I/O address 80h
Data, with fault message of the compatibility from I/O address 80h.So, the spirit that operation output circuit selects fault cues can be improved
Activity.
According to one embodiment of present invention, running status output circuit accesses LPC (the Low Pin of processor board
Count) in bus, the data mode of lpc bus is monitored, when the output I/O address of processor board is 290h or 80h,
Digital independent is got off and display circuit is output to after parsing by EPLD to be shown.Specifically, running status output circuit is supervised
The I/O address of lpc bus transmission is surveyed, and judges control signal for high level state or low level state.When control signal is
During low level state and when passing through the I/O address of bus transfer for 290h, running state data is read from I/O address 290h.
Running status output circuit understands lpc bus host-host protocol, is that the data in 290h explain by computer I/O address, defeated
Go out to such as LED display circuit and show.When control signal is high level state and the I/O address that passes through bus transfer is 80h
When, read data from I/O address 80h.Alternatively when in processor board simultaneously there is I/O address 290h and I/O address 80h
When, it can also be by the switch key specially set to switch the use of specific I/O address.
Fig. 5 is the flow chart of running status output intent according to an embodiment of the invention.As shown in figure 5, operation
State output method comprises the following steps：
S501, the cpu chip of processor board writes running state data in non-I/O address 80h I/O address.
According to one embodiment of present invention, the specific I/O address that non-I/O address 80h is exported as running status is chosen.
According to an example of the present invention, non-I/O address 80h specific I/O address is I/O address 290h.
According to one embodiment of present invention, cpu chip can be in start process and/or in BIOS start-up courses,
The running state information of processor board is written in I/O address 290h.The running state information includes being directed to open state
And/or unique corresponding fault message of BIOS starting states.According to one embodiment of present invention, cpu chip is in processor
Board enters after operating system, and the status information in each stage of operation program is write in I/O address 290h.The status information
Unique corresponding running status prompt message including entering running status after operating system.
S502, running status output circuit reads cpu chip transmission by bus from non-I/O address 80h I/O address
Running state data.
According to one embodiment of present invention, the data input or output that can pre-define processor board only use specific
I/O address, such as 290h.In another embodiment, in addition to using specific I/O address 290h, I/O address can be also retained simultaneously
80h function.
Specific I/O address 290h is defined in embodiments of the present invention, and defines failure code again, it is ensured that should
The specificity of address and the uniqueness for running code information.It will be understood by those skilled in the art that I/O address 290h is only example, it is fixed
The main purpose of adopted new I/O address is that, in order to be different from public I/O address, other disclosure satisfy that the board of the embodiment of the present invention
The I/O address that running status output is required is also to use.
S503, running status output circuit decoding running state data and the display signal for being converted to display portion.
S504, the display signal of running status output circuit output reflection running state data is shown to display portion
Show.
The running status output circuit designed according to embodiments of the present invention, it can be entirely disposed in certain of processor board
Individual position.In embodiments of the present invention, by using running status output circuit, so (plate is applied from board start to system
Card enters after system), user can recognize that each stage of board and board in operation program.When in complicated system or many
In machine system, the output of certain status display, such as board identification, board work, board data receiver and board start, and,
Under whole machine system, the status display output of each board applicable cases, can be very by running status output circuit
Easily complete.
It should be appreciated that can here be retouched with hardware, software, firmware, middleware, code or its any appropriate combination to realize
The embodiment stated.Realized for hardware, processor can be realized in one or more the following units：Application specific integrated circuit
(ASIC), digital signal processor (DSP), digital signal processing appts (DSPD), PLD (PLD), scene can
Program gate array (FPGA), processor, controller, microcontroller, microprocessor, designed for realizing functions described herein
Other electronic units or its combination.
The feature of several embodiments be foregoing has outlined so that those skilled in the art can preferably understand the aspect of the disclosure.
It should be understood by those skilled in the art that they can be easily using designing or change other techniques and knot based on the disclosure
Same advantage of the structure to carry out identical purpose and/or realize the embodiment introduced herein.Those skilled in the art it should also be appreciated that
This equivalent constructions are without departing from spirit and scope of the present disclosure, and they are without departing from spirit and scope of the present disclosure
In the case of can do various changes, instead of and change.
Claims (17)
1. a kind of running status output circuit, including：
EBI, it is connected to bus；
Display interface, it is connected to display portion；And,
Processing module, it is configured as reading running state data from non-I/O address 80h I/O address by the bus,
The running state data is converted to the display signal of the display portion, and exports the institute for reflecting the running state data
State the display signal of display portion.
2. output circuit according to claim 1, wherein, the running status output circuit or the processing module include
Memory, it stores the running state data, and the running state data includes starting shape for open state and/or BIOS
Unique corresponding fault message of state；And/or, into operating system after running status unique corresponding running status prompting letter
Breath.
3. output circuit according to claim 1 or 2, wherein, the I/O address of the non-I/O address 80h is I/O address
290h。
4. output circuit according to claim 1 or 2, wherein, the processing module includes PLD.
5. output circuit according to claim 4, wherein, the processing module also includes memory, its storage program generation
Code, described program code includes communication monitoring code, decoding code and display output code；Wherein,
Communication monitoring code is configured operation to monitor the output of bus and read running state data；
Decoding code is configured operation and changed with obtaining running state data and parsing and decode running state data
For the status data of display portion；And,
Display output code is configured operation to obtain the status data of display portion and the display signal of output display part.
6. output circuit according to claim 5, wherein, the processing module includes the control being connected with control signal wire
Signal input part；Communication monitoring code is configured operation to monitor the control signal of control signal input, and according to described
Control signal reads running state data through controlling from I/O address 80h.
7. a kind of processor board, including：
Bus；
Cpu chip, it is configured as in the start of processor board and/or BIOS start-up courses status bit message writing non-I/
In O addresses 80h I/O address；
Running status output circuit, it is electrically connected by the bus with the cpu chip, the running status output circuit bag
Include：
EBI, it is connected to bus；
Display interface, it is connected to display portion；And
Processing module, it is configured as reading running state data from non-I/O address 80h I/O address by bus, by institute
State running state data and be converted to the display signal of the display portion, and export the described aobvious of the reflection running state data
Show the display signal of part.
8. processor board according to claim 7, wherein, the running state data includes being directed to the processor plate
Unique corresponding fault message of card open state or BIOS starting states, the processing module is configured as the place
Unique corresponding fault message of reason device board open state or BIOS starting states is converted to the control signal of display portion.
9. processor board according to claim 7, wherein, the processing module is configured as on processor board electric
The running state data of the processor board is transferred in the I/O address of the non-I/O address 80h after operation.
10. processor board according to claim 9, wherein, the running state data includes being directed to the processor
Board enter operating system after running status unique corresponding running status prompt message, the processing module be configured as by
The unique corresponding running status prompt message for entering running status after operating system for the processor plate card is converted to aobvious
Show the display signal of part.
11. processor board according to claim 7, wherein, the I/O address of the non-I/O address 80h is 290h.
12. processor board according to claim 7, wherein, the processor board also includes display portion.
13. processor board according to claim 12, wherein, the display portion is included with 8 LED of two row arrangements
Lamp or 8 segment numeral pipes, wherein, often it is classified as 4 LEDs or charactron；Wherein described 8 LEDs or 8 segment numeral pipes are arranged on institute
State the front panel side of processor board and above the pusher of the processor board.
14. a kind of running status output intent, methods described includes：
The cpu chip that running status output circuit passes through bus reading processor board from non-I/O address 80h I/O address
The running state data of transmission；
The running status output circuit is converted to the running state data display signal of display portion；And,
The display signal of the display portion of the running status output circuit output reflection running state data.
15. output intent according to claim 14, wherein, the running status output circuit is by the running status number
Include according to the display signal for being converted to display portion：Shape will be started for the open state of the processor board and/or BIOS
Unique corresponding fault message of state or for the processor plate card enter operating system after running status it is unique corresponding
Running status prompt message is converted to the display signal of display portion.
16. output intent according to claim 14, wherein, the I/O address of the non-I/O address 80h is 290h.
17. output intent according to claim 14, further comprises：The running status output circuit monitoring control letter
Number and running state data is read from the non-I/O address 80h through controlling according to the control signal.
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