CN107085333A - A kind of array base palte and display panel - Google Patents
A kind of array base palte and display panel Download PDFInfo
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- CN107085333A CN107085333A CN201710546281.4A CN201710546281A CN107085333A CN 107085333 A CN107085333 A CN 107085333A CN 201710546281 A CN201710546281 A CN 201710546281A CN 107085333 A CN107085333 A CN 107085333A
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- array base
- base palte
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- electrode
- signal wire
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13456—Cell terminals located on one side of the display only
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of array base palte, with viewing area and the non-display area around the viewing area, and the viewing area is provided with gate line and data wire, wherein, in addition to：Fanout area, is arranged on the non-display area；At least one signal wire, extends in the first direction, and the first direction points to the viewing area by the fanout area；At least one binding terminal, the binding terminal is used to bind drive circuit；Wherein, the first end of the binding terminal electrically connects the signal wire, and the second end of the binding terminal electrically connects calibrating terminal by the first lead；The first lead described in signal wire described at least one or at least one is provided between the binding terminal；Electrode is covered covered with one layer on the signal wire in region or first lead between the binding terminal, and the covering electrode is electrically insulated with the signal wire or first lead.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of array base palte and display panel.
Background technology
At present, in display panel, drive circuit passes through the driving pin carried and the binding in display panel non-display area
Terminal carries out binding and realizes that electrical connection, i.e. pin and binding terminal correspond and realize pressing.
Being located at non-display area binding terminal more, and in non-display area, coherent signal line is more, connects up more intensive.Driving
In the engineering of dynamic circuit binding, because there is process deviation, position can be produced because of deviation by binding the pin of terminal and drive circuit
Fluctuation.In addition, if the line wiring of binding terminal ambient signal is more intensive, meeting is in the case of process deviation so that drive circuit
Pin locations overlapped with signal wire, in bonding processes pin can power effect push wear insulating barrier so as to signal wire short circuit,
Cause display abnormal.
Meanwhile, because of binding terminal itself design problem, it also has indium oxide layer tin thin film compared to general signal line,
This has resulted in binding terminal and has not also easily caused Mura phenomenons in a plane, bonding processes with signal wire.
In order to solve problem present in existing design, the mode that uses more now be ensure signal line wiring with it is adjacent
The distance between terminal is bound, in the case of process deviation, short circuit phenomenon can be prevented.But, because of present signal wire increasingly
It is many and consumer is also increasing to the demand of narrow frame, it is ensured that more problem has occurred in the design of certain distance.
The content of the invention
To solve the above problems, the present invention provides a kind of array base palte, with viewing area with surrounding the non-of the viewing area
Viewing area, the viewing area is provided with gate line and data wire, wherein, in addition to：
Fanout area, is arranged on the non-display area；
At least one signal wire, extends in the first direction, and the first direction points to the viewing area by the fanout area；
At least one binding terminal, the binding terminal is used to bind drive circuit；Wherein, the first of the binding terminal
The end electrical connection signal wire, the second end of the binding terminal electrically connects calibrating terminal by the first lead；
Lead described in signal wire described at least one or at least one is provided between the binding terminal；The binding
Between terminal electrode, and the electrode and the signal are covered on the signal wire or the lead in region covered with one layer
Line or lead electric insulation.
On the other hand, a kind of display panel, including a kind of array base palte described above are also provided.
Compared with prior art, technical scheme has one of the following advantages：The binding terminal of fanout area and letter
Number line is set with floor.The first end electrical connection signal wire of terminal is bound, the second end electrically connects calibrating terminal, test lead by lead
Son can be used for whether data wire tested in viewing area etc. occurs exception.In addition, being provided with letter between adjacent two bindings terminal
At least two in number line or lead, covering electricity is provided with the signal wire or lead of adjacent two binding terminals corresponding region
Pole, covering electrode is electrically insulated with signal wire or lead.By set covering electrode, can process deviation permission in the case of,
The pin of the binding electrode and drive circuit of binding terminal can produce position deviation, and when position deviation occurs, pin is not
It can be pressed because of pressing and wear insulating barrier.Now, pin can with covering electrode contact, covering electrode can effectively protection signal line or
First lead is not short-circuited.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of floor map of array base palte provided in an embodiment of the present invention；
Fig. 2 is a kind of partial schematic diagram of the fanout area of array base palte provided in an embodiment of the present invention；
Fig. 3 is the partial schematic diagram of the fanout area of another array base palte provided in an embodiment of the present invention；
Fig. 4 is a kind of diagrammatic cross-section of the fanout area of array base palte provided in an embodiment of the present invention；
Fig. 5 is a kind of cross-sectional view of array base palte provided in an embodiment of the present invention；
Fig. 6 is the cross-sectional view of another array base palte provided in an embodiment of the present invention；
Fig. 7 is the cross-sectional view of another array base palte provided in an embodiment of the present invention；
Fig. 8 is a kind of diagrammatic cross-section of display panel provided in an embodiment of the present invention；
Fig. 9 is a kind of floor map of display panel provided in an embodiment of the present invention.
Embodiment
A kind of array base palte and display panel of the present invention are described in more detail with reference to schematic diagram, wherein table
Show the preferred embodiments of the present invention, it should be appreciated that those skilled in the art can change invention described herein, and still
Realize the advantageous effects of the present invention.Therefore, description below is appreciated that for the widely known of those skilled in the art, and
It is not intended as limitation of the present invention.
The term used in embodiments of the present invention is the purpose only merely for description specific embodiment, and is not intended to be limiting
The present invention." one kind ", " described " and "the" of singulative used in the embodiment of the present invention and appended claims
It is also intended to including most forms, unless context clearly shows that other implications.
The present invention provides a kind of array base palte, with viewing area and the non-display area around the viewing area,
The viewing area is provided with gate line and data wire, wherein, in addition to：
Fanout area, is arranged on the non-display area；
At least one signal wire, extends in the first direction, and the first direction points to the viewing area by the fanout area；
At least one binding terminal, the binding terminal is used to bind drive circuit；Wherein, the first of the binding terminal
The end electrical connection signal wire, the second end of the binding terminal electrically connects calibrating terminal by the first lead；
Lead described in signal wire described at least one or at least one is provided between the binding terminal；The binding
Between terminal electrode, and the electrode and the signal are covered on the signal wire or the lead in region covered with one layer
Line or lead electric insulation.
As shown in figure 1, Fig. 1 is a kind of floor map of array base palte provided in an embodiment of the present invention.Array base palte 1 has
There is the viewing area AA and non-display area NAA around viewing area AA.Gate line 12 is provided with the AA of viewing area, for controlling array
The conducting and shut-off of thin film transistor (TFT) in substrate 1, are additionally provided with data wire 11, for the pixel electrode into array base palte 1
Input shows signal.Viewing area AA is provided with fanout area F to the non-display area NAA regions that X extends in the first direction, the fanout area
F is located at non-display area NAA.As illustrated, fanout area F is located at the non-display area NAA of array base palte short brink.
Signal wire 2 is provided with the F of fanout area, X's signal wire 2 extends in the first direction.Specifically, first direction X is by fanning
Go out area F and point to viewing area AA.Signal wire 2 mainly electrically connects the data wire 12 in the AA of viewing area, for will be in drive circuit 5 show
Show that signal is transmitted to data wire 11.
In the F of fanout area, binding terminal 23 is additionally provided with, as shown in Fig. 2 Fig. 2 is one kind provided in an embodiment of the present invention
The partial schematic diagram of the fanout area of array base palte.With reference to Fig. 1 and Fig. 2, the fanout area F in array base palte 1 is provided with least one
Terminal 23 is bound, binding terminal 23 is used to bind drive circuit 5.Specifically, binding terminal 23 has two ends, first end electrical connection
Signal wire 2, the second end electrically connects the first lead 6, and the first lead 6 is also electrically connected (not shown) with calibrating terminal.
Wherein, calibrating terminal be mainly used in test viewing area signal wire whether occur short circuit or open circuit conditions.
Specifically, being provided with least one signal wire 2 or at least one the first leads 6 between adjacent binding terminal 23.
As shown in Fig. 2 by taking middle row binding terminal 23 as an example, being set between first binding terminal 23 and second binding terminal 23
There are two signal lines 2, first lead 6.Wherein, two bindings in the region that two binding terminals 23 are correspondingly arranged, such as accompanying drawing
In the corresponding region in the long side of terminal 23, covered with one layer of covering electrode 7 on the lead 6 of signal wire 2 or first, and the covering electrode
7 are electrically insulated with the lead 6 of signal wire 2 or first.In Fig. 2 embodiments, bind in the long side corresponding region of terminal 23, two signal lines 2
With covering one layer of covering electrode 7 on the first lead 6.By setting covering electrode 7, drive circuit bonding processes can be effectively prevented
In, the pin of drive circuit is pressed onto the lead 6 of signal wire 2 or first because of contraposition deviation, causes signal wire short circuit.Cover electrode
7 setting serves the effect of the lead 6 of protection signal line 2 and first.
Specifically, as shown in figure 3, Fig. 3 is the part of the fanout area of another array base palte provided in an embodiment of the present invention
Schematic diagram, Fig. 3 is specifically shown between signal wire 2, the first lead 7, binding electrode 3, covering electrode 7 and calibrating terminal 4
Annexation.In the F of fanout area, at least two composition signal line groups adjacent to each other in the lead 6 of signal wire 2 or first are tied up
Fixed end 3 is arranged between two groups of signal line groups.For example in accompanying drawing, between the first row binding terminal 3, signal wire 2 is constituted two-by-two
Signal line group；Between second row binding terminal 3, a signal line 2 and the first lead 6 composition signal line group；The third line is tied up
Between fixed end 3, the first lead 6 constitutes signal line group two-by-two.
Specifically, X bearing of trend in the first direction, fanout area F binds terminal 3 at least provided with three rows.Fig. 3 is merely exemplary
Depict three rows binding terminal 3, can be actually four rows or five-element etc., not limit herein.Also, adjacent rows are bound
Terminal 3 is interlaced with each other to be set, i.e. the first row binding terminal 3 and the second row binding terminal 3 is interlaced with each other, the second row binding terminal 3
Interlaced with each other with the third line binding terminal 3, the first row binds terminal 3 and the third line binding terminal 3 is interlaced with each other.
Fig. 4 is a kind of diagrammatic cross-section of the fanout area of array base palte provided in an embodiment of the present invention, and Fig. 4 is empty along Fig. 3
Obtained by line section view.Binding terminal 3 is set on array base palte 1, and binding terminal 3 is set with signal wire 2 with layer.In addition, binding end
Son 3 can also be set with the first lead 6 with layer.Terminal 3 and the lead 6 of signal wire 2 and first are bound in exemplary the showing of accompanying drawing
Situation about being set with layer.Specifically, side of the binding terminal 3 away from array base palte 1 is provided with insulating barrier 31, insulating barrier 31 is remote
From array base palte 1 side be provided with binding electrode 32, and binding electrode 32 and binding terminal 3 between electricity is realized by via 33
Connection.Specifically, insulating barrier 31 covers the lead 6 of signal wire 2 and first.On the one hand the setting of insulating barrier plays insulating effect, prevents
Only contacted in drive circuit bonding processes with the lead 6 of signal wire 2 or first, on the other hand play the role of to planarize fanout area,
Ensure that fanout area can guarantee that a plane, prevent because of the uneven of film layer structure and caused by contraposition deviation.
In addition, binding electrode 32 is on the direction perpendicular to array base palte 1, binding terminal 3 is completely covered.With reference to Fig. 3 with
Fig. 4, can set multiple vias 32 between binding terminal 3 and binding electrode 32, set multiple vias 32 preferably to realize
Electrical connection, it is ensured that the electrical connection effect of drive circuit and binding terminal 3.Specifically, covering electrode 7 is set with binding electrode 32 with layer
Put, manufacturing process can be reduced to a certain extent and thicknesses of layers is reduced.Further, covering electrode 7 and binding electrode
32 same layers, preferably realize the planarization of fanout area, are conducive to the contraposition in driving electrodes binding procedure, also prevent to a certain degree
The Mura phenomenons stopped pressing unbalance stress and caused.
Fig. 5 is a kind of cross-sectional view of array base palte provided in an embodiment of the present invention, the viewing area of array base palte 1
AA is provided with gate line 12 (i.e. grid) and data wire 11 (i.e. a pole of source-drain electrode), and grid constitutes viewing area with source-drain electrode
Thin film transistor switch, for controlling the signal of viewing area to input.In addition, pixel electrode P is realized by via with data wire 11
Electrical connection, when thin film transistor (TFT) is turned on, display signal is transmitted to pixel electrode P through data wire 11.Viewing area AA is additionally provided with
Public electrode C, public electrode C receive the common signal of drive circuit transmission, with pixel electrode p-shaped into electric field to control liquid crystal point
The rotation of son.Specifically, public electrode C can be shown disposed on pixel electrode P top, Top-Com structures are formed, also may be used
To be that pixel electrode P is located at formation Mid-Com structures above public electrode C, do not limit herein.
Specifically, binding electrode 3 and signal wire 2 can be set with gate line 12 with layer, covering electrode 7 and binding electrode
32 can be set with data wire 11 or pixel electrode P or public electrode C any one layer with layer.Signal exemplary Fig. 5
The situation that binding electrode 32 and covering electrode 7 are set with layer with data wire 11.The multiplex data line layer metal of electrode 7 is covered,
Play a protective role.
Fig. 6 is the cross-sectional view of another array base palte provided in an embodiment of the present invention, and Fig. 6 and Fig. 5's is basic
Structure is similar, and similarity is repeated no more, and distinctive points are that bind electrode 32 is set with covering electrode 7 and pixel electrode P with layer,
The multiplexing pixel electrode layer of electrode 7 is covered, protective effect can be effectively played, while not increasing thicknesses of layers.
Fig. 7 is the cross-sectional view of another array base palte provided in an embodiment of the present invention, and Fig. 7 and Fig. 5's is basic
Structure is similar, and similarity is repeated no more, and distinctive points are that bind electrode 32 is set with covering electrode 7 and public electrode C with layer,
The multiplexing common electrode layer of electrode 7 is covered, protective effect can be effectively played, while not increasing thicknesses of layers.
Specifically, in any of the above-described embodiment, the material of covering electrode can be metal or transparent membrane, wherein, can
To be tin indium oxide.In addition, the material of binding electrode can also be metal or transparent membrane, wherein it is possible to be tin indium oxide.
In the present embodiment, because of the presence of covering electrode, it need not be examined between signal wire or between signal wire and binding terminal
Consider needs reserved offset distance because pressing aligning accuracy problem.Between signal wire or between signal wire and binding terminal
It is smaller that distance can be set, and the pin of drive circuit will not be pressed onto signal wire or the first lead because of contraposition deviation.Cover
Lid electrode can effectively prevent the pin of above-mentioned circuit driven circuit from pressing to and occurring short circuit.
Fig. 8 is a kind of diagrammatic cross-section of display panel provided in an embodiment of the present invention, and display panel includes array base palte 1
With counter substrate 10, counter substrate 10 is oppositely arranged with array base palte 1.Specifically, between counter substrate 10 and array base palte 1 also
It is provided with liquid crystal layer.
Fig. 9 is a kind of floor map of display panel provided in an embodiment of the present invention, provided in an embodiment of the present invention aobvious
Show that panel includes the array base palte 1 described in any embodiment of the present invention, it can be mobile phone as shown in Figure 9, or
The display panel of computer, television set, Intelligent worn device etc., the present embodiment is not particularly limited to this.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (15)
1. a kind of array base palte, with viewing area and the non-display area around the viewing area, the viewing area is provided with grid
Line and data wire, wherein, in addition to：
Fanout area, is arranged on the non-display area；
At least one signal wire, extends in the first direction, and the first direction points to the viewing area by the fanout area；
At least one binding terminal, the binding terminal is used to bind drive circuit；Wherein, the first end electricity of the binding terminal
The signal wire is connected, the second end of the binding terminal electrically connects calibrating terminal by the first lead；
The first lead described in signal wire described at least one or at least one is provided between the binding terminal；The binding
Covered with one layer of covering electrode on the signal wire in region or first lead between terminal, and the covering electrode with
The signal wire or first lead electric insulation.
2. a kind of array base palte as claimed in claim 1, wherein, in the fanout area, the signal wire or described first draw
At least two composition signal line groups adjacent to each other in line, the binding terminal is arranged between signal line group described in two groups.
3. a kind of array base palte as claimed in claim 1, wherein, the binding terminal is set with the signal wire with layer.
4. a kind of array base palte as claimed in claim 3, wherein, the side of the binding terminal away from array base palte is provided with
Insulating barrier, side of the insulating barrier away from the array base palte is provided with binding electrode, the binding electrode and the binding
Terminal is realized by via and electrically connected.
5. as claimed in claim 4 with a kind of array base palte, wherein, the insulating barrier covers the signal wire and described first
Lead.
6. a kind of array base palte as claimed in claim 4, wherein, on the direction perpendicular to array base palte, the binding electricity
The binding terminal is completely covered in pole.
7. a kind of array base palte as claimed in claim 4, wherein, the covering electrode is set with the binding electrode with layer.
8. a kind of array base palte as claimed in claim 4, wherein, the material of the binding electrode is tin indium oxide.
9. a kind of array base palte as claimed in claim 3, wherein, the binding electrode and the signal wire and the gate line
Set with layer.
10. a kind of array base palte as claimed in claim 9, wherein, the array base palte also includes pixel electrode and common electrical
Pole, the covering electrode is set with the data wire or the pixel electrode or the public electrode with layer.
11. a kind of array base palte as claimed in claim 1, wherein, along the first direction, the fanout area is provided with least
Three rows bind terminal, and the setting interlaced with each other of adjacent rows binding terminal.
12. a kind of array base palte as claimed in claim 1, wherein, the signal wire is corresponded with the data wire and is electrically connected
Connect.
13. a kind of array base palte as claimed in claim 1, wherein, the material of the covering electrode is tin indium oxide.
14. a kind of display panel, including a kind of array base palte as described in claim 1 to 13 is any.
15. a kind of display panel as claimed in claim 14, in addition to counter substrate, the counter substrate and the array base
Plate is oppositely arranged.
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| CN201710546281.4A CN107085333B (en) | 2017-07-06 | 2017-07-06 | Array substrate and display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710546281.4A CN107085333B (en) | 2017-07-06 | 2017-07-06 | Array substrate and display panel |
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