CN106935600B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN106935600B CN106935600B CN201710349049.1A CN201710349049A CN106935600B CN 106935600 B CN106935600 B CN 106935600B CN 201710349049 A CN201710349049 A CN 201710349049A CN 106935600 B CN106935600 B CN 106935600B
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- signal line
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- insulating layer
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- 238000002161 passivation Methods 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 239000010409 thin film Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims 1
- 238000011056 performance test Methods 0.000 abstract description 8
- 238000005260 corrosion Methods 0.000 abstract description 4
- 230000007797 corrosion Effects 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 89
- 238000006056 electrooxidation reaction Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a display panel and a display device, which are used for realizing the bad analysis and performance test of signal wires on the premise of avoiding the corrosion of the signal wires in the display panel. The display panel comprises a substrate, a first signal line, an insulating layer, a second signal line and a passivation layer, wherein the first signal line, the insulating layer, the second signal line and the passivation layer are sequentially arranged on the substrate, the second signal line is electrically connected with the first signal line through a first via hole arranged in the insulating layer, and the display panel further comprises: the conductive layer is arranged on the passivation layer and is electrically connected with the second signal line through a second through hole in the passivation layer.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the development of Display devices, consumers are more favored to high-end Display devices, and the demand is increasing, especially for higher-definition and narrower-frame Display devices, and TFT-LCD (Thin film transistor-Liquid Crystal Display) factories are continuously improving the design and manufacturing process in order to meet the demands of consumers. In order to meet the requirements of high-end displays, the borders of the displays are made narrower and narrower, but when the purpose of via transition is achieved, the problem is a reliability problem, and manufacturers cannot fully evaluate the risk level of the vias by means of an untrusted test, so that a part of the risk screen flows into the market, and then serious consequences of customer complaints, exchange of goods, return of goods and order cancellation are possible.
Currently, two modes are designed for product switching of a shift register (GOA) narrow frame in a TN screen frame area:
the first is a switching design using indium tin oxide semiconductor transparent conductive film (ITO) bonding. For example, referring to fig. 1, the display panel sequentially includes: substrate base plate 01, grid line 02, grid insulating layer (GI)03, data line 04 and passivation layer (PVX)05, display panel still includes transparent conducting layer 06 of setting on passivation layer 05, and wherein, display panel still includes: the first via hole 1 penetrating the passivation layer 05, and the second via hole 2 penetrating the passivation layer 05 and the gate insulating layer 03, and the transparent conductive layer 06 electrically connects the gate line 02 and the data line 04 through the first via hole 1 and the second via hole 2.
The transparent conducting layer plays a role in signal transmission, and signals in the transparent conducting layer are large voltage and large current, so that conditions for electrochemical corrosion are easily created.
The design of the present product of second kind carries out signal transmission through using the GI via hole, can effectual isolated external steam and impurity contact like this, can effectually prevent the electrochemical corrosion problem. For example, referring to fig. 2, the display panel sequentially includes: a substrate 01, a gate line 02, a gate insulating layer (GI)03, a data line 04, and a passivation layer (PVX)05, wherein the data line 04 is electrically connected to the gate line 02 through a via hole three 3 provided in the gate insulating layer (GI) 03.
However, this design cannot effectively monitor the output signal of the GOA area, and it is very difficult or even impossible to perform the bad analysis and performance test.
In summary, when the display panel in the prior art implements the narrow frame design, it is impossible to implement the bad analysis and performance test on the signal lines on the premise of avoiding the corrosion of the signal lines in the display panel.
Disclosure of Invention
The invention provides a display panel and a display device, which are used for realizing the bad analysis and the performance test of a signal wire on the premise of avoiding the corrosion of the signal wire in the display panel.
The embodiment of the invention provides a display panel, which comprises a substrate base plate, a first signal wire, an insulating layer, a second signal wire and a passivation layer, wherein the first signal wire, the insulating layer, the second signal wire and the passivation layer are sequentially arranged on the substrate base plate, the second signal wire is electrically connected with the first signal wire through a first through hole arranged in the insulating layer, and the display panel further comprises:
the conductive layer is arranged on the passivation layer and is electrically connected with the second signal line through a second through hole in the passivation layer.
In a possible implementation manner, in the display panel provided by the embodiment of the present invention, projections of the first via and the second via on the substrate do not overlap.
In a possible implementation manner, in the display panel provided by the embodiment of the present invention, the display panel further includes a thin film transistor, and the thin film transistor includes, in a direction sequentially away from the substrate base plate:
the gate electrode, the gate insulating layer, the active layer, and the source and drain electrodes.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the first signal line and the gate are disposed in the same layer.
In a possible implementation manner, in the display panel provided by the embodiment of the present invention, the first signal line includes a scan line.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the second signal line and the source/drain electrode are disposed in the same layer.
In a possible implementation manner, in the display panel provided by the embodiment of the present invention, the second signal line includes a data line.
In a possible implementation manner, in the display panel provided by the embodiment of the present invention, a material of the conductive layer is a transparent conductive material.
Correspondingly, the embodiment of the invention also provides a display device which comprises any one of the display panels provided by the embodiment of the invention.
The invention has the following beneficial effects:
the display panel provided by the embodiment of the invention comprises a substrate, a first signal line, an insulating layer, a second signal line, a passivation layer and a conducting layer, wherein the first signal line, the insulating layer, the second signal line and the passivation layer are sequentially arranged on the substrate, the conducting layer is arranged on the passivation layer, the second signal line is electrically connected with the first signal line through a first through hole arranged in the insulating layer, and the conducting layer is electrically connected with the second signal line through a second through hole in the passivation layer. Therefore, in the display panel provided by the embodiment of the invention, the electric signal in the first signal line is transmitted to the second signal line by using the via hole arranged in the insulating layer, so that the passivation layer arranged above the second signal line can effectively isolate external moisture and impurities, and on the other hand, in consideration of the monitoring problem of signal output, the embodiment of the invention leads the electric signal in the second signal line to the surface by arranging the second via hole in the passivation layer in a lap joint mode of the conducting layer, and only large voltage does not have the function of large current in the conducting layer. Therefore, the display panel in the embodiment of the invention can effectively improve the problem of electrochemical corrosion and can simultaneously meet the aims of poor analysis and performance test of the signal line.
Drawings
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art;
FIG. 2 is a schematic diagram of another prior art display panel;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 4 is a schematic top view of a display panel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a second display panel according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, the present invention is further described with reference to the accompanying drawings and examples. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their repetitive description will be omitted. The words expressing the position and direction described in the present invention are illustrated in the accompanying drawings, but may be changed as required and still be within the scope of the present invention. The drawings of the present invention are only for illustrating the relative positional relationship, the layer thicknesses of some parts are exaggerated in a drawing manner for easy understanding, and the layer thicknesses in the drawings do not represent the proportional relationship of the actual layer thicknesses.
It should be noted that in the following description, specific details are set forth in order to provide a thorough understanding of the present invention. The invention can be implemented in a number of ways different from those described herein and similar generalizations can be made by those skilled in the art without departing from the spirit of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed below. As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present.
The invention provides a display panel and a display device, which are used for realizing the bad analysis and the performance test of a signal wire on the premise of avoiding the corrosion of the signal wire in the display panel.
The following describes in detail a specific embodiment of a display panel and a display device according to an embodiment of the present invention with reference to the drawings.
The thicknesses and shapes of the various film layers in the drawings are not to be considered true proportions, but are merely intended to illustrate the present invention.
Referring to fig. 3, a display panel provided in an embodiment of the present invention includes: the signal line structure comprises a substrate base plate 01, a first signal line 11, an insulating layer 12, a second signal line 13 and a passivation layer 05 which are sequentially arranged on the substrate base plate, and a conductive layer 14 arranged on the passivation layer 05, wherein the second signal line 13 is electrically connected with the first signal line 11 through a first through hole 21 arranged in the insulating layer 12, and the conductive layer 14 is electrically connected with the second signal line 13 through a second through hole 22 arranged in the passivation layer 05.
It should be noted that the display panel in the embodiment of the present invention includes a display region and a frame region, the first via and the second via in the present invention are disposed in the frame region of the display panel, and the first signal line 11, the insulating layer 12, the second signal line 13, and the passivation layer 05, and the conductive layer 14 disposed on the passivation layer 05 may be disposed in the frame region of the display panel, and may also be disposed in the display region.
For example, referring to fig. 4, a schematic top view of a display panel in an embodiment of the invention, and a schematic cross-sectional view of fig. 3 cut along the direction of O-O1 are shown. In fig. 4, the first via 21 and the second via 22 may be overlapped with each other, and fig. 4 only illustrates that the projections of the first via and the second via on the substrate do not overlap with each other, and the projections of the first via and the second via on the substrate in the display panel of the present invention may also overlap with each other. And is not particularly limited herein.
In the display panel provided by the embodiment of the invention, the electric signal in the first signal line is transmitted to the second signal line through the via hole arranged in the insulating layer, so that the external water vapor and impurities can be effectively isolated through the passivation layer arranged above the second signal line; on the other hand, in consideration of the monitoring problem of signal output, the embodiment of the invention leads the electric signal in the second signal line out to the surface in a mode of overlapping the conductive layer by arranging the second through hole in the passivation layer, and only large voltage does not have the function of large current in the conductive layer. Therefore, the display panel in the embodiment of the invention can effectively improve the problem of electrochemical corrosion and can simultaneously meet the aims of poor analysis and performance test of the signal line.
In a specific embodiment, in the display panel provided by the embodiment of the present invention, referring to fig. 3 or fig. 4, the projections of the first via 21 and the second via 22 on the substrate base 01 do not overlap. Specifically, the positions of the first via and the second via are not particularly limited, and the first via and the second via may be disposed above the first via when the second via is disposed, so that the first via and the second via overlap each other.
In an embodiment, in the display panel provided in the embodiment of the present invention, referring to fig. 5, the display panel further includes a thin film transistor, and the thin film transistor includes, in a direction sequentially away from the substrate base plate 01: a gate electrode 31, an insulating layer 12, an active layer 32, and a source/drain electrode 33. The insulating layer 12 may be a gate insulating layer or an interlayer insulating layer, and is not particularly limited herein. The thin film transistor in the embodiment of the present invention may be a thin film transistor disposed in the display area, or may be a thin film transistor disposed in the shift register unit in the frame area, which is not limited herein. The thin film transistor may have a top gate structure or a bottom gate structure, and only the bottom gate structure is taken as an example here.
In an embodiment, in the display panel provided in the embodiment of the present invention, referring to fig. 5, the first signal line 11 and the gate are disposed in the same layer.
In an embodiment, in the display panel provided in the embodiment of the present invention, the first signal line 11 includes a scan line. Specifically, the first signal line may be a scan line, or may be another signal line disposed in the same layer as the gate electrode.
In a specific embodiment, in the display panel provided in the embodiment of the present invention, referring to fig. 5, the second signal line 13 and the source/drain are disposed in the same layer.
In an embodiment, in the display panel provided in the embodiment of the present invention, the second signal line 13 includes a data line. Specifically, the second signal line may be a data line, or may be another signal line disposed in the same layer as the source/drain.
In a specific embodiment, in the display panel provided in the embodiment of the present invention, a material of the conductive layer is a transparent conductive material. Specifically, the conductive layer may be made of a transparent conductive layer material, such as indium tin oxide, or may be made of a metal material, which is not limited herein.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, including any one of the display panels provided in the embodiments of the present invention. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a notebook computer, a digital photo frame, a navigator and the like. The display device can be implemented by referring to the above embodiments of the display panel, and repeated descriptions are omitted.
In summary, an embodiment of the present invention provides a display panel, which includes a substrate, a first signal line, an insulating layer, a second signal line, a passivation layer, and a conductive layer disposed on the passivation layer, wherein the first signal line, the insulating layer, the second signal line, the passivation layer, and the conductive layer are sequentially disposed on the substrate, the second signal line is electrically connected to the first signal line through a first via hole disposed in the insulating layer, and the conductive layer is electrically connected to the second signal line through a second via hole disposed in the passivation layer. Therefore, in the display panel provided by the embodiment of the invention, the electric signal in the first signal line is transmitted to the second signal line by using the via hole arranged in the insulating layer, so that the passivation layer arranged above the second signal line can effectively isolate external moisture and impurities, and on the other hand, in consideration of the monitoring problem of signal output, the embodiment of the invention leads the electric signal in the second signal line to the surface by arranging the second via hole in the passivation layer in a lap joint mode of the conducting layer, and only large voltage does not have the function of large current in the conducting layer. Therefore, the display panel in the embodiment of the invention can effectively improve the problem of electrochemical corrosion and can simultaneously meet the aims of poor analysis and performance test of the signal line.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (6)
1. A display panel comprises a substrate, a first signal line, an insulating layer, a second signal line and a passivation layer, wherein the first signal line, the insulating layer, the second signal line and the passivation layer are sequentially arranged on the substrate, the second signal line is electrically connected with the first signal line through a first via hole arranged in the insulating layer, and the display panel is characterized by further comprising:
the conductive layer is arranged on the passivation layer and is electrically connected with the second signal line through a second through hole in the passivation layer; wherein the content of the first and second substances,
the projections of the first via hole and the second via hole on the substrate base plate do not overlap;
the first signal line includes a scan line;
the second signal line includes a data line;
the display panel comprises a display area and a frame area, and the first signal line, the insulating layer, the second signal line, the passivation layer and the conductive layer are arranged in the display area.
2. The display panel according to claim 1, wherein the display panel further comprises a thin film transistor, and the thin film transistor comprises, in a direction sequentially away from the substrate base plate:
the gate electrode, the gate insulating layer, the active layer, and the source and drain electrodes.
3. The display panel according to claim 2, wherein the first signal line is disposed on the same layer as the gate electrode.
4. The display panel according to claim 2, wherein the second signal line is provided in the same layer as the source and drain electrodes.
5. The display panel according to claim 1, wherein a material of the conductive layer is a transparent conductive material.
6. A display device comprising the display panel according to any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710349049.1A CN106935600B (en) | 2017-05-17 | 2017-05-17 | Display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710349049.1A CN106935600B (en) | 2017-05-17 | 2017-05-17 | Display panel and display device |
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| Publication Number | Publication Date |
|---|---|
| CN106935600A CN106935600A (en) | 2017-07-07 |
| CN106935600B true CN106935600B (en) | 2020-05-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710349049.1A Active CN106935600B (en) | 2017-05-17 | 2017-05-17 | Display panel and display device |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2022126638A1 (en) * | 2020-12-18 | 2022-06-23 | 京东方科技集团股份有限公司 | Driving backplane and manufacturing method therefor, and display device |
| CN113380166A (en) | 2021-06-15 | 2021-09-10 | 深圳市华星光电半导体显示技术有限公司 | Display panel |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6537840B2 (en) * | 2000-10-12 | 2003-03-25 | Au Optronics Corp. | Manufacturing process of thin film transistor liquid crystal display with one mask |
| CN104699349A (en) * | 2015-04-01 | 2015-06-10 | 上海天马微电子有限公司 | Array substrate, manufacturing method thereof and display panel |
| CN106125437A (en) * | 2016-09-05 | 2016-11-16 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof, display device |
-
2017
- 2017-05-17 CN CN201710349049.1A patent/CN106935600B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6537840B2 (en) * | 2000-10-12 | 2003-03-25 | Au Optronics Corp. | Manufacturing process of thin film transistor liquid crystal display with one mask |
| CN104699349A (en) * | 2015-04-01 | 2015-06-10 | 上海天马微电子有限公司 | Array substrate, manufacturing method thereof and display panel |
| CN106125437A (en) * | 2016-09-05 | 2016-11-16 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof, display device |
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