CN111025793A - Display panel and display device - Google Patents
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- CN111025793A CN111025793A CN201911379516.0A CN201911379516A CN111025793A CN 111025793 A CN111025793 A CN 111025793A CN 201911379516 A CN201911379516 A CN 201911379516A CN 111025793 A CN111025793 A CN 111025793A
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- 238000012360 testing method Methods 0.000 claims abstract description 97
- 239000000758 substrate Substances 0.000 claims abstract description 79
- 239000010410 layer Substances 0.000 claims description 171
- 229910052751 metal Inorganic materials 0.000 claims description 67
- 239000002184 metal Substances 0.000 claims description 67
- 239000010409 thin film Substances 0.000 claims description 41
- 125000006850 spacer group Chemical group 0.000 claims description 6
- 239000002346 layers by function Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 23
- 238000002161 passivation Methods 0.000 description 17
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- 239000004973 liquid crystal related substance Substances 0.000 description 8
- 230000008054 signal transmission Effects 0.000 description 4
- 239000011368 organic material Substances 0.000 description 3
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- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- HKBLLJHFVVWMTK-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti].[Ti] HKBLLJHFVVWMTK-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- Nonlinear Science (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract
The embodiment of the invention provides a display panel and a display device. The display panel includes a display area and a non-display area surrounding the display area; the non-display area is provided with a test circuit and a plurality of binding pads; the display panel further includes a substrate base plate; the binding pad is positioned on one side of the plane of the test circuit, which is deviated from the substrate; the vertical projection of the bonding pad on the substrate base plate at least partially overlaps the vertical projection of the test circuit on the substrate base plate. The display panel provided by the embodiment of the invention can reduce the area of the non-display area, thereby reducing the frame of the display panel.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the continuous development of scientific technology, more and more display devices with display functions, such as mobile phones, computers, intelligent wearable devices (e.g., smart watches), vehicle-mounted display devices, and the like, are widely applied to daily life and work of people, bring great convenience to people such as daily life and work, and become an indispensable important tool for people at present.
While the display devices are becoming popular, users are increasingly demanding not only on the types of functions and performance of the display devices, but also on the appearance of the display devices, and conditions such as narrow frames of the display devices are becoming factors for selecting display devices.
However, in the display panel provided by the prior art, the lower frame includes more circuit structures, which is not favorable for implementing the narrow frame design of the display device.
Disclosure of Invention
The embodiment of the invention provides a display panel and a display device, which are used for achieving the effect of reducing the frame of the display panel.
In a first aspect, an embodiment of the present invention provides a display panel, where the display panel includes a display area and a non-display area surrounding the display area; the non-display area is provided with a test circuit and a plurality of binding pads;
the display panel further comprises a substrate base plate,
the bonding pad is positioned on one side of the plane of the test circuit, which is far away from the substrate base plate;
the vertical projection of the bonding pad on the substrate base plate at least partially overlaps the vertical projection of the test circuit on the substrate base plate.
In a second aspect, an embodiment of the present invention further provides a display device, where the display device includes: the display panel of the first aspect.
The display panel comprises a display area and a non-display area surrounding the display area; the non-display area is provided with the test circuit and the plurality of binding pads, and the vertical projection of the binding pads on the substrate base plate is at least partially overlapped with the vertical projection of the test circuit on the substrate base plate.
Drawings
FIG. 1 is a schematic diagram of a display panel according to the prior art;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view taken along the direction QQ' of FIG. 2;
FIG. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a test circuit and a partial structure of a bonding pad according to an embodiment of the present invention;
FIG. 6 is a cross-sectional view of FIG. 5 taken along the direction WW';
fig. 7 is a schematic diagram of a film structure of a display panel according to an embodiment of the invention;
FIG. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a film structure of another display panel according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a film structure of another display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of another display device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be fully described by the detailed description with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, not all embodiments, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without inventive efforts fall within the scope of the present invention.
Fig. 1 is a schematic structural diagram of a display panel in the prior art, as shown in fig. 1, the display panel in the prior art includes a display area AA ' and a non-display area AB ' surrounding the display area AA '; the non-display area AB 'is provided with the demultiplexer component 01', the sector trace 02 ', the test circuit 10', the bonding pad 30 ', the driving chip 03', and other elements. As can be seen from fig. 1, the demultiplexer 01 ', the sector trace 02', the test circuit 10 ', the bonding pad 30' and the driving chip 03 'are respectively located in different areas of the non-display area AB', which increases the frame of the display panel and is not favorable for the narrow frame design of the display panel.
In view of the above problems, an embodiment of the present invention provides a display panel, including a display area and a non-display area surrounding the display area; the non-display area is provided with a test circuit and a plurality of binding pads; the display panel also comprises a substrate base plate, and the binding pad is positioned on one side of the plane of the test circuit, which is deviated from the substrate base plate; the vertical projection of the bonding pad on the substrate base plate at least partially overlaps the vertical projection of the test circuit on the substrate base plate. By adopting the technical scheme, the vertical projection of the binding pad on the substrate base plate is at least partially overlapped with the vertical projection of the test circuit on the substrate base plate, compared with the prior art, the space occupied by the binding pad and the test circuit is reduced, and the width of the lower frame of the display panel is narrowed.
The above is the core idea of the present invention, and the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 3 is a cross-sectional view taken along a direction QQ' of fig. 2, as shown in fig. 2 and fig. 3, the display panel includes a display area AA and a non-display area AB surrounding the display area AA; the non-display area AB is provided with a test circuit 10 and a plurality of bonding pads 30; the display panel further comprises a substrate base plate 20, and the binding pad 30 is positioned on one side of the plane of the test circuit 10, which is far away from the substrate base plate 20; the vertical projection of the bonding pad 30 on the substrate base 20 at least partially overlaps the vertical projection of the test circuit 10 on the substrate base 20.
The display area AA includes a plurality of pixels arranged along an array for displaying image information. The non-display area AB is provided with a wiring structure, a circuit structure and the like, and provides a display signal for the display area AA through the wiring structure, the circuit structure and the like, so that the display area AA displays image information. The test circuit 10 is used for transmitting a test signal to the display panel in a test stage to detect whether the display panel has a poor display problem. The bonding pad 30 may be bonded to the driver chip or the flexible circuit board, for example. The substrate 20 may be a rigid substrate or a flexible substrate, and the material of the substrate 20 is not limited in the embodiment of the present invention.
According to the display panel provided by the embodiment of the invention, the vertical projection of the bonding pad 30 on the substrate 20 is at least partially overlapped with the vertical projection of the test circuit 10 on the substrate 20, namely, the bonding pad 30 and the test circuit 10 are arranged in a stacked manner in the direction vertical to the substrate 20, compared with the prior art that the bonding pad 30 and the test circuit 10 are respectively arranged in different regions, the space occupied by the bonding pad 30 and the test circuit 10 originally is reduced, the area of a non-display region is reduced, and thus the width of the lower frame of the display panel is narrowed.
It will be understood by those skilled in the art that fig. 3 simply shows the relative positions of the test circuit 10, the substrate 20 and the bonding pads 30, but in practice, the cross-sectional view of the display panel along the QQ' direction also includes some other film layer structures, etc., which are not shown in fig. 3.
It should be noted that fig. 2 and 3 are only exemplarily illustrated by overlapping a vertical projection of the bonding pad 30 on the substrate base plate 20 and a vertical projection of the test circuit 10 on the substrate base plate 20, but do not constitute a limitation of the present application as long as a frame of the display panel can be reduced by a relative positional relationship between the bonding pad 30 and the test circuit 10. In other alternative embodiments, the vertical projection of the bonding pads 30 on the substrate base plate 20 may also completely cover the vertical projection of the test circuit 10 on the substrate base plate 20.
Optionally, fig. 4 is a schematic structural diagram of another display panel provided in the embodiment of the present invention. Referring to fig. 4, the display area AA includes a plurality of data lines 60; the test circuit output end of the test circuit 10 is electrically connected to the data line 60; at least one of the bonding pads 30 is electrically connected to the data line 60.
The display area AA includes a plurality of data lines 60, and the data lines 60 extend in a column direction. The non-display area AB further includes a demultiplexer component 01 and a sector trace 02. The signal output end of the demultiplexer component 01 is electrically connected to the plurality of data lines 60, the input end of the demultiplexer component 01 is electrically connected to the output end of the sector wire 02, and the input end of the sector wire 02 is electrically connected to the test circuit output end of the test circuit 10 and the bonding pad 30, respectively. The plurality of data lines 60 are electrically connected with one sector trace 02 through the demultiplexer component 01, so that data signals are provided for the plurality of data lines 60 through the mutual matching of one sector trace 02 and the demultiplexer component, and thus, the number of the sector traces 02 can be reduced relative to the number of the data lines 60, and the bonding pads 30 are electrically connected with the sector trace 02 conveniently. Specifically, after the display panel is manufactured, the display panel needs to be tested to detect a defective product, in this embodiment, the input end of the test circuit 10 is electrically connected to the test signal input end 50, the test signal is transmitted to the test circuit 10 through the test signal input end 50, the test signal reaches the demultiplexer component 01 through the sector routing 02, is transmitted to the plurality of data lines 60 after being processed by the demultiplexer component 01, and the defective product is detected by observing a display picture after the display panel receives the test signal.
In addition, after the display panel is tested, the driver chip needs to be bound to the area corresponding to the bonding pad 30 in the non-display area AB, so that the display panel performs normal display in the following process according to the signal sent by the driver chip. Specifically, the data signal output by the driver chip is transmitted to the demultiplexer component 01 through the bonding pad 30 via the sector routing 02, and is transmitted to the plurality of data lines 60 after being processed by the demultiplexer component 01, so that the display panel can normally display.
Optionally, with continued reference to fig. 4, the test circuit 10 includes a plurality of sub-test circuits, a test control signal input terminal 11, a test control signal line 12, a test signal input terminal 13, and a test signal line 14, one of the sub-test circuits may include, for example, a thin film transistor 15, a gate of the thin film transistor 15 is electrically connected to the test control signal line 12, a first terminal of the thin film transistor 15 is electrically connected to the test signal line 14, and a second terminal of the thin film transistor 15 is electrically connected to the data line 60. The test control signal input from the test control signal input terminal 11 controls the thin film transistor 15 to be turned on or off through the test control signal line 12, and when the thin film transistor 15 is turned on, the test signal input from the test signal input terminal 13 is input to the sub-test circuits through the test signal lines 14, respectively. In the display panel provided by the present embodiment, since a partial region of the bonding pad 30 overlaps a partial region of the test circuit 10 in a direction perpendicular to the substrate base plate 20, for example, in fig. 4, the partial region of the bonding pad 30 overlaps the test control signal line 12 and the test signal line 14 of the test circuit 10, the bonding pad 30 moves upward as a whole, and thus, a bezel of the display panel is reduced.
It should be noted that fig. 4 only exemplarily shows a circuit diagram of one test circuit 10, that is, only two test signal lines 14 are provided in fig. 4 for illustration, where the sources of the odd thin film transistors 15 are electrically connected to one of the test signal lines 14, and the sources of the even thin film transistors 15 are electrically connected to the other test signal line 14. However, in actual installation, the test circuit 10 is not limited to this structure, and the specific structure of the test circuit 10 may be adjusted according to actual conditions, and this embodiment is not particularly limited.
Alternatively, fig. 5 is a schematic diagram of a partial structure of a test circuit and a bonding pad according to an embodiment of the present invention, fig. 6 is a cross-sectional view of fig. 5 along the direction WW', and referring to fig. 5 and fig. 6, a display panel includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 on a substrate 20; the first metal layer M1 is located between the second metal layer M2 and the base substrate 20; the third metal layer M3 is positioned at the side of the second metal layer M2 facing away from the substrate base plate 20; the bonding pad 30 includes a first conductive structure 31 on the substrate base plate 20, a pad layer 32 on a side of the first conductive structure 31 away from the substrate base plate 20, and a second conductive structure 33 on a side of the pad layer 32 away from the first conductive structure 31; the second conductive structure 33 is electrically connected to the first conductive structure 31 through a via in the pad layer 32; the first metal layer M1 includes the gate of the thin film transistor 11 of the test circuit 10; the second metal layer M2 includes the source and drain of the thin film transistor 11 of the test circuit 10; the third metal layer M3 includes the first conductive structure 31 of the bonding pad 30.
In the display panel provided by the present embodiment, since the third metal layer M3 is located on the side of the second metal layer M2 away from the substrate 20, and the second metal layer M2 includes the source and drain electrodes of the thin film transistor 11 of the test circuit 10, the third metal layer M3 includes the first conductive structure 31 of the bonding pad 30, i.e., in a direction perpendicular to the base substrate 20, the first conductive structure 31 is located above the thin film transistor 11 in the test circuit 10, that is, in a direction perpendicular to the base substrate 20, the bonding pads 30 are located above the test circuit 10, compared with the prior art in which the first conductive structure 31 and the source and drain of the thin film transistor 11 are arranged on the same layer, the overlapping area of the bonding pad 30 and the testing circuit 10 is reduced, the area of a non-display area is reduced, and the width of the lower frame of the display panel is narrowed.
Optionally, the display panel provided in the embodiment of the present invention may be an organic light emitting diode display panel, and may also be a liquid crystal display panel. The following is a detailed description with specific examples.
When the display panel provided by the embodiment of the invention is a liquid crystal display panel, the liquid crystal display panel comprises an array substrate, a color film substrate and a liquid crystal layer between the array substrate and the color film substrate. The array substrate comprises a driving circuit, and the driving circuit comprises a thin film transistor array. The color filter substrate includes a color filter layer and a black matrix (not shown) for shielding the driving circuit on the array substrate. The color filter layer may include a red color filter, a green color filter, and a blue color filter, which is not limited in the embodiments of the present invention. For example, fig. 7 is a schematic diagram of a film structure of a display panel according to an embodiment of the present invention, referring to fig. 7, the liquid crystal display panel includes an array substrate 100, a color filter substrate 200, and a liquid crystal layer 300 between the array substrate 100 and the color filter substrate 200, the liquid crystal display panel includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 on a substrate 20, and the first metal layer M1 is located between the second metal layer M2 and the substrate 20; the third metal layer M3 is positioned at the side of the second metal layer M2 facing away from the substrate base plate 20; the first metal layer M1 includes a gate of the thin film transistor 11 in the test circuit 10 and a gate of the thin film transistor in the driving circuit; the second metal layer M2 includes a source drain of the thin film transistor 11 in the test circuit 10 and a source drain of the thin film transistor in the driving circuit; the third metal layer M3 includes the first conductive structure 31 of the bonding pad 30, and the third metal layer M3 is located at a side of the second metal layer M2 facing away from the substrate base plate 20. The grid electrode of the thin film transistor 11 in the test circuit 10 and the grid electrode of the thin film transistor in the drive circuit are formed in the same process by adopting the same material, and the source drain electrode of the thin film transistor 11 in the test circuit 10 and the source drain electrode of the thin film transistor in the drive circuit are formed in the same process by adopting the same material, so that the process flow is reduced; meanwhile, compared with the case that the gate of the thin film transistor 11 of the test circuit 10 and the gate of the thin film transistor in the driving circuit are respectively arranged on different film layers, and the source drain of the thin film transistor 11 of the test circuit 10 and the source drain of the thin film transistor in the driving circuit are respectively arranged on different film layers, in this embodiment, the gate of the thin film transistor 11 of the test circuit 10 and the gate of the thin film transistor in the driving circuit are arranged on the same layer, and the source drain of the thin film transistor 11 of the test circuit 10 and the source drain of the thin film transistor in the driving circuit are arranged on the same layer, the overall thickness of the display panel can be reduced.
Optionally, with continued reference to fig. 7, the liquid crystal display panel further includes a planarization layer PLN located between the second metal layer M2 and the third metal layer M3, a first passivation layer PV1 on a side of the third metal layer M3 away from the substrate 20, a second transparent conductive layer 70 located on a side of the first passivation layer PV1 away from the substrate 20, a second passivation layer PV2 located on a side of the second transparent conductive layer 70 away from the substrate, and a first transparent conductive layer 80 located on a side of the second passivation layer PV2 away from the substrate 20.
It will be understood by those skilled in the art that only some of the layers relevant to the invention are shown in the drawings, and not all of the layers.
Optionally, with continued reference to fig. 7, the first transparent conductive layer 80 includes a pixel electrode located in the display area AA and the second conductive structure 33 of the bonding pad 30. The second transparent conductive layer 70 includes a common electrode of the display area AA.
In the embodiment, the pixel electrode of the display area AA and the second conductive structure 33 of the bonding pad 30 are formed in the same process by using the same material, so that the process flow is reduced; meanwhile, compared with the case that the pixel electrode of the display area AA and the second conductive structure 33 of the bonding pad 30 are respectively disposed on different film layers, the pixel electrode of the display area AA and the second conductive structure 33 of the bonding pad 30 are disposed on the same layer in this embodiment, so that the overall thickness of the display panel can be reduced.
In addition, it is considered that when the second conductive structure 33 of the bonding pad 30 is disposed at the same layer as the common electrode, that is, when the second transparent conductive layer 70 includes the second conductive structure 33 of the bonding pad 30 and the common electrode of the display area AA, after the first passivation layer PV1 is formed, the first passivation layer PV1 needs to be etched to form a via hole, then the second transparent conductive layer 70 is prepared so that the second conductive structure 33 is connected to the first conductive structure 31 through the via hole in the first passivation layer PV1, and then the second passivation layer PV2 of the non-display area AB needs to be etched away after the second passivation layer PV2 is prepared, so that the second conductive structure 33 and the first conductive structure 31 in the bonding pad 30 are formed. In the display panel provided in the embodiment of the invention, when the second conductive structure 33 of the bonding pad 30 and the pixel electrode are disposed on the same layer, that is, the first transparent conductive layer 80 includes the pixel electrode located in the display area AA and the second conductive structure 33 of the bonding pad 30. Specifically, with reference to fig. 7, in the non-display area AB, the first passivation layer PV1, the second passivation layer PV2 and the first transparent conductive layer 80 are disposed above the third metal layer M3 away from the substrate base plate 20, and at this time, the second conductive structure 33 and the first conductive structure 31 can be electrically connected only by etching the first passivation layer PV1 and the second passivation layer PV2 at the same time to form a via hole; thus, the process flow is further reduced.
Optionally, with continued reference to fig. 7, in the non-display area AB, the second metal layer M2 includes signal leads 90; the first conductive structure 31 is electrically connected to the first end of the signal lead 90 through a via in the planarization layer PLN; a second end of the signal lead 90 is electrically connected to a signal line (not shown in fig. 7) of the display region; the signal line comprises at least one of a data line, a scanning line and a touch control wiring.
Since the material of the second metal layer M2 is titanium aluminum titanium, the resistivity is small, and is about 0.07 Ω · M. Therefore, in the embodiment of the present invention, the signal lead 90 is disposed on the second metal layer M2, and the signal is transmitted through the signal lead 90 in the second metal layer M2, so as to reduce the loss of the signal lead 90 and improve the signal transmission efficiency. Optionally, the signal line may include at least one of a data line, a scan line, and a touch trace, for example. Illustratively, the data signal is transmitted to the data line of the display area through the signal lead 90, the scan signal is transmitted to the scan line of the display area through the signal lead 90, and the signal transmission between the touch trace and the touch chip is realized through the signal lead 90.
Optionally, fig. 8 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, referring to fig. 7 and 8, the third metal layer further includes a touch electrode layer 50 located in the display area; the touch electrode layer is in a grid shape.
In the embodiment, the touch electrode layer 50 of the display area AA and the first conductive structure 31 of the bonding pad 30 are formed in the same process by using the same material, so that the process flow is reduced; meanwhile, compared with the case that the touch electrode layer 50 of the display area AA and the first conductive structure 31 of the bonding pad 30 are respectively disposed on different film layers, the touch electrode layer 50 of the display area AA and the first conductive structure 31 of the bonding pad 30 are disposed on the same layer in this embodiment, so that the overall thickness of the display panel can be reduced.
Optionally, fig. 9 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 10 is a schematic structural diagram of a film layer of a display panel provided in an embodiment of the present invention, referring to fig. 9 and fig. 10, in a display area AA, the second transparent conductive layer 80 includes a touch electrode 50; the third metal layer M3 further includes a touch trace 51; the touch trace 51 is electrically connected to the touch electrode 50.
In the embodiment, the touch electrode 50 of the display area AA and the second conductive structure 33 of the bonding pad 30 are formed in the same process by using the same material, and the touch trace 51 and the first conductive structure 31 of the bonding pad 30 are formed in the same process by using the same material, so that the process flow is reduced; while the overall thickness of the display panel can be reduced.
It is understood that fig. 8, fig. 9 and fig. 10 only exemplarily show the connection relationship between the touch electrode 50 and the touch trace 51, and in the display panel provided in this embodiment, the shapes and the operation modes of the touch electrode 50 and the touch trace 51 are not particularly limited.
Optionally, with continued reference to fig. 7, the liner layer 32 comprises an inorganic liner layer.
Wherein, the materials of the first passivation layer PV1 and the second passivation layer PV2 are inorganic materials.
Optionally, with continued reference to fig. 7, the spacer layer 32 includes an inorganic spacer layer and an organic spacer layer.
The material of the first passivation layer PV1 of the padding layer 32 is an organic material.
Considering that the film layer of the inorganic material in the prior art is thin and has poor viscosity, and the display panel needs to be subjected to a pull force test after the driving chip or the flexible circuit board is bound, the pull force test is that the display panel and the driving chip or the flexible circuit board are pulled after the driving chip or the flexible circuit board is bound to the display panel through the binding pad so as to test whether the driving chip or the flexible circuit board is bound with the display panel in place. In the display panel provided by the embodiment of the invention, the first passivation layer PV1 in the pad layer 32 of the bonding pad 30 is made of an organic material, and the film layer is thicker and has a certain adhesion force during preparation of the organic material, that is, the contact area between the second conductive layer 33 and the pad layer 32 is increased through the organic pad layer, so that the adhesion force between the second conductive layer 33 and the pad layer 32 is increased, and thus, the second conductive layer 33 and the pad layer 32 in the bonding pad 30 are more stable, the pulling resistance between the flexible circuit board or the driving chip and the bonding pad is improved, and the problem that the reliable signal transmission between the driving chip and the bonding pad 30 is affected due to the separation between the film layers of the bonding pad 30 in the subsequent process is prevented.
When the display panel provided by the embodiment of the invention is an organic light emitting diode display panel, the display area of the organic light emitting diode display panel includes a substrate, a driving circuit and a plurality of organic light emitting elements (not shown in the figure) which are sequentially stacked. The driving circuit comprises a thin film transistor array, and the thin film transistor comprises a grid electrode and a source drain electrode. The organic light-emitting element comprises an anode, a light-emitting functional layer and a cathode which are arranged in sequence and deviated from the substrate; a pixel defining layer is disposed between the light emitting functional layers of the adjacent organic light emitting elements. The display panel may further include an encapsulation layer (not shown) on a side of the organic light emitting unit away from the substrate for protecting the organic light emitting unit from water and oxygen. For example, fig. 11 is a schematic diagram of a film structure of another display panel according to an embodiment of the present invention, and referring to fig. 11, the display panel includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 on a substrate 20, and a first metal layer M1 is located between the second metal layer M2 and the substrate 20; the third metal layer M3 is positioned at the side of the second metal layer M2 facing away from the substrate base plate 20; the first metal layer M1 includes a gate of a thin film transistor in a driving circuit; the second metal layer M2 includes the source and drain of the thin film transistor in the driving circuit; the third metal layer M3 includes the first conductive structure 31 of the anode 401 bonding pad 30 of the organic light emitting element 400, and the second conductive structure 33 of the bonding pad 30 is located at the same layer as the cathode 402; the pad layer 32 of the bonding pad 30 is located at the same layer as the pixel defining layer 403.
In the display panel provided by this embodiment, because the third metal layer M3 is located on the side of the second metal layer M2 away from the substrate 20, and the second metal layer M2 includes the source and drain of the thin film transistor 11 of the test circuit 10, and the third metal layer M3 includes the first conductive structure 31 of the bonding pad 30, that is, in the direction perpendicular to the substrate 20, a partial region of the bonding pad 30 overlaps with a partial region of the test circuit 10, compared with the prior art in which the bonding pad 30 and the test circuit 10 are respectively disposed in different regions, the space originally occupied by the bonding pad 30 and the test circuit 10 is reduced, the area of the non-display region is reduced, and thus the width of the lower frame of the display panel is narrowed. In addition, in the present embodiment, the gate of the thin film transistor 11 of the test circuit 10 and the gate of the thin film transistor in the driving circuit are formed in the same process by using the same material, the source and drain of the thin film transistor 11 of the test circuit 10 and the source and drain of the thin film transistor in the driving circuit are formed in the same process by using the same material, the third metal layer M3 includes the anode 401 of the organic light emitting element 400 and the first conductive structure 31 of the bonding pad 30, the second conductive structure 33 of the bonding pad 30 and the cathode 402 are located in the same layer, and the pad layer 32 of the bonding pad 30 and the pixel defining layer 403 are located in the same layer, so that the process flow is reduced, and the overall thickness of the display panel can be reduced.
Based on the same inventive concept, the embodiment of the invention also provides a display device which comprises the display panel of any embodiment of the invention. Specifically, fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention. As shown in fig. 12, the display device 1000 includes the display panel 1001 in the above embodiment, and thus the display device 1000 provided in the embodiment of the present invention also has the beneficial effects described in the above embodiment, which are not repeated herein. For example, the display device 1000 may be an electronic device such as a mobile phone, a computer, a smart wearable device (e.g., a smart watch), and an in-vehicle display device, which is not limited in this embodiment of the present invention.
Optionally, fig. 13 is a schematic structural diagram of another display device according to an embodiment of the present invention, and referring to fig. 13, the display device 1000 further includes a flexible circuit board 1002 and a driving chip 1003, the flexible circuit board 1002 is electrically connected to the bonding pad 30, and the driving chip 1003 is disposed on the flexible circuit board 1002. In the display device provided by this embodiment, the driver chip 1003 is bound on the flexible circuit board 1002, the flexible circuit board 1002 is bound on the display panel 1001, and signal transmission between the driver chip and the display panel 1001 is realized through the binding pad 30. Since the flexible circuit board 1002 in the display device provided in this embodiment can be bent to the back surface of the display panel 1001, the lower frame of the display device is further reduced.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (11)
1. A display panel characterized by comprising a display area and a non-display area surrounding the display area; the non-display area is provided with a test circuit and a plurality of binding pads;
the display panel further comprises a substrate base plate;
the bonding pad is positioned on one side of the plane of the test circuit, which is far away from the substrate base plate;
the vertical projection of the bonding pad on the substrate base plate at least partially overlaps the vertical projection of the test circuit on the substrate base plate.
2. The display panel according to claim 1, wherein the display area includes a plurality of data lines; the output end of the test circuit is electrically connected with the data line; at least one of the bonding pads is electrically connected to the data line.
3. The display panel of claim 1, wherein the display panel comprises a first metal layer, a second metal layer, and a third metal layer on the substrate base; the first metal layer is positioned between the second metal layer and the substrate base plate; the third metal layer is positioned on one side of the second metal layer, which is far away from the substrate; the bonding pad comprises a first conductive structure positioned on the substrate base plate, a liner layer positioned on one side of the first conductive structure far away from the substrate base plate and a second conductive structure positioned on one side of the liner layer far away from the first conductive structure; the second conductive structure is electrically connected with the first conductive structure through a via hole in the pad layer;
the first metal layer comprises a grid electrode of a thin film transistor of the test circuit; the second metal layer comprises a source drain electrode of a thin film transistor of the test circuit; the third metal layer includes the first conductive structure of the bond pad.
4. The display panel according to claim 3, wherein the display panel further comprises a first transparent conductive layer;
the first transparent conductive layer comprises a pixel electrode positioned in a display area and a second conductive structure of the binding pad.
5. The display panel according to claim 3, wherein a planarization layer is provided between the second metal layer and the third metal layer;
in the non-display area, the second metal layer comprises signal leads;
the first conductive structure is electrically connected with the first end of the signal lead through a via hole in the planarization layer;
the second end of the signal lead is electrically connected with the signal wire of the display area;
the signal line comprises at least one of a data line, a scanning line and a touch control wiring.
6. The display panel of claim 3, wherein the third metal layer further comprises a touch electrode layer in the display area; the touch electrode layer is in a grid shape.
7. The display panel according to claim 3, wherein the display panel further comprises a second transparent conductive layer; in the display area, the second transparent conductive layer comprises a touch electrode;
the third metal layer further comprises a touch wire; the touch wire is electrically connected with the touch electrode.
8. The display panel according to claim 3, wherein the display region further comprises a plurality of organic light emitting elements; the organic light-emitting element comprises an anode, a light-emitting functional layer and a cathode which are arranged in sequence and deviated from the substrate; a pixel limiting layer is arranged between the light-emitting functional layers of the adjacent organic light-emitting elements;
the third metal layer further comprises the anode, and the second conductive structure and the cathode are located on the same layer; the pad layer is located at the same layer as the pixel defining layer.
9. The display panel of claim 5, wherein the gasket layer comprises an inorganic gasket layer.
10. The display panel according to claim 5, wherein the spacer layer comprises an inorganic spacer layer and an organic spacer layer.
11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
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| CN201911379516.0A CN111025793A (en) | 2019-12-27 | 2019-12-27 | Display panel and display device |
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| CN201911379516.0A CN111025793A (en) | 2019-12-27 | 2019-12-27 | Display panel and display device |
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