CN113593407A - Display panel - Google Patents

Display panel Download PDF

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Publication number
CN113593407A
CN113593407A CN202110759619.0A CN202110759619A CN113593407A CN 113593407 A CN113593407 A CN 113593407A CN 202110759619 A CN202110759619 A CN 202110759619A CN 113593407 A CN113593407 A CN 113593407A
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China
Prior art keywords
display panel
test pad
extension line
via hole
area
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Granted
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CN202110759619.0A
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Chinese (zh)
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CN113593407B (en
Inventor
李亮
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TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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Priority to CN202110759619.0A priority Critical patent/CN113593407B/en
Publication of CN113593407A publication Critical patent/CN113593407A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the application discloses a display panel, which comprises a display area, a peripheral area and a detection area, wherein the peripheral area is positioned on one side of the display area; the extension line is arranged on the substrate, extends from the display area to the detection area, and is correspondingly and electrically connected with a data line; the test pad is arranged in the detection area, and a test pad is correspondingly and electrically connected with an extension line. This application is through setting up the test pad at the detection zone to adopt test pad and extension line one-to-one to connect, thereby realize adopting the probe detection mode of full contact to light a lamp the test, also adopt the test pad of probe contact detection zone.

Description

Display panel
Technical Field
The application relates to the technical field of display, in particular to a display panel.
Background
In the research and practice process of the prior art, the inventor of the present application finds that the conventional LOI-1 lighting adopts a shorting bar design mode, that is, different data lines are shorted together to display a plurality of R/G/B/W pictures, but the upper white and lower black or the upper black and lower white pictures cannot be displayed, that is, bright spots caused by short circuit of the source and the drain of the thin film transistor cannot be detected.
Although the existing full-contact detection mode can display a picture of black and white or black and white, the probe directly detects on the binding area, and because the binding pad precision of the binding area is high and the precision of the probe and the equipment is relatively low, the deviation is easy to occur in the detection process, so that the detection yield is reduced.
Disclosure of Invention
The embodiment of the application provides a display panel, which can adopt a full-contact probe detection mode to carry out lighting test.
The embodiment of the application provides a display panel, including the display area, be located the peripheral area of display area one side and being located the peripheral area is kept away from the detection zone of display area one side, wherein, display panel includes:
a substrate disposed in the display region, the peripheral region, and the detection region;
the data lines are arranged on the substrate and arranged in the display area;
the extension lines are arranged on the substrate, extend from the display area to the detection area, and are correspondingly and electrically connected with the data lines;
the testing pads are arranged on the substrate and arranged in the detection area, and one testing pad is correspondingly and electrically connected with one extension line.
Optionally, in some embodiments of the present application, the display panel further includes:
a first metal layer disposed on the substrate, the first metal layer including the epitaxial line;
a first insulating layer disposed on the first metal layer;
a second metal layer disposed on the first insulating layer, the second metal layer including the data line and a signal access portion disposed in the detection region;
a second insulating layer disposed on the second metal layer;
and the conducting layer is arranged on the second insulating layer and comprises the test pad, and the test pad is connected to the extension line and the signal access part.
Optionally, in some embodiments of the present application, the second insulating layer is provided with a first via hole and a second via hole, the first via hole exposes the signal access portion, the second via hole extends into the first insulating layer and exposes the extension line, the test pad extends into the first via hole and is connected to the signal access portion, and the test pad extends into the second via hole and is connected to the extension line;
the part of the test pad extending into the first via hole and the second via hole forms a recess for inserting a probe.
Optionally, in some embodiments of the present application, the first via and the second via are disposed at intervals.
Optionally, in some embodiments of the present application, the first via and the second via are disposed in communication.
Optionally, in some embodiments of the present application, the extension line includes a main line portion and a binding portion connected to one end of the main line portion, and a width of the binding portion is greater than a width of the main line portion;
the second via hole exposes the binding portion, and the test pad is connected to the binding portion.
Optionally, in some embodiments of the present application, an opening area of the first via and/or the second via is larger than an end surface area of the probe.
Optionally, in some embodiments of the present application, a width of the first via and/or the second via is greater than 3 microns and less than or equal to 9 microns.
Optionally, in some embodiments of the present application, the plurality of epitaxial lines includes a plurality of first epitaxial lines, a plurality of second epitaxial lines, and a plurality of third epitaxial lines; the plurality of test pads comprises a plurality of first test pads, a plurality of second test pads and a plurality of third test pads; the first test pad is correspondingly connected with the first extension line, the second test pad is correspondingly connected with the second extension line, and the third test pad is correspondingly connected with the third extension line;
in a first direction, a plurality of the first test pads are arranged in a first row, a plurality of the third test pads are arranged in a second row, and a plurality of the second test pads are arranged in a third row;
in a second direction, the second row is disposed between the first row and the third row; the second direction intersects the first direction; the first test pad, the second test pad and the third test pad are arranged in a staggered mode.
Optionally, in some embodiments of the present application, a length of the first extension line is smaller than a length of the third extension line, and a length of the third extension line is smaller than a length of the second extension line;
in the first direction, the first extension lines, the second extension lines and the third extension lines are alternately arranged in sequence.
The display panel comprises a display area, a peripheral area and a detection area, wherein the peripheral area is positioned on one side of the display area, the detection area is positioned on one side of the peripheral area, and a data line is arranged in the display area; the extension line is arranged on the substrate, extends from the display area to the detection area, and is correspondingly and electrically connected with a data line; the test pad is arranged in the detection area, and a test pad is correspondingly and electrically connected with an extension line. This application is through setting up the test pad at the detection zone to adopt test pad and extension line one-to-one to connect, thereby realize adopting the probe detection mode of full contact to light a lamp the test, also adopt the test pad of probe contact detection zone.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic view of a first structure of a display panel provided in an embodiment of the present application;
FIG. 2 is a schematic diagram of a detection area portion in a first structure of a display panel according to an embodiment of the present disclosure;
FIG. 3 is a schematic cross-sectional view taken along line MN of FIG. 2;
fig. 4 is a schematic structural diagram of a second display panel provided in the embodiment of the present application;
FIG. 5 is a schematic diagram of a detection region in a second structure of a display panel according to an embodiment of the present disclosure;
fig. 6 is a schematic sectional structure view along line HL in fig. 5.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
The embodiments of the present application provide a display panel, which is described in detail below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
Referring to fig. 1 and fig. 2, an embodiment of the present disclosure provides a display panel 100, which includes a display area AA, a peripheral area NA located at one side of the display area AA, and a detection area TS located at one side of the peripheral area NA away from the display area AA. The display panel 100 includes a substrate 11, a plurality of extension lines 121, a plurality of data lines 131, and a plurality of test pads 141.
The substrate 11 is disposed in the display area AA, the peripheral area NA, and the detection area TS. The data line 131 is disposed on the substrate 11. The data line 131 is disposed in the display area AA.
The extension line 121 is provided on the substrate 11. The extension line 121 extends from the display area AA to the detection area TS. An extension line 121 is electrically connected to a data line 131.
The test pad 141 is disposed on the substrate 11. The test pad 141 is disposed at the detection section TS. A test pad 141 is electrically connected to an extension line 121.
The display panel 100 of the embodiment of the application is configured to set the test pad 141 in the detection area TS, and the test pad 141 and the extension line 121 are connected in a one-to-one correspondence manner, so that a lighting test is performed by using a full-contact probe detection method, that is, the test pad 141 in the detection area TS is contacted by using a probe.
Alternatively, the display panel 100 may include a plurality of cells, each of which includes a display area AA, a peripheral area NA, and a detection area TS. The present embodiment is described with reference to a unit as an example, but not limited thereto.
Referring to fig. 3, the display panel 100 may further include a first metal layer 12, a first insulating layer 15, a second metal layer 13, a second insulating layer 16, and a conductive layer 14.
The first metal layer 12 is disposed on the substrate 11. First metal layer 12 includes an extension line 121.
A first insulating layer 15 is disposed on the first metal layer 12.
The second metal layer 13 is disposed on the first insulating layer 15. The second metal layer 13 includes a data line 131 and a signal access portion 132, and the signal access portion 132 is disposed in the detection area TS.
A second insulating layer 16 is disposed on the second metal layer 13.
The conductive layer 14 is disposed on the second insulating layer 16. The conductive layer 14 includes a test pad 141, and the test pad 141 is connected to the extension line 121 and the signal access portion 132.
Optionally, the first metal layer 12 may further include a scan line and a common electrode line, the scan line being disposed in the display area AA. The common electrode lines are disposed at the display area AA and/or the peripheral area NA.
The second metal layer 13 may further include a fan-out trace and a bonding pad, which are disposed in the peripheral area NA. A fan-out trace is correspondingly connected to a data line 131. A bonding pad is correspondingly connected to the fan-out trace. The binding pad is used for binding and connecting with the chip on film or the flexible circuit substrate.
Optionally, the width of the test pad 141 is greater than the width of the bonding pad, so as to improve the success rate of probe detection.
Alternatively, the materials of the first metal layer 12 and the second metal layer 13 may be copper, aluminum, titanium, molybdenum-copper alloy, molybdenum/copper laminate, or other metal materials.
Alternatively, the materials of the first insulating layer 15 and the second insulating layer 16 may each include at least one of silicon nitride, silicon oxide, and organic photoresist.
Optionally, the conductive layer 14 may further include a pixel electrode or a touch electrode. That is, when the patterned conductive layer 14 is formed, the test pad 141 and the pixel electrode, or the test pad 141 and the touch electrode are formed using the same mask.
Alternatively, the material of the conductive layer 14 may be an oxide such as indium tin oxide or indium zinc oxide; metals, alloys, and compounds of various conductive properties and mixtures thereof are also possible, for example, gold, silver, platinum, or the like; but also conventional conductive metals and alloys such as copper, aluminum or titanium, etc.
In the display panel 100 of the present embodiment, the second insulating layer 16 is provided with a first via 161 and a second via 162. The first via 161 exposes the signal access portion 132. The second via 162 extends into the first insulating layer 15 and exposes the extension line 121. The test pad 141 extends into the first via 161 to connect to the signal access portion 132. The test pad 141 extends into the second via 162 to connect to the extension line 121.
The portion of the test pad 141 extending into the first and second vias 161 and 162 forms a recess 14 a. The recess 14a is used for inserting a probe.
Optionally, the first via 161 and the second via 162 are spaced apart from each other.
That is, the recess 14a has two, one attached to the hole wall of the first via 161 and the other attached to the hole wall of the second via 162. Both the recesses 14a may be probe points as probes.
In the display panel 100 of this embodiment, the recessed portion 14a is used as a probe point of the probe, on one hand, the recessed portion 14a can play a role of limiting the probe, and the probe is prevented from suddenly shifting in the test process; on the other hand, as the concave part 14a is attached to the wall of the via hole, the concave part 14a forms a hole structure with a wide top and a narrow bottom, the hole structure is convenient for the insertion of the probe, and the success rate of detection is improved.
Optionally, the depth of the first via 161 is smaller than the depth of the second via 162. The opening area of the first via 161 is smaller than the opening area of the second via 162. The recess 14a attached to the wall of the second via 162 can be used as a probe point of the probe.
Optionally, the test pad 141 further includes a flat portion 14b attached on the second insulating layer 16, and the flat portion 14b is connected to the recess portion 14 a. The recessed portion 14a extends from the flat portion 14b in the direction of the substrate 11.
Alternatively, if the area of the flat portion 14b is large enough, the flat portion 14b may also serve as a probe point of the probe.
Optionally, the opening area of the first via 161 and/or the second via 162 is larger than the end surface area of the probe. This arrangement improves the success rate of probe insertion into the via.
Optionally, the width of the first via 161 and/or the second via 162 is greater than 3 microns and less than or equal to 8 microns, such as 4 microns, 5 microns, 6 microns, 7 microns, or 8 microns. By the arrangement, the success rate of inserting the probe into the through hole can be ensured, and the short circuit of the adjacent metal wires can be avoided. The metal line may be the extension line 121 or the signal access portion 132.
Optionally, the length of the first via 161 and/or the second via 162 is greater than or equal to 3 microns and less than or equal to 6 microns, such as 3 microns, 4 microns, 5 microns, or 6 microns.
Optionally, the extension line 121 includes a main line portion 12a and a binding portion 12b connected to one end of the main line portion 12a, and the width of the binding portion 12b is greater than the width of the main line portion 12 a.
The second via 162 exposes the bonding portion 12b, and the test pad 141 is connected to the bonding portion 12 b. The provision of the bonding portion 12b can increase the opening area of the second via 162, thereby increasing the success rate of probe insertion into the second via 162.
Optionally, one end of the extension line 121 far from the binding portion 12b is connected to the data line 131 through a via.
Alternatively, the opening shape of the second via 162 is similar to the shape of the binding portion 12 b. Optionally, the opening of the second via 162 is rectangular or circular in shape.
Optionally, referring to fig. 2, in the display panel 100 of the present embodiment, the plurality of extension lines 121 includes a plurality of first extension lines 1211, a plurality of second extension lines 1212, and a plurality of third extension lines 1213. The plurality of test pads 141 includes a plurality of first test pads 1411, a plurality of second test pads 1412, and a plurality of third test pads 1413. A first test pad 1411 is correspondingly connected to a first extension line 1211. A second test pad 1412 is correspondingly connected to a second extension line 1212. A third pad 1413 is correspondingly connected to a third extension line 1213.
In the first direction X, a plurality of first test pads 1411 are arranged in a first row; a plurality of third test pads 1413 are arranged in a second row; a plurality of second test pads 1412 are arranged in a third row.
The second row is disposed between the first row and the third row in a second direction Y. The second direction Y intersects the first direction X, and optionally, the first direction X is perpendicular to the second direction Y. The first 1411, second 1412 and third 1413 test pads are offset from each other.
The first test pad 1411, the second test pad 1412 and the third test pad 1413 are arranged in a staggered manner, so that a part of space can be saved to form a via hole with a larger opening area, and a test pad 141 with a larger area is formed, thereby improving the detection success rate of the probe.
Optionally, the length of the first extension line 1211 is less than the length of the third extension line 1213. The length of the third extension line 1213 is less than the length of the second extension line 1212.
In the first direction X, the first extension lines 1211, the second extension lines 1212, and the third extension lines 1213 are alternately arranged in this order.
Optionally, the boundary line between the peripheral area NA and the detection area TS serves as the cutting line QG. After the lighting detection is completed, a laser or a cutting tool is required to cut along the cutting line QG so that the detection area TS of the display panel 100 is partially separated from the display panel 100.
Optionally, in the area corresponding to the cutting line QG, at least one side of the extension lines 121 is provided with a notch, so that it is avoided that two adjacent extension lines 121 are short-circuited in the cutting process.
Referring to fig. 4 and 5, an embodiment of the present disclosure provides a display panel 200, which includes a display area AA, a peripheral area NA located at one side of the display area AA, and a detection area TS located at one side of the peripheral area NA. The display panel 200 includes a substrate 11, a plurality of extension lines 121, a plurality of data lines 131, and a plurality of test pads 141.
The substrate 11 is disposed in the display area AA, the peripheral area NA, and the detection area TS. The data line 131 is disposed on the substrate 11. The data line 131 is disposed in the display area AA.
The extension line 121 is provided on the substrate 11. The extension line 121 extends from the display area AA to the detection area TS. An extension line 121 is electrically connected to a data line 131.
The test pad 141 is disposed on the substrate 11. The test pad 141 is disposed at the detection section TS. A test pad 141 is electrically connected to an extension line 121.
The display panel 200 of the embodiment of the application sets the test pad 141 in the detection area TS, and the test pad TS and the extension line 121 are connected in a one-to-one correspondence manner, so that a lighting test is performed by using a full-contact probe detection method, that is, the test pad 141 in the detection area TS is contacted by using a probe.
Referring to fig. 6, the display panel 200 may further include a first metal layer 12, a first insulating layer 15, a second metal layer 13, a second insulating layer 16, and a conductive layer 14.
The first metal layer 12 is disposed on the substrate 11. First metal layer 12 includes an extension line 121.
A first insulating layer 15 is disposed on the first metal layer 12.
The second metal layer 13 is disposed on the first insulating layer 15. The second metal layer 13 includes a data line 131 and a signal access portion 132, and the signal access portion 132 is disposed in the detection area TS.
A second insulating layer 16 is disposed on the second metal layer 13.
The conductive layer 14 is disposed on the second insulating layer 16. The conductive layer 14 includes a test pad 141, and the test pad 141 is connected to the extension line 121 and the signal access portion 132.
The display panel 200 of the present embodiment is different from the display panel 100 of the above embodiment in that: the first via 161 and the second via 162 are disposed in communication.
Because the first via hole 161 and the second via hole 162 are communicated, the recess 14a attached to the first via hole 161 and the recess 14a attached to the second via hole 162 are connected to form a larger recess 14a, thereby improving the success rate of inserting the probe into the via hole.
The foregoing detailed description is directed to a display panel provided in an embodiment of the present application, and specific examples are applied herein to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A display panel including a display area, a peripheral area located on one side of the display area, and a detection area located on one side of the peripheral area away from the display area, the display panel comprising:
a substrate disposed in the display region, the peripheral region, and the detection region;
the data lines are arranged on the substrate and arranged in the display area;
the extension lines are arranged on the substrate, extend from the display area to the detection area, and are correspondingly and electrically connected with the data lines;
the testing pads are arranged on the substrate and arranged in the detection area, and one testing pad is correspondingly and electrically connected with one extension line.
2. The display panel according to claim 1, characterized in that the display panel further comprises:
a first metal layer disposed on the substrate, the first metal layer including the epitaxial line;
a first insulating layer disposed on the first metal layer;
a second metal layer disposed on the first insulating layer, the second metal layer including the data line and a signal access portion disposed in the detection region;
a second insulating layer disposed on the second metal layer;
and the conducting layer is arranged on the second insulating layer and comprises the test pad, and the test pad is connected to the extension line and the signal access part.
3. The display panel according to claim 2, wherein the second insulating layer is provided with a first via hole and a second via hole, the first via hole exposes the signal access portion, the second via hole extends into the first insulating layer and exposes the extension line, the test pad extends into the first via hole and is connected to the signal access portion, and the test pad extends into the second via hole and is connected to the extension line;
the part of the test pad extending into the first via hole and the second via hole forms a recess for inserting a probe.
4. The display panel according to claim 3, wherein the first via hole and the second via hole are arranged at intervals.
5. The display panel according to claim 3, wherein the first via and the second via are provided in communication.
6. The display panel according to claim 3, wherein the extension line includes a main line portion and a binding portion connected to one end of the main line portion, the binding portion having a width greater than that of the main line portion;
the second via hole exposes the binding portion, and the test pad is connected to the binding portion.
7. The display panel according to any one of claims 3 to 6, wherein an opening area of the first via and/or the second via is larger than an end surface area of the probe.
8. The display panel according to any one of claims 7, wherein the width of the first via hole and/or the second via hole is greater than 3 micrometers and less than or equal to 9 micrometers.
9. The display panel according to any one of claims 3 to 6, wherein the plurality of epitaxial lines includes a plurality of first epitaxial lines, a plurality of second epitaxial lines, and a plurality of third epitaxial lines; the plurality of test pads comprises a plurality of first test pads, a plurality of second test pads and a plurality of third test pads; the first test pad is correspondingly connected with the first extension line, the second test pad is correspondingly connected with the second extension line, and the third test pad is correspondingly connected with the third extension line;
in a first direction, a plurality of the first test pads are arranged in a first row, a plurality of the third test pads are arranged in a second row, and a plurality of the second test pads are arranged in a third row;
in a second direction, the second row is disposed between the first row and the third row; the second direction intersects the first direction; the first test pad, the second test pad and the third test pad are arranged in a staggered mode.
10. The display panel according to claim 9, wherein the length of the first extension line is smaller than the length of the third extension line, and the length of the third extension line is smaller than the length of the second extension line;
in the first direction, the first extension lines, the second extension lines and the third extension lines are alternately arranged in sequence.
CN202110759619.0A 2021-07-06 2021-07-06 Display panel Active CN113593407B (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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CN113593407B CN113593407B (en) 2023-05-30

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CN104035217A (en) * 2014-05-21 2014-09-10 深圳市华星光电技术有限公司 Peripheral test circuit of displayer array substrate and LCD panel
CN105609025A (en) * 2016-01-05 2016-05-25 京东方科技集团股份有限公司 Detection structure of display panel
CN105607316A (en) * 2016-03-22 2016-05-25 京东方科技集团股份有限公司 Array substrate mother board and display panel mother board
CN107331294A (en) * 2017-06-30 2017-11-07 厦门天马微电子有限公司 Display panel and display device
CN110047412A (en) * 2019-04-30 2019-07-23 厦门天马微电子有限公司 Display panel and its preparation direction, display panel motherboard and its test method
CN110137155A (en) * 2019-05-24 2019-08-16 福州京东方光电科技有限公司 A kind of array substrate motherboard
CN110349524A (en) * 2018-04-06 2019-10-18 三星显示有限公司 Display device
CN111025793A (en) * 2019-12-27 2020-04-17 厦门天马微电子有限公司 Display panel and display device
CN112270907A (en) * 2020-09-24 2021-01-26 广州国显科技有限公司 Drive circuit carrier and display device

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103488333A (en) * 2013-06-11 2014-01-01 友达光电股份有限公司 Touch panel and manufacturing method of touch display panel
CN104035217A (en) * 2014-05-21 2014-09-10 深圳市华星光电技术有限公司 Peripheral test circuit of displayer array substrate and LCD panel
CN105609025A (en) * 2016-01-05 2016-05-25 京东方科技集团股份有限公司 Detection structure of display panel
CN105607316A (en) * 2016-03-22 2016-05-25 京东方科技集团股份有限公司 Array substrate mother board and display panel mother board
CN107331294A (en) * 2017-06-30 2017-11-07 厦门天马微电子有限公司 Display panel and display device
CN110349524A (en) * 2018-04-06 2019-10-18 三星显示有限公司 Display device
CN110047412A (en) * 2019-04-30 2019-07-23 厦门天马微电子有限公司 Display panel and its preparation direction, display panel motherboard and its test method
CN110137155A (en) * 2019-05-24 2019-08-16 福州京东方光电科技有限公司 A kind of array substrate motherboard
CN111025793A (en) * 2019-12-27 2020-04-17 厦门天马微电子有限公司 Display panel and display device
CN112270907A (en) * 2020-09-24 2021-01-26 广州国显科技有限公司 Drive circuit carrier and display device

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