CN107045464A - A kind of SPARC frameworks spatial processor neutron effect test test system - Google Patents
A kind of SPARC frameworks spatial processor neutron effect test test system Download PDFInfo
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- CN107045464A CN107045464A CN201710218603.2A CN201710218603A CN107045464A CN 107045464 A CN107045464 A CN 107045464A CN 201710218603 A CN201710218603 A CN 201710218603A CN 107045464 A CN107045464 A CN 107045464A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/003—Environmental or reliability tests
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2226—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test ALU
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
Abstract
A kind of SPARC frameworks spatial processor neutron effect test test system, including host computer, externally fed power supply, oscillograph, monitoring and controlling plate, signal connection winding displacement and detected space processor, host computer, externally fed power supply, oscillograph and monitoring and controlling plate are placed in Control Room, detected space processor is placed on circuit boards, is placed on together with circuit board in the irradiation zone in neutron test reactor.Program on monitoring and controlling plate includes initialization program, register file test program, mathematical computations test program, instruction and data Cache test programs, for realizing the initialization to detected space processor, register file test, mathematical computations test, instruction and data Cache tests.The present invention realizes the assessment that neutron effect performance is carried out to SPARC frameworks spatial processor.
Description
Technical field
The present invention relates to a kind of SPARC frameworks spatial processor neutron effect test test system, belong in microprocessor
Sub- effect test field.
Background technology
Single particle effect refers to the upset that the effect of single high energy particle triggers on the semiconductor device, locks, burns etc. existing
As.It is mainly proton and heavy particle to induce single particle effect in space industry, and induces the height of single particle effect in aviation field
Energy particle is neutron, due to neutron neutral, so its penetration capacity is very strong, metal material is almost stopped it without any
Effect, neutron can be directed through cabin and beat on the central controller or critical data memory of various electronic equipments, produce
Neutron single-particle effect, so as to trigger software and hardware mistake, even results in the generation of integrated circuit latch phenomenon, finally causes flight
Control system crashes, output error control instruction, and these can all have a strong impact on the safety and reliability of aircraft.
Spatial processor is 32 RISC embeded processors based on SPARC architectures, by it is embedded it is real-time based on
Integer processing unit, floating point processing unit, independent instruction and data Cache, hardware multiplication are included inside calculation machine system, processor
Musical instruments used in a Buddhist or Taoist mass and divider, interrupt control unit, the hardware debugging unit with trace buffer, timer, general purpose I/O Interface are guarded the gate
Dog, it would be preferable to support PROM, SRAM, SDRAM memory.The space of SPARC frameworks is obtained with processor in aerospace system
Extensive use, is even more important so the ability for studying the anti-neutron effect of this framework spatial processor just seems, but in the world
Research to SPARC framework spatial processor neutron effects is at the early-stage, almost tests system without related neutron effect test
Document and patent in terms of system and method.
The content of the invention
The technology of the present invention solves problem：Overcoming the deficiencies in the prior art, there is provided a kind of SPARC frameworks spatial processor
Neutron effect test test system, realizes the assessment that neutron effect performance is carried out to SPARC frameworks spatial processor.
The present invention technical solution be：A kind of SPARC frameworks spatial processor neutron effect test test system, bag
Include host computer, externally fed power supply, oscillograph, monitoring and controlling plate, signal connection winding displacement and detected space processor, institute
State host computer, externally fed power supply, oscillograph and monitoring and controlling plate to be placed in Control Room, detected space processor is put
Put on circuit boards, be placed on together with circuit board in the irradiation zone in neutron test reactor；
Signal connects winding displacement：Including supply lines, data/address line, serial data transmission line, reseting signal line, state instruction
Signal wire and clock input signal line, for connecting monitoring and controlling plate and detected space processor；
Host computer：The test result of monitoring and controlling plate output is received, and is shown；
Externally fed power supply：Powered for monitoring and controlling plate；
Oscillograph：The operating current monitoring signals of the detected space processor of monitoring and controlling plate output are received, and are shown
Show.
Monitoring and controlling plate：Store the test program that detected space processor needs to run；By the power supply of externally fed power supply
Operating voltage needed for photovoltaic conversion into detected space processor, connects winding displacement by signal and exports to circuit board；In tested sky
Between processor electrifying startup or reset after, in real time collection detected space processor test result, export and enter to host computer
Row display and data storage；After detected space processor electrifying startup or reset, the work of detected space processor is gathered in real time
Make current signal, export to oscillograph；
Detected space processor：After electrifying startup or reset, the test program in automatic cycling operating monitoring and controlling plate.
Also include state instruction plate；The detected space processor that the state instruction plate real-time reception monitoring and controlling plate is returned
Condition indicative signal, and shown, when condition indicative signal is error, reset signal exported to monitoring and controlling plate.
Monitoring and controlling plate：Condition indicative signal line in winding displacement is connected by signal and gathers detected space processor in real time
Condition indicative signal, and this signal is returned into state instruction plate shown；When the reset signal for receiving state instruction plate
Afterwards, monitoring and controlling plate, which to the reset signal export after shaping, gives detected space processor, realizes to detected space processor
Reset.
The monitoring and controlling plate includes RS485 level blocks, power supply module, memory module, processor current monitoring mould
Block and reseting input signal Shaping Module；
RS485 level blocks：The serial data transmission line in winding displacement is connected by signal and gathers detected space processor fortune
The test result exported after row test program, and RS485 level signals are changed into, feed back to host computer progress result and show
Show；
Power supply module：Receive the supply voltage of externally fed power supply, the work converted it into needed for detected space processor
Make voltage, connecting the supply lines in winding displacement by signal exports to circuit board；
Memory module：The test program that detected space processor needs to run is stored, the test program includes initial
Change program, register file test program, mathematical computations test program, instruction and data Cache test programs, for realizing to quilt
Survey initialization, register file test, mathematical computations test, the instruction and data Cache tests of spatial processor；
Processor current monitoring module：The operating current of collection detected space processor, and the operating current is believed in real time
Number being converted into voltage signal exports to oscillograph；
Reseting input signal Shaping Module：The reset signal of reception state indicator board, shaping is carried out to the reset signal, and
Exported by reseting signal line and give detected space processor.
The test process of the register file test program is as follows：
(4.1) all register assignments in order to each window, when register all assignment of 8 windows complete it
Afterwards, data are read from each window according still further to identical order, is compared, is recorded in neutron irradiation with original write-in data
The data storage errors number occurred under environment；
(4.2) the various instructions in instruction set are continuously performed, neutron irradiation is read by register file control register
Instruction in the error number that register file EDAC is detected under environment, the instruction set includes one-cycle instruction, multicycle and referred to
Make, arithmetic/logic/displacement commands, access instruction, floating point instruction.
The test process of the mathematical computations test program is as follows：
(5.1) perform successively multiplying program, without symbol division arithmetic program, have symbol division operation program and
Multiply accumulating operation program, it is described to multiply accumulating operation program and include signed and unsigned multiplying accumulating instruction；
(5.2) number of times of record error.
The test process of instruction and data Cache test programs is as follows：
(6.1) test process of Instruction Cache test program is as follows：Refreshing instruction Cache, is then called by a plurality of instruction
The function of composition, consistent image is found by mapping space, and Instruction Cache work is correct if having, otherwise incorrect, record
Incorrect number of times；
(6.2) test process of data Cache test programs is as follows：Institute in refresh data Cache, the Cache that clears data
Some positions, then define an array, read first element of array, according to data Cache cache policy, can be in data
A newline is distributed in Cache and deposits the image of the array, judges data in data Cache whether just by mapping space
Really, data Cache work is correct if correct, otherwise incorrect, records incorrect number of times.
A frame data are made up of following part in the detected space processor test result：
Frame head：Frame head data；
Register file error number：The error number of processor register file test program report；
Arithmetical error number：The operation mistake number of mathematical computations test program report；
Command cache error number：The error number of command cache test program report；
Data cache error numbers：The error number of data cache test programs report；
Postamble：Postamble data.
Compared with prior art, the beneficial effects of the invention are as follows：
(1) present invention establishes SPARC framework spatial processor neutron effect test test systems, can complete neutron spoke
According to when detected space processor operating current monitoring, tested processor test result collection and host computer show, test journey
Sequence storage, tested processor operating voltage set, are tested the functions such as processor state instruction and the input of reset signal.Pass through examination
Test is tried, and the system can complete the transmission and preservation of test result data, and the operating current of monitoring spatial processor, complete in real time
The detection that paired processor breech lock, unit upset and function are interrupted, realizes and carries out neutron effect to SPARC frameworks spatial processor
The assessment of performance.
(2) present invention devises the test program of detected space processor, for realizing to the first of detected space processor
Beginningization, register file test, mathematical computations test, instruction and data Cache tests, above-mentioned test result can react whole comprehensively
The ability of the anti-neutron effect of individual spatial processor.
(3) present invention proposes a kind of form of the serial data frame framing of test result, by Serial Port Transmission to upper
Computer, can clearly acquire the output result of each test program by the serial ports show tools on host computer,
Avoid numerous and diverse test result data analysis process.
Brief description of the drawings
Fig. 1 is pilot system block diagram；
Fig. 2 is observation circuit plate functional block diagram；
Fig. 3 is integrated testability program flow diagram.
Embodiment:
Test system proposed by the present invention includes host computer 1, externally fed power supply 2, oscillograph 4, monitoring and controlling plate
5th, signal connection winding displacement 6 and detected space processor 7, host computer 1, externally fed power supply 2, oscillograph 4 and monitoring
Control panel 5 is placed in Control Room, and detected space processor 7 is placed on circuit board 8, and neutron examination is placed on together with circuit board
Test in the irradiation zone in heap.
Signal connects winding displacement 6：Length 5m, including supply lines, data/address line, serial data transmission line, reseting signal line,
Condition indicative signal line and clock input signal, for connecting monitoring and controlling plate 5 and detected space processor 7.
Host computer 1：The test result of the output of monitoring and controlling plate 5 is received, and is shown.Tester can basis
Test result data on host computer 1 determines whether that bit flipping and function break-up effects are produced.
Externally fed power supply 2：It is connected by BNC connection cables with monitoring and controlling plate 5, is that monitoring and controlling plate 5 is powered.
Oscillograph 4：The operating current monitoring signals of the detected space processor 7 of the output of monitoring and controlling plate 5 are received, and are carried out
Display.
Monitoring and controlling plate 5：The test program that detected space processor 7 needs to run is stored by program storage 12.Bag
Include RS485 level blocks 10, power supply module 11, memory module 12, processor current monitoring module 13 and reset input letter
Number Shaping Module 14.
RS485 level blocks 10：The serial data transmission line connected by signal in winding displacement 6 gathers detected space processor
The test result exported after 7 testing results programs, and RS485 level signals are changed into, feed back to host computer 1 and carry out result
Display；
Power supply module 11：The supply voltage of externally fed power supply 2 is received, is converted it into needed for detected space processor 7
Operating voltage, by signal connect winding displacement 6 in supply lines export to circuit board 8；
Memory module 12：The test program that detected space processor 7 needs to run is stored, the test program is included just
Beginning program, register file test program, mathematical computations test program, instruction and data Cache test programs, for realization pair
Initialization, register file test, mathematical computations test, the instruction and data Cache tests of detected space processor；
Processor current monitoring module 13：On detected space processor 7 after electric or reset, collection detected space processing in real time
The operating current of device 7, and the operating current signal is converted into voltage signal exported to oscillograph 4；Handled by detected space
The operating current of device 7 may determine that whether detected space processor occurs breech lock, can cut off confession when running into breech lock in time
Power supply 2, it is to avoid the burning under latched condition of spatial processor 7.
Reseting input signal Shaping Module 14：The reset signal of reception state indicator board 3, is carried out whole to the reset signal
Shape, and exported by reseting signal line to detected space processor 7.
Detected space processor 7：After electrifying startup or reset, the program storage 12 of automatic cycling operating monitoring and controlling plate 5
Interior test program, and by test result framing into serial data.
Further, test system of the present invention also includes state instruction plate 3.
Monitoring and controlling plate 5 connects the condition indicative signal line in winding displacement 6 by signal and gathers detected space processor in real time
Condition indicative signal, and this signal returned into state instruction plate 3 shown.The real-time reception of state instruction plate 3 is monitored
The condition indicative signal for the detected space processor 7 that control panel 5 is returned, and shown, when condition indicative signal is error,
Reset signal is exported to monitoring and controlling plate 5.After the reset signal of state instruction plate 3 is received, the 5 pairs of resets of monitoring and controlling plate
Signal export after shaping to detected space processor 7, realizes the reset to detected space processor 7.
Also have on state instruction plate and be available for the manually operated SR of operating personnel, for manually to detected space processing
Device is resetted.
Register file test program is mainly comprising two parts, i.e., in spatial processor 7 in the environment of neutron irradiation, one
It is the rotation of register window and the read-write correctness of register in register file in test space processor 7, two be that test is posted
Error detection (hereinafter referred to as register file EDAC) function of storage heap " SECDED ", records the error number detected.
Specific test process is as follows：
(1) the read-write correctness of the rotation of register window and register is tested in register file：To each window during test
All register assignments of mouth.After register all assignment of 8 windows are completed, according still further to identical order from each window
Middle reading data and original write-in data are compared, and record the data storage errors number occurred under neutron irradiation environment；
(2) register file EDAC error number is tested：The various instructions in instruction set are continuously performed, pass through register file control
The instruction that register processed is read in the error number that register file EDAC is detected under neutron irradiation environment, instruction set includes single-revolution
Phase instruction, multi-cycle instructions, arithmetic instruction (or logical order, or displacement commands), access instruction, floating point instruction.
The test process of mathematical computations test program is as follows：
(1) perform successively multiplying program, without symbol division arithmetic program, have the operation program of symbol division and multiply
Accumulating operation program, it is described to multiply accumulating operation program and include signed and unsigned multiplying accumulating instruction；
(2) number of times of record error.
The test process of instruction and data Cache test programs is：
(1) Instruction Cache is tested：Refresh Cache first before Instruction Cache test, it is ensured that the program run before will not
Continue to influence checking below.It is a function by a plurality of instruction definition.The function is called during test, according to Instruction Cache work
Make principle, now this several instructions should be buffered into Instruction Cache, consistent image is found by mapping space, if having
Then Instruction Cache work is correct, otherwise incorrect；Record incorrect number of times.
(2) data Cache is tested：All positions in refresh data Cache, the Cache that clears data.An array is defined,
Read first element of array.According to data Cache cache policy, a newline storage can be distributed in data Cache
The image of the array, judges whether the data in data Cache are correct by mapping space.Record incorrect number of times.
How the present invention sets up complete SPARC framework spatial processor neutron irradiations under neutron irradiation environment if being solved
Effect test test system, completes the test interrupted to processor breech lock, unit upset and function, is completed according to test result
Assessment to hiperspace processor neutron effect performance.The present invention has been used in the neutron irradiation effect of a spatial processor
Answer in field test, by the field test of several wheels, test system operational excellence has obtained carrying out neutron effect to spatial processor
Answer a large amount of authentic and valid test datas required for Performance Evaluation.
Embodiment：
Built by present invention after spatial processor neutron effect test test system, the power supply on monitoring and controlling plate 5
Module 11, there is provided handled to detected space into 3.3V and 1.8V voltages for the 5V photovoltaic conversions for respectively inputting externally fed power supply 2
The IO and kernel of device 7.Processor current monitoring module 13 is realized carries out current monitoring to the tested kernel 1.8V voltages of processor 7,
This electric current is about between 200-400 milliamperes during normal program operation, if more than this operating current, illustrating detected space processor
7 start latch phenomenon occur, it is necessary to cut off working power 2 in time.
Processor is carried out before various tests, first have to carry out processor serial port and various initialization of register, then
Serial ports output 0x55 aa.
The implementation of register file test program：
(1), in register file the rotation of register window and register readwrite tests：The register of one window of each pair
After assignment is complete, window is rotated to next window, continue assignment so that whole register assignments is followed successively by
0x00000000-0x10100111, after whole registers of 8 windows all write completion, then it is from the beginning suitable according to identical
Sequence carrys out data read-out from each window, and the data with original write-in are contrasted, and any data occurs and differs then
Carry out an error count；
(2), register file EDAC error numbers are tested：There are substantial amounts of register, and wherein each register in register file
All it is made up of, is continuously performed during test in the various instructions in instruction set, instruction set 32 data and 7 bit checks code
Instruction include LDD double bytes loading instruct, STD double word store instructions, jump instruction, LDF/STF instructions, logic/displacement commands,
16 are had in the floating point instructions such as FSQRTS/FSQRTD/FSUBS/FSUBD, register file control register (32 bit register)
The number of times of data bit record error, can at most record 65535 register file EDAC and occur once wrong number of times.
Multiply accumulating operation program implementation method in mathematical computations test module：
(1), carry out signless integer multiplying order using UMUL instructions and carry out computing, judge result of calculation；
(2), there are symbol and unsigned integer division instruction to carry out computing using SDIV instructions and UDIV instruction progress, sentence
Disconnected result of calculation；
(3), multiply accumulating instruction using signed and unsigned and tested, completed using assembly instruction, it is continuous respectively
10 UMAC and SMAC instructions are performed, and judge result of calculation.
(4) number of times of record error.
Instruction and data Cache test program implementation methods：
(1), Instruction Cache is tested：Refresh Cache first before test, it is ensured that the program run before will not continue to influence
Checking below.It is a function by 6 " NOP " and 1 " RETL " or 3 " SMUL " and 2 " NOP " instruction definitions.Survey
The function is called during examination, according to Instruction Cache principle, now this 7 instructions or 5 instructions should be buffered into Instruction Cache
In.Close after Cache by ASI mapping spaces, the image consistent with the function address is found in four tunnel groups.If looked for
Arrive, then Instruction Cache test is correct, ELSE instruction Cache test errors；
(2), data Cache is verified：All positions in refresh data Cache first, the Cache that clears data.Define one
A newline, which can be distributed, in array A or B, first elements A [0] of reading array or B [0], data Cache deposits the array
Image.Judge whether to have been allocated for newline by ASI spaces, while caching into whether the data in Cache newlines are correct.
The test result of detected space processor as follows framing into passing through RS485 level blocks after serial data
Host computer is transferred to, the serial ports of host computer is received into instrument is set to data bit/1 of 9600bps baud rates/8 and stop
Position, Hex modes show, serial ports, which receives instrument, can carry out test data and show and the operation such as preservation.
In order to improve the coverage rate and adequacy of test, instruction and data Cache test programs are wrapped according to example above
Two test programs are contained, therefore, now the test result serial ports frame format of detected space processor is as follows：One frame data are by 22
Individual byte, 8 parts composition：
Frame head：0x55 aa (2 byte)
Register file error number：The error number (totally 3 byte) of processor register file test program report
Arithmetical error number：The operation mistake number (totally 3 byte) of mathematical computations test program report
Command cache error number：The error number (totally 3 byte) reported in data cache test programs 1
Command cache error number：The error number (totally 3 byte) reported in data cache test programs 2
Data cache error numbers：The error number (totally 3 byte) reported in command cache test program 1
Data cache error numbers：The error number (totally 3 byte) reported in command cache test program 2
Postamble：0x55 aa (2 byte)
It should be exported when normal：0x 55 aa 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 55 aa；If there are the aa 00 00 07 00 00 04 00 00 01 00 00 00 00 00 00 of 0x 55
00 00 01 55 aa, then it is 7 to illustrate register file error number, and arithmetical error number is 4, data cache test programs 1
Error number is 1, and the error number reported in command cache test program 2 is 1.
Integrated testability process is as shown in Figure 3.
There is register file mistake, arithmetical error or data cache, command cache mistake, illustrate spatial processor
Occur in that unit is overturn.
The effect of state instruction plate 3：By pressing SR thereon, reset signal is exported to monitoring and controlling plate 5, from
And reset detected space processor.
In each test system after electricity, mess code is shown on the serial ports instrument of host computer if having, these unrest can be first removed
Code data.When the abnormal conditions that following several functions are interrupted occur for spatial processor, host computer serial ports is preserved first and shows work
The data of tool, then carry out the processing of abnormal conditions, and method is as follows：
(1), serial ports is without output：SR first on down state indicator board 3, is answered detected space processor
Position, if still not exported after resetting, it is necessary to be powered off and power on operation to outside power supply 2 again, restarting is whole
Individual test system；
(2), serial ports output frame format is chaotic：SR first on down state indicator board 3, to detected space processing
Device is resetted, if still can not be solved after resetting, it is necessary to be powered off and power on operation to outside power supply 2 again, weight
Newly start whole test system；
(3), breech lock：Need again to power off and power on operation whole test system；
(4), the status indicator lamp of state instruction plate 3 is bright：Illustrate that program fleet occurs in detected space processor 7 or operation is wrong
By mistake situation, now state instruction plate 3 to detected space processor 7 export reset signal；
(5), program is for a long time without output result：Reset behaviour is carried out to detected space processor by state instruction plate
Make.
The present invention belongs to general knowledge as well known to those skilled in the art for unspecified part.
Claims (7)
1. a kind of SPARC frameworks spatial processor neutron effect test test system, it is characterised in that：Including host computer
(1), externally fed power supply (2), oscillograph (4), monitoring and controlling plate (5), signal connection winding displacement (6) and detected space processor
(7), the host computer (1), externally fed power supply (2), oscillograph (4) and monitoring and controlling plate (5) are placed on Control Room
In, detected space processor (7) is placed on circuit board (8), and the irradiated site in neutron test reactor is placed on together with circuit board
In domain；
Signal connection winding displacement (6)：Including supply lines, data/address line, serial data transmission line, reseting signal line, state instruction
Signal wire and clock input signal line, for connecting monitoring and controlling plate (5) and detected space processor (7)；
Host computer (1)：The test result of monitoring and controlling plate (5) output is received, and is shown；
Externally fed power supply (2)：Powered for monitoring and controlling plate (5)；
Oscillograph (4)：The operating current monitoring signals of the detected space processor (7) of monitoring and controlling plate (5) output are received, are gone forward side by side
Row display.
Monitoring and controlling plate (5)：Store the test program that detected space processor (7) needs to run；By externally fed power supply (2)
The operating voltage that supply voltage is changed into needed for detected space processor (7), connects winding displacement (6) by signal and exports to circuit board
(8)；After detected space processor (7) electrifying startup or reset, the test result of detected space processor (7) is gathered in real time,
Export and shown and data storage to host computer (1)；It is real after detected space processor (7) electrifying startup or reset
When gather detected space processor operating current signal, export and give oscillograph (4)；
Detected space processor (7)：After electrifying startup or reset, the test program in automatic cycling operating monitoring and controlling plate (5).
2. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 1, its feature exists
In：Also include state instruction plate (3)；At the detected space that state instruction plate (3) the real-time reception monitoring and controlling plate (5) returns
The condition indicative signal of device (7) is managed, and is shown, when condition indicative signal is error, exports multiple to monitoring and controlling plate (5)
Position signal.
Monitoring and controlling plate (5)：Condition indicative signal line in winding displacement (6) is connected by signal and gathers detected space processor in real time
Condition indicative signal, and this signal returned into state instruction plate (3) shown；When receiving state instruction plate (3)
After reset signal, monitoring and controlling plate (5), which to the reset signal export after shaping, gives detected space processor (7), realization pair
The reset of detected space processor (7).
3. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 1, its feature exists
In：The monitoring and controlling plate (5) includes RS485 level blocks (10), power supply module (11), memory module (12), processor
Current monitoring module (13) and reseting input signal Shaping Module (14)；
RS485 level blocks (10)：The serial data transmission line connected by signal in winding displacement (6) gathers detected space processor
(7) test result exported after testing results program, and RS485 level signals are changed into, feed back to host computer (1) progress
As a result show；
Power supply module (11)：The supply voltage of externally fed power supply (2) is received, detected space processor (7) institute is converted it into
The operating voltage needed, the supply lines connected by signal in winding displacement (6), which is exported, gives circuit board (8)；
Memory module (12)：The test program that detected space processor (7) needs to run is stored, the test program is included just
Beginning program, register file test program, mathematical computations test program, instruction and data Cache test programs, for realization pair
Initialization, register file test, mathematical computations test, the instruction and data Cache tests of detected space processor；
Processor current monitoring module (13)：The operating current of collection detected space processor (7), and by the operating current in real time
Signal, which is converted into voltage signal and exported, gives oscillograph (4)；
Reseting input signal Shaping Module (14)：The reset signal of reception state indicator board (3), is carried out whole to the reset signal
Shape, and exported by reseting signal line and give detected space processor (7).
4. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 3, its feature exists
In：The test process of the register file test program is as follows：
(4.1) all register assignments in order to each window, after register all assignment of 8 windows are completed, then
Data are read from each window in that same order, is compared, is recorded in neutron irradiation environment with original write-in data
The data storage errors number of lower appearance；
(4.2) the various instructions in instruction set are continuously performed, neutron irradiation environment is read by register file control register
Instruction in the error number that lower register file EDAC is detected, the instruction set includes one-cycle instruction, multi-cycle instructions, calculation
Art/logic/displacement commands, access instruction, floating point instruction.
5. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 3, its feature exists
In：The test process of the mathematical computations test program is as follows：
(5.1) perform successively multiplying program, without symbol division arithmetic program, have the operation program of symbol division and multiply tired
Plus operation program, it is described to multiply accumulating operation program and include signed and unsigned multiplying accumulating instruction；
(5.2) number of times of record error.
6. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 3, its feature exists
In：The test process of instruction and data Cache test programs is as follows：
(6.1) test process of Instruction Cache test program is as follows：Refreshing instruction Cache, then calls and is made up of a plurality of instruction
Function, consistent image is found by mapping space, Instruction Cache work is correct if having, otherwise incorrect, record is not just
True number of times；
(6.2) test process of data Cache test programs is as follows：It is all in refresh data Cache, the Cache that clears data
Position, then defines an array, reads first element of array, according to data Cache cache policy, can be in data
A newline is distributed in Cache and deposits the image of the array, judges data in data Cache whether just by mapping space
Really, data Cache work is correct if correct, otherwise incorrect, records incorrect number of times.
7. a kind of SPARC frameworks spatial processor neutron effect test test system according to claim 3, its feature exists
In：A frame data are made up of following part in detected space processor (7) test result：
Frame head：Frame head data；
Register file error number：The error number of processor register file test program report；
Arithmetical error number：The operation mistake number of mathematical computations test program report；
Command cache error number：The error number of command cache test program report；
Data cache error numbers：The error number of data cache test programs report；
Postamble：Postamble data.
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