CN107030389B - Method for processing wafer - Google Patents

Method for processing wafer Download PDF

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CN107030389B
CN107030389B CN201610943406.2A CN201610943406A CN107030389B CN 107030389 B CN107030389 B CN 107030389B CN 201610943406 A CN201610943406 A CN 201610943406A CN 107030389 B CN107030389 B CN 107030389B
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wafer
modified layer
line
dividing line
laser beam
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CN107030389A (en
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汤平泰吉
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Disco Corp
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Disco Corp
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/362Laser etching
    • B23K26/364Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/40Removing material taking account of the properties of the material involved
    • B23K26/402Removing material taking account of the properties of the material involved involving non-metallic material, e.g. isolators
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
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  • High Energy & Nuclear Physics (AREA)
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  • Dicing (AREA)
  • Laser Beam Processing (AREA)

Abstract

A method for processing a wafer is provided. A wafer, in which at least the 2 nd planned dividing line out of the 1 st planned dividing line and the 2 nd planned dividing line formed vertically is formed in a discontinuous manner, is divided into device chips, and the wafer processing method includes the steps of: a 1 st direction modified layer forming step of forming a 1 st direction modified layer in the wafer along the 1 st planned dividing line; and a 2 nd direction modified layer forming step of forming a 2 nd direction modified layer inside the wafer along the 2 nd predetermined dividing line. The 2 nd direction modified layer forming step includes a T-line processing step of forming the 2 nd direction modified layer inside a 2 nd predetermined dividing line intersecting the 1 st predetermined dividing line on which the 1 st direction modified layer is formed in a T-line shape. In the T-shaped path processing step, control is performed so that the focal point of the laser beam gradually rises toward the back side of the wafer as the focal point approaches the intersection point of the T-shaped path, and the laser beam having a conical shape does not exceed the 1 st direction-modified layer formed in advance.

Description

Method for processing wafer
Technical Field
The present invention relates to a method for processing a wafer such as a silicon wafer or a sapphire wafer.
Background
A wafer such as a silicon wafer or a sapphire wafer is divided into a plurality of devices such as an IC, an LSI, and an LED by a predetermined dividing line and formed on a front surface thereof, and the wafer is divided into individual device chips by a processing apparatus, and the divided device chips are widely used in various electronic devices such as a mobile phone and a personal computer.
The dicing of the wafer widely employs a dicing method using a cutting device called a scriber. In the dicing method, a cutting blade is rotated at a high speed of about 30000rpm and cut into a wafer to divide the wafer into individual device chips, and abrasive grains such as diamond are reinforced with metal or resin so as to have a thickness of about 30 μm.
On the other hand, in recent years, a method of dividing a wafer into device chips by using a laser beam has been developed and put into practical use. As a method of dividing a wafer into individual device chips using a laser beam, the following 1 st and 2 nd processing methods are known.
The processing method 1 is as follows: a converging point of a laser beam having a wavelength which is transparent to the wafer is positioned inside the wafer corresponding to the lines to be divided, the laser beam is irradiated along the lines to be divided to form modified layers inside the wafer, and then an external force is applied to the wafer by a dividing device to divide the wafer into individual device chips with the modified layers as dividing starting points (for example, refer to japanese patent No. 3408805).
The processing method 2 is as follows: a laser beam having a wavelength (for example, 355nm) that is absorptive for the wafer is irradiated onto a region corresponding to the planned dividing line, a processing groove is formed by ablation processing, and then an external force is applied to divide the wafer into device chips one by one with the processing groove as a division start point (for example, see japanese patent laid-open No. h 10-305420).
In the above-described method 1, machining chips are not generated, and the method has advantages such as minimization of a cutting line and water-free machining as compared with dicing using a conventionally generally used cutting tool, and is widely used.
Further, in the dicing method by laser beam irradiation, there is an advantage that a wafer having a structure in which a line to divide (street) is discontinuous, such as an alternative projection wafer, can be processed (for example, refer to japanese patent application laid-open No. 10-123723). In the processing of a wafer in which the planned dividing lines are discontinuous, the output of a laser beam is turned on/off according to the setting of the planned dividing lines, and the wafer is processed.
Patent document 1: japanese patent No. 3408805
Patent document 2: japanese laid-open patent publication No. 10-305420
Patent document 3: japanese patent laid-open publication No. 2010-123723
However, the following problem occurs in the vicinity of the intersection where the planned dividing line extending in the 2 nd direction and the planned dividing line extending continuously in the 1 st direction meet each other in a T-shaped path.
(1) When a 1 st modified layer is formed in a 1 st line parallel to one side of a device and a 2 nd modified layer is formed in a 2 nd line intersecting the 1 st line in a T-shaped manner, the following problems occur: as the converging point of the laser beam approaches the intersection of the T-shaped paths, a part of the laser beam for processing the 2 nd planned dividing line is irradiated to the 1 st modified layer formed, and the laser beam is reflected or scattered, so that the laser beam leaks to the device region, and the device is damaged by the leaked light, thereby degrading the quality of the device.
(2) On the contrary, when the modified layer is formed in the wafer along the 2 nd planned dividing line meeting the 1 st planned dividing line in a T-shape before the modified layer is formed on the 1 st planned dividing line parallel to one side of the device, there are the following problems: the modified layer which blocks the progress of the crack generated from the modified layer formed in the vicinity of the intersection of the T-shaped paths does not exist at the intersection of the T-shaped paths, and the crack extends by about 1 to 2mm from the intersection of the T-shaped paths to reach the device, thereby reducing the quality of the device.
Disclosure of Invention
The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a wafer processing method capable of preventing reflection or scattering of a laser beam by a modified layer and preventing device damage due to leakage light by suppressing irradiation of a laser beam to an already-formed modified layer in the vicinity of an intersection where an end of one planned dividing line and the other planned dividing line meet each other in a T-shaped path when performing laser processing on a wafer in which at least one planned dividing line is formed in a discontinuous manner.
According to the present invention, there is provided a method of processing a wafer in which devices are formed in respective regions defined by a plurality of 1 st planned dividing lines formed in a 1 st direction and a plurality of 2 nd planned dividing lines formed in a 2 nd direction intersecting with the 1 st direction, and at least the 2 nd planned dividing line of the 1 st planned dividing line and the 2 nd planned dividing line is formed in a discontinuous manner, the method of processing the wafer dividing the wafer into individual device chips, the method comprising the steps of: a 1 st direction modified layer forming step of converging a laser beam having a wavelength that is transparent to the wafer from the back surface side of the wafer into the wafer along the 1 st line to irradiate the wafer, and forming a plurality of 1 st direction modified layers along the 1 st line in the wafer; a 2 nd direction modified layer forming step of irradiating the wafer with a laser beam having a wavelength which is transparent to the wafer by converging the laser beam into the wafer from the back surface side of the wafer along the 2 nd planned dividing line after the 1 st direction modified layer forming step is performed, and forming a plurality of 2 nd direction modified layers along the 2 nd planned dividing line in the wafer; and a dividing step of applying an external force to the wafer after the 1 st direction modified layer forming step and the 2 nd direction modified layer forming step are performed, and dividing the wafer into individual device chips by breaking the wafer along the 1 st dividing line and the 2 nd dividing line with the 1 st direction modified layer and the 2 nd direction modified layer as break start points, wherein the 2 nd direction modified layer forming step includes a T-shaped path processing step of forming the 2 nd direction modified layer inside the 2 nd dividing line intersecting with the 1 st dividing line on which the 1 st direction modified layer is formed in a T-shaped path, and in the T-shaped path processing step, control is performed so that a converging point of the laser beam gradually rises toward the back surface side of the wafer as the converging point approaches an intersection point of the T-shaped path, and the laser beam does not exceed the 1 st direction modified layer.
According to the method of processing a wafer of the present invention, in the T-shaped path processing step, since the converging point of the laser beam is controlled so as to gradually rise toward the back surface side of the wafer as the converging point approaches the intersection point of the T-shaped path, and the laser beam having a conical shape does not exceed the 1 st direction-modified layer, the conical laser beam does not collide with the 1 st direction-modified layer when the 2 nd direction-modified layer is formed, and therefore, leakage light due to scattering or reflection of the laser beam does not occur, and therefore, the problem that the leakage light attacks the device and damages the device can be solved. Therefore, an appropriate modified layer can be formed inside the wafer along the lines to divide without degrading the quality of the device.
Drawings
Fig. 1 is a perspective view of a laser processing apparatus suitable for carrying out the wafer processing method of the present invention.
Fig. 2 is a block diagram of a laser beam generating unit.
Fig. 3 is a perspective view of a semiconductor wafer suitable for processing by the wafer processing method of the present invention.
Fig. 4 is a perspective view showing the 1 st direction modified layer forming step.
Fig. 5 is a schematic cross-sectional view showing the modified layer forming step in the 1 st direction.
Fig. 6 is a schematic plan view showing a T-lane processing step.
Fig. 7 is a sectional view showing a T-shaped path processing step.
Fig. 8 is a perspective view of the partitioning device.
Fig. 9 (a) and (B) are sectional views showing the dividing step.
Description of the reference symbols
11: a semiconductor wafer; 13 a: a 1 st division predetermined line; 13 b: a 2 nd division predetermined line; 15: a device; 17: 1 st direction-modified layer; 19: a 2 nd direction-changing layer; 24: a chuck table; 34: a laser beam irradiation unit; 35: a laser beam generating unit; 38: a condenser (laser head); 40: a shooting unit; 50: and a dividing device.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to fig. 1, a perspective view of a laser processing apparatus 2 suitable for carrying out the wafer processing method according to the embodiment of the present invention is shown. The laser processing apparatus 2 includes a pair of guide rails 6 mounted on the stationary base 4 and extending in the Y-axis direction.
The Y-axis moving block 8 is moved in the index feeding direction, i.e., the Y-axis direction by a Y-axis feeding mechanism (Y-axis feeding unit) 14 including a ball screw 10 and a pulse motor 12. A pair of guide rails 16 extending in the X-axis direction are fixed to the Y-axis moving block 8.
The X-axis moving block 18 is guided on the guide rail 16 by an X-axis feeding mechanism (X-axis feeding means) 28 composed of a ball screw 20 and a pulse motor 22, and the X-axis moving block 18 is moved in the machining feed direction, that is, the X-axis direction.
A chuck table 24 is mounted on the X-axis moving block 18 via a cylindrical support member 30. A plurality of (4 in the present embodiment) jigs 26 for clamping the annular frame F shown in fig. 4 are arranged on the chuck table 24.
The post 32 is disposed upright behind the base 4. A housing 36 of the laser beam irradiation unit 34 is fixed to the column 32. The laser beam irradiation unit 34 includes: a laser beam generating unit 35 housed in the case 36; and a condenser (laser head) 38 attached to the front end of the housing 36. The condenser 38 is attached to the housing 36 so as to be capable of fine movement in the vertical direction (Z-axis direction).
As shown in fig. 2, the laser beam generating unit 35 includes: a laser oscillator 42 such as a YAG laser oscillator or a YVO4 laser oscillator that oscillates a pulsed laser having a wavelength of 1342 nm; a repetition frequency setting unit 44; a pulse width adjusting unit 46; and a power adjustment unit 48 that adjusts the power of the pulse laser beam oscillated from the laser oscillator 42.
A photographing unit 40 is mounted on the front end of the housing 36 of the laser beam irradiation unit 34, and the photographing unit 40 has a microscope and a camera for photographing the wafer 11 held on the chuck table 24. The condenser 38 and the imaging unit 40 are arranged in line in the X-axis direction.
Referring to fig. 3, a front side perspective view of a semiconductor wafer (hereinafter, may be simply referred to as a wafer) 11 suitable for processing by the wafer processing method of the present invention is shown. A plurality of lines to divide 1 13a formed continuously in the 1 st direction and a plurality of lines to divide 2 13b formed discontinuously in the direction perpendicular to the lines to divide 1 13a are formed on the front surface 11a of the wafer 11, and devices 15 such as an LSI are formed in regions defined by the lines to divide 1 13a and the lines to divide 2 13 b.
In carrying out the wafer processing method according to the embodiment of the present invention, the wafer 11 is formed as a frame unit as follows: the front surface of the wafer 11 is adhered to a dicing tape T as an adhesive tape having an outer peripheral portion adhered to a ring-shaped frame F, the wafer 11 is placed on the chuck table 24 in the form of a frame unit and is sucked and held via the dicing tape T, and the ring-shaped frame F is held and fixed by a jig 26.
Although not particularly shown, in the wafer processing method of the present invention, alignment is first performed, the wafer 11 sucked and held by the chuck table 24 is positioned directly below the imaging unit 40 of the laser processing apparatus 2, the wafer 11 is imaged by the imaging unit 40, and the 1 st line to be divided 13a and the condenser 38 are aligned in the X-axis direction.
Next, after the chuck table 24 is rotated by 90 °, the same alignment is performed also on the 2 nd planned dividing line 13b elongated in the direction perpendicular to the 1 st planned dividing line 13a, and the aligned data is stored in the RAM of the controller of the laser processing apparatus 2.
Since the imaging unit 40 of the laser processing apparatus 2 generally includes an infrared camera, the 1 st and 2 nd lines to be divided 13a and 13b formed on the front surface 11a can be detected by the infrared camera through the wafer 11 from the back surface 11b side of the wafer 11.
After the alignment, the 1 st direction modified layer forming step is performed to form the 1 st direction modified layer 17 inside the wafer 11 along the 1 st line to divide 13 a. In the 1 st direction modified layer forming step, as shown in fig. 4 and 5, the condenser 38 positions a converging point of a laser beam having a wavelength (e.g., 1342nm) that is transparent to the wafer inside the wafer 11, irradiates the 1 st line 13a from the back surface 11b side of the wafer 11, and performs processing feed in the direction of arrow X1 in fig. 5 on the chuck table 24, thereby forming the 1 st direction modified layer 17 along the 1 st line 13a inside the wafer 11.
Preferably, the condenser 38 is moved upward stepwise to form a plurality of 1 st direction-modified layers 17, for example, 5 1 st direction-modified layers 17, in the wafer 11 along the 1 st line to divide 13 a.
The modified layer 17 is a region having a density, a refractive index, a mechanical strength, or other physical properties different from those of the surrounding area, and is formed as a melt-resolidified layer. The processing conditions in the 1 st direction modified layer forming step are set as follows, for example.
Light source: LD actuates Q-switch Nd: YVO4 pulse laser
Wavelength: 1342nm
Repetition frequency: 50kHz
Average output: 0.5W
Diameter of the light-condensing spot:
Figure BDA0001139071420000061
processing feed speed: 200mm/s
After the 1 st direction modified layer forming step is performed, the 2 nd direction modified layer forming step is performed, in which a 2 nd planned dividing line 13b meeting the 1 st planned dividing line 13a along an end in the extending direction (extending direction) in a T-shaped path is irradiated with a laser beam having a wavelength (e.g., 1342nm) that is transparent to the wafer 11 while being condensed inside the wafer 11, and a 2 nd direction modified layer 19 along the 2 nd planned dividing line 13b is formed inside the wafer 11.
In the 2 nd direction modified layer forming step, after the chuck table 24 is rotated by 90 °, the 2 nd direction modified layers 19 of a plurality of layers along the 2 nd line to divide 13b are formed inside the wafer 11.
The 2 nd direction modified layer forming step includes a T-line processing step of forming the 2 nd direction modified layer 19 inside the 2 nd line 13b intersecting the 1 st line 13a in which the 1 st direction modified layer 17 is formed in a T-line.
The T-line processing step will be described with reference to fig. 7. Here, since the numerical aperture of the condenser lens provided in the condenser 38 is usually set to a large value, the laser beam LB is condensed in a conical shape as shown in fig. 7.
In the T-shaped processing step of the present invention, as shown in fig. 6 and 7, the converging point of the laser beam LB is gradually raised toward the back surface 11b of the wafer 11 as the converging point of the laser beam LB approaches the intersection of the T-shaped paths, and a part of the conical laser beam LB is controlled so as not to exceed the 1 st direction-modified layer 17 formed previously.
In forming the 2 nd direction-changing layer 19 having a plurality of layers, the converging point of the laser beam LB is controlled to gradually rise toward the back surface 11b of the wafer 11 as the converging point approaches the intersection of the T-shaped paths so that a part of the conical laser beam LB does not exceed the 1 st direction-changing layer 17 formed previously.
Since the X-coordinate and the Y-coordinate of the position where the 2 nd line 13b meets the 1 st line 13a in the T-shaped path are determined in advance, they are stored in the memory of the controller of the laser processing apparatus 2 in advance. The coordinates of the focal point of the laser beam LB are also stored in the memory.
By storing the coordinate values of the converging point in the memory in advance, the controller of the laser processing apparatus 2 automatically controls the position of the converging point in the T-line processing step to gradually rise toward the back surface 11b of the wafer 11.
In the T-shaped processing step of the present invention, since the converging point of the laser beam LB is controlled so as to gradually rise toward the back surface 11b of the wafer 11 as the converging point approaches the intersection of the T-shaped paths and so as to make a part of the conical laser beam LB not to exceed the 1 st direction-modified layer 17 formed in advance, the conical laser beam does not collide with the 1 st direction-modified layer 17 when the T-shaped processing step is performed, and leakage light due to scattering or reflection of the laser beam does not occur. This eliminates the problem that the leaked light attacks the device 15 and damages the device 15.
After the 1 st direction modified layer forming step and the 2 nd direction modified layer forming step are performed, a dividing step is performed in which an external force is applied to the wafer 11 to break the wafer 11 along the 1 st planned dividing line 13a and the 2 nd planned dividing line 13b with the 1 st direction modified layer 17 and the 2 nd direction modified layer 19 as breaking points, thereby dividing the wafer into individual device chips.
This dividing step is performed using, for example, a dividing device (expanding device) 50 shown in fig. 8. The dividing apparatus 50 shown in fig. 8 includes: a frame holding unit 52 that holds the ring frame F; and a tape expanding unit 54 that expands the dicing tape T fitted on the ring-shaped frame F held by the frame holding unit 52.
The frame holding means 52 is composed of an annular frame holding member 56 and a plurality of clamps 58 as fixing means disposed on the outer periphery of the frame holding member 56. A mounting surface 56a on which the ring frame F is mounted is formed on the upper surface of the frame holding member 56, and the ring frame F is mounted on the mounting surface 56 a.
The annular frame F placed on the placement surface 56a is fixed to the frame holding unit 52 by the jig 58. The frame holding unit 52 configured in this way is supported by the belt expanding unit 54 so as to be movable in the vertical direction.
The tape expanding unit 54 has an expanding drum 60 disposed inside the annular frame holding member 56. The upper end of the expansion drum 60 is closed by a cover 62. The expanding drum 60 has an inner diameter smaller than that of the ring frame F and larger than the outer diameter of the wafer 11 stuck on the dicing tape T fitted on the ring frame F.
The expansion drum 60 has a support flange 64 integrally formed at a lower end thereof. The belt expanding unit 54 further includes a driving unit 66 that moves the annular frame holding member 56 in the vertical direction. The driving unit 66 is constituted by a plurality of air cylinders 68 disposed on the support flange 64, and a piston rod 70 thereof is coupled to the lower surface of the frame holding member 56.
The drive unit 66, which is composed of a plurality of air cylinders 68, vertically moves the annular frame holding member 56 between a reference position where the placement surface 56a of the frame holding member 56 and the front surface of the cover 62, which is the upper end of the expansion drum 60, are at substantially the same height, and an expanded position located below the upper end of the expansion drum 60 by a predetermined amount.
A step of dividing the wafer 11 by using the dividing apparatus 50 configured as described above will be described with reference to fig. 9. As shown in fig. 9 (a), an annular frame F supporting the wafer 11 with a dicing tape T interposed therebetween is placed on the placement surface 56a of the frame holding member 56, and is fixed to the frame holding member 56 by a jig 58. At this time, the frame holding member 56 is positioned at a reference position where the placement surface 56a thereof is at substantially the same height as the upper end of the expansion drum 60.
Next, the air cylinder 68 is driven to lower the frame holding member 56 to the expanded position shown in fig. 9 (B). Thus, the ring frame F fixed to the mounting surface 56a of the frame holding member 56 is lowered, and the dicing tape T attached to the ring frame F is spread mainly in the radial direction while being in contact with the upper end edge of the spreading drum 60.
As a result, tensile force is radially applied to the wafer 11 attached to the dicing tape T. When the pulling force is applied radially to the wafer 11 in this manner, the 1 st direction-modified layer 17 formed along the 1 st line 13a and the 2 nd direction-modified layer 19 formed along the 2 nd line 13b become the dividing points, and the wafer is broken along the 1 st line 13a and the 2 nd line 13b and is divided into the device chips 21.
In the above-described embodiment, the semiconductor wafer 11 was described as the wafer to be processed by the processing method of the present invention, but the wafer to be processed by the present invention is not limited thereto, and the processing method of the present invention can be similarly applied to other wafers such as an optical device wafer in which sapphire is used as a substrate.

Claims (1)

1. A method of processing a wafer in which devices are formed in respective regions defined by a plurality of 1 st planned dividing lines formed in a 1 st direction and a plurality of 2 nd planned dividing lines formed in a 2 nd direction intersecting the 1 st direction, and at least the 2 nd planned dividing line of the 1 st planned dividing line and the 2 nd planned dividing line is formed in a discontinuous manner, the method of processing the wafer dividing the wafer into individual device chips,
the processing method of the wafer comprises the following steps:
a 1 st direction modified layer forming step of converging a laser beam having a wavelength that is transparent to the wafer from the back surface side of the wafer into the wafer along the 1 st line to irradiate the wafer, and forming a 1 st direction modified layer in a plurality of layers along the 1 st line in the wafer;
a 2 nd direction modified layer forming step of irradiating the wafer with a laser beam having a wavelength which is transparent to the wafer by converging the laser beam into the wafer from the back surface side of the wafer along the 2 nd planned dividing line after the 1 st direction modified layer forming step is performed, and forming a plurality of 2 nd direction modified layers along the 2 nd planned dividing line in the wafer; and
a dividing step of applying an external force to the wafer after the 1 st direction modified layer forming step and the 2 nd direction modified layer forming step are performed, and dividing the wafer into individual device chips by breaking the wafer along the 1 st planned dividing line and the 2 nd planned dividing line with the 1 st direction modified layer and the 2 nd direction modified layer as breaking start points,
the 2 nd direction modified layer forming step includes a T-line processing step of: forming a 2 nd direction-modifying layer inside the 2 nd predetermined dividing line intersecting the 1 st predetermined dividing line in which the 1 st direction-modifying layer is formed in a T-shape,
in the T-line processing step, the converging point of the laser beam is gradually raised toward the back surface side of the wafer as the converging point approaches the intersection point of the T-lines, and the conical laser beam is controlled not to collide with the 1 st direction modified layer, thereby suppressing the leakage light generated by scattering or reflection of the laser beam and avoiding the leakage light from attacking the device to damage the device.
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JP6855127B2 (en) * 2017-06-05 2021-04-07 株式会社ディスコ Chip manufacturing method
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Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10305420A (en) 1997-03-04 1998-11-17 Ngk Insulators Ltd Method for fabricating matrix made up of oxide single crystal and method for manufacturing functional device
JP3408805B2 (en) 2000-09-13 2003-05-19 浜松ホトニクス株式会社 Cutting origin region forming method and workpiece cutting method
JP4471852B2 (en) * 2005-01-21 2010-06-02 パナソニック株式会社 Semiconductor wafer, manufacturing method using the same, and semiconductor device
JP4630731B2 (en) * 2005-05-30 2011-02-09 株式会社ディスコ Wafer division method
JP2007021514A (en) * 2005-07-13 2007-02-01 Seiko Epson Corp Scribe forming method, and substrate with division projected line
JP2010123723A (en) 2008-11-19 2010-06-03 Disco Abrasive Syst Ltd Laser processing method of wafer
JP2011035253A (en) * 2009-08-04 2011-02-17 Disco Abrasive Syst Ltd Method of processing wafer
JP2011108708A (en) * 2009-11-13 2011-06-02 Disco Abrasive Syst Ltd Method of processing wafer
JP5597051B2 (en) * 2010-07-21 2014-10-01 浜松ホトニクス株式会社 Laser processing method
JP5597052B2 (en) * 2010-07-21 2014-10-01 浜松ホトニクス株式会社 Laser processing method
JP6214192B2 (en) * 2013-04-11 2017-10-18 株式会社ディスコ Processing method
JP6062315B2 (en) * 2013-04-24 2017-01-18 株式会社ディスコ Wafer processing method
JP6148075B2 (en) * 2013-05-31 2017-06-14 株式会社ディスコ Laser processing equipment
JP6113019B2 (en) * 2013-08-07 2017-04-12 株式会社ディスコ Wafer division method

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