CN106992116B - Method, array substrate and the display device of manufacturing semiconductor devices - Google Patents
Method, array substrate and the display device of manufacturing semiconductor devices Download PDFInfo
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- CN106992116B CN106992116B CN201710262696.9A CN201710262696A CN106992116B CN 106992116 B CN106992116 B CN 106992116B CN 201710262696 A CN201710262696 A CN 201710262696A CN 106992116 B CN106992116 B CN 106992116B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 150
- 239000000758 substrate Substances 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims description 38
- 238000000151 deposition Methods 0.000 claims abstract description 14
- 238000001035 drying Methods 0.000 claims abstract description 9
- 239000007921 spray Substances 0.000 claims abstract description 7
- 230000008569 process Effects 0.000 claims description 16
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 238000000059 patterning Methods 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 7
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 claims description 7
- 239000011787 zinc oxide Substances 0.000 claims description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 3
- 229910003437 indium oxide Inorganic materials 0.000 claims description 3
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 3
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 claims description 3
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 3
- 229910001887 tin oxide Inorganic materials 0.000 claims description 3
- 229910052725 zinc Inorganic materials 0.000 claims description 3
- 239000011701 zinc Substances 0.000 claims description 3
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 230000008859 change Effects 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 150000002927 oxygen compounds Chemical class 0.000 claims 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- ZPBLKGWQKXKXOZ-UHFFFAOYSA-N yttrium zinc Chemical compound [Zn].[Y] ZPBLKGWQKXKXOZ-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 description 105
- 230000008021 deposition Effects 0.000 description 7
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 7
- 230000037230 mobility Effects 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- 238000000137 annealing Methods 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000007800 oxidant agent Substances 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 238000001556 precipitation Methods 0.000 description 3
- -1 ZTO Chemical compound 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- NQBRDZOHGALQCB-UHFFFAOYSA-N oxoindium Chemical compound [O].[In] NQBRDZOHGALQCB-UHFFFAOYSA-N 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- QHGNHLZPVBIIPX-UHFFFAOYSA-N tin(II) oxide Inorganic materials [Sn]=O QHGNHLZPVBIIPX-UHFFFAOYSA-N 0.000 description 2
- UTGMRVNJUMTNIU-UHFFFAOYSA-N zinc oxygen(2-) yttrium(3+) Chemical compound [O-2].[Zn+2].[Y+3] UTGMRVNJUMTNIU-UHFFFAOYSA-N 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000010010 raising Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
Present disclose provides a kind of method of manufacturing semiconductor devices, a kind of array substrate and a kind of display devices.The method of manufacturing semiconductor devices includes: in the first oxide semiconductor layer of substrate disposed thereon, by H2O2On spray solution to the first oxide semiconductor layer；Using ultraviolet light H2O2Solution, to promote H therein2O2It decomposes；And it will be present in H on the first oxide semiconductor layer2O2Solution drying, and continue depositing second oxide semiconductor layer.
Description
Technical field
This disclosure relates to field of display technology, and relate more specifically to a kind of method of manufacturing semiconductor devices, a kind of packet
Include the array substrate and a kind of display device including the array substrate of the semiconductor devices.
Background technique
With the development of flat panel display, the display device using thin film transistor (TFT) (TFT) as switch element is by pass
Note., the light-weight, product small in size with its using the liquid crystal display device of silicon materials (amorphous silicon and polysilicon) TFT as driving unit
The advantages that matter is high and be widely used.However, that there are field-effect mobilities is low, light sensitivity is strong, material is opaque etc. for amorphous silicon
Disadvantage, and multi-crystal TFT be applied to large size panel when be difficult to realize there are complex manufacturing technology, low temperature process the shortcomings that.
Oxide semiconductor becomes current display panel industry due to its high transmittance, high mobility and low deposition temperature
Research and development focus.But for high resolution display part, there is still a need for raisings for the mobility of oxide semiconductor.In addition,
The stability for improving oxide semiconductor is also a research and development difficult point.
In response to the above problems, although having carried out needing to research and develop in the art, remarkable effect is not obtained yet.
Summary of the invention
Present disclose provides a kind of method of manufacturing semiconductor devices, a kind of array substrate and a kind of display devices.
According to the one side of the disclosure, a kind of method of manufacturing semiconductor devices is provided, which comprises in substrate
The first oxide semiconductor layer of disposed thereon, by H2O2On spray solution to the first oxide semiconductor layer；Using ultraviolet light
H2O2Solution, to promote H therein2O2It decomposes；And it will be present in H on the first oxide semiconductor layer2O2Solution drying, and
Continue depositing second oxide semiconductor layer.
It in one embodiment of the present disclosure, can be in base before the first oxide semiconductor layer of substrate disposed thereon
Grid and gate insulating layer are sequentially formed on plate.
In one embodiment of the present disclosure, after depositing second oxide semiconductor layer, patterning processes shape can be passed through
At semiconductor pattern, the semiconductor pattern includes the first oxide semiconductor layer and the second oxide semiconductor layer.
In one embodiment of the present disclosure, it deposited metal layer and can be formed by patterning processes on semiconductor pattern
Source electrode and drain electrode.
In one embodiment of the present disclosure, H2O2The concentration range of solution can be about 5 weight % to about 20 weights
Measure %.
In one embodiment of the present disclosure, the first oxide semiconductor layer and the second oxide semiconductor layer can be by not
Same semiconductor material is formed.
In one embodiment of the present disclosure, the first oxide semiconductor layer and the second oxide semiconductor layer respectively by from
Including (ZnO), indium oxide (InO), tin oxide (SnO), zinc-tin oxide (ZTO), aluminum zinc oxide (AZO), indium gallium zinc
(IGZO), what is selected in yttrium oxide zinc (YZO) and the conductor oxidate of indium tin zinc oxide (ITZO) at least one forms.
In one embodiment of the present disclosure, the second oxide semiconductor layer can be deposited under oxygen-free atmosphere.
According to another aspect of the present disclosure, a kind of array substrate is provided, the array substrate includes that basis is described above
Method manufacture semiconductor devices.
According to another aspect of the present disclosure, display device is provided, the display device includes array base described above
Plate.
By using the method for the manufacturing semiconductor devices of the disclosure, can provide a kind of high mobility, low defect half
Conductor device, and the bias stability of oxide TFT device can be effectively improved.It is used in disclosed method
H2O2By ultraviolet light, OH group can be resolved into, the metal that can be used as in oxidant and oxide semiconductor lacks
It falls into and chemisorption occurs, while reducing the negative defect charge between channel region and the interface of gate insulating layer, so as to
To effectively improve the mobility of oxide semiconductor layer and the bias stability of obtained semiconductor devices.In addition, second
Oxide semiconductor layer deposits under oxygen-free atmosphere, so as to promote its electric property, and can reduce itself and source/drain
Between contact resistance.
Detailed description of the invention
Including attached drawing to provide further understanding of the disclosure, attached drawing is incorporated herein and forms one of the application
Point, attached drawing shows embodiment of the disclosure, and together with the description for explaining the principles of this disclosure.In the accompanying drawings:
Fig. 1 to Fig. 3 is the schematic flow chart for showing the method for manufacturing semiconductor devices according to an embodiment of the present disclosure.
Specific embodiment
It will be appreciated that when element or layer are referred to as in another element or layer "upper" or " being connected to " another element or layer
When, the element or layer can directly on another element or layer, be directly connected to or be bonded directly to another element or layer, or
There may also be intermediary element or middle layers.On the contrary, when element is referred to as " direct " in another element or layer "upper" or " direct
It is connected to " another element or when layer, intermediary element or middle layer is not present.Same label indicates same element always.Such as
Used herein, term "and/or" includes any combination and all combinations of project listed by one or more correlations.
For ease of description, spatially relative term can be used herein, as "lower", " in ... top ", "upper", " ... under
Side " etc. describes the relationships of an elements or features and other elements or features as illustrated in the drawing.It will be appreciated that space phase
Term is intended to comprising the different direction of device in use or operation other than the orientation being described in the accompanying drawings.
As used herein, unless the context clearly indicates otherwise, otherwise singular is " one (kind) " and " described
(being somebody's turn to do) " is also intended to include plural form.It will be further understood that term "comprising" and/or " comprising " ought be used in the present specification
When, illustrate that there are the feature, entirety, step, operation, element and/or component, but do not preclude the presence or addition of one or more
Other feature, entirety, step, operation, element, component and/or their group.
It generally says, the method according to the manufacturing semiconductor devices of the embodiment of the present disclosure includes: in substrate disposed thereon
Monoxide semiconductor layer, by H2O2On spray solution to the first oxide semiconductor layer；Using ultraviolet light H2O2Solution,
To promote H therein2O2It decomposes；And it will be present in H on the first oxide semiconductor layer2O2Solution drying, and continue to deposit
Second oxide semiconductor layer.
The H of use2O2OH group can be resolved by ultraviolet light, and OH group can be used as oxidant with
Chemisorption occurs for metal defect in oxide semiconductor, at the same reduce channel region and gate insulating layer interface it
Between negative defect charge, so as to effectively improve oxide semiconductor layer mobility and final obtained semiconductor devices
Bias stability.
It in one embodiment, can be on substrate sequentially before the first oxide semiconductor layer of substrate disposed thereon
Ground forms grid and gate insulating layer.It is then possible to deposit the first oxide semiconductor layer on gate insulating layer.
In addition, after depositing second oxide semiconductor layer semiconductor pattern can be formed by patterning processes, wherein half
Conductive pattern includes the first oxide semiconductor layer and the second oxide semiconductor layer.It is then possible to selectively execute annealing
Technique.It is then possible to deposited metal layer and form source electrode and drain electrode by patterning processes on semiconductor pattern.
In one embodiment, the H of use2O2The concentration range of solution can be about 5 weight % to about 20 weights
Measure %.It should be understood, however, that H2O2The concentration of solution is not particularly limited, those skilled in the art can according to actual needs into
Row selection and setting.
In addition, the exposure intensity of ultraviolet light can be about 100 nits to about 10000 nits, and irradiation time can be with
It is about 1 minute to about 5 minutes.It should be understood, however, that the exposure intensity and irradiation time of ultraviolet light are not particularly limited, this
Field technical staff can select and set according to actual needs.
In one embodiment, the first oxide semiconductor layer can have the thickness of about 20nm to about 50nm, the
Dioxide semiconductor layer can have the thickness of about 5nm to about 20nm, and the thickness of the first oxide semiconductor layer can be with
Greater than the thickness of the second oxide semiconductor layer.
First oxide semiconductor layer and the second oxide semiconductor layer can be by same or different semiconductor materials
(for example, conductor oxidate) is formed.For example, being used to form the first oxide semiconductor layer and the second oxide semiconductor layer
Material is selected from zinc oxide (ZnO), indium oxide (InO), tin oxide (SnO), zinc-tin oxide (ZTO), aluminum zinc oxide (AZO), oxygen
At least one of change indium gallium zinc (IGZO), yttrium oxide zinc (YZO) and indium tin zinc oxide (ITZO).
Hereinafter, the disclosure is explained in detail with reference to the accompanying drawings.
Referring to Fig. 1, side deposits the first oxide semiconductor layer 2 on substrate 1.Substrate 1 can be inorganic substrate or organic
Substrate, and can be transparent, opaque or translucent.For example, substrate 1 can be from glass substrate, quartz base plate,
The transparent substrate selected in transparent resin substrate etc. with certain robustness and is light transmission.
First oxide semiconductor layer 2 can be formed by deposited semiconductor oxide.For example, conductor oxidate can
To be selected from ZnO, InO, SnO, ZTO, AZO, IGZO, YZO and ITZO.In the disclosure, conductor oxidate is not limited to above-mentioned
Material.
Optionally, it can be sequentially formed on substrate 1 before the first oxide semiconductor layer 2 of side's deposition on substrate 1
Grid and gate insulating layer.It is then possible to deposit the first oxide semiconductor layer 2 on gate insulating layer.
Grid can be by general electrode material (for example, metal, alloy, conductive metal oxide, conductive metal nitride
Deng) formed.In addition, grid can have single layer structure or multilayered structure.
For example, can on such as glass substrate deposition of electrode material, then electrode material successively carry out gluing, expose
Light, development, etching and removing, to obtain the grid with desired pattern.
Then, gate insulating layer is formed on the substrate 1 for being formed with grid, gate insulating layer can be by SiNxOr SiO2Shape
At.
In one embodiment, the first oxide semiconductor layer 2 can have the thickness model of about 20nm to about 50nm
It encloses.
Referring to fig. 2, by H2O2Solution 3, which is sprayed onto, to be formed by the first oxide semiconductor layer 2.H2O2Solution 3 can have
There is the concentration range of about 5 weight % to about 20 weight %, however the present disclosure is not limited thereto.
It is then possible to using ultraviolet light H2O2Solution 3, to promote H therein2O2Resolve into OH group.
In one embodiment, the exposure intensity of ultraviolet light can be about 100 nits to about 10000 nits, and shine
Penetrating the time can be about 1 minute to about 5 minutes.
It is sent out as described above, the OH group being decomposed to form can be used as the metal defect in oxidant and oxide semiconductor
Biochemical suction-operated, while the negative defect charge between channel region and the interface of gate insulating layer is reduced, so as to have
Improve the mobility of oxide semiconductor layer and the bias stability of final semiconductor devices obtained in effect ground.
Referring to Fig. 3, in the H that will be present on the first oxide semiconductor layer 22O2After solution drying, continue deposition second
Oxide semiconductor layer 4.Second oxide semiconductor layer 4 can have the thickness of about 5nm to about 20nm.In addition, first
The thickness of oxide semiconductor layer 2 is greater than the thickness of the second oxide semiconductor layer 4.
In addition, the second oxide semiconductor layer 4 can by with the semiconductor material phase that forms the first oxide semiconductor layer 2
Same or different semiconductor material is formed.For example, the second oxide semiconductor layer 4 can by from ZnO, InO, SnO, ZTO, AZO,
At least one of the group selection of IGZO, YZO and ITZO composition is formed.
In one embodiment, can sink after the surface for drying the first oxide semiconductor layer 2 in oxygen-free atmosphere
The second oxide semiconductor layer 4 is accumulated to desired thickness.
Since the second oxide semiconductor layer 4 deposits under oxygen-free atmosphere, the second oxide semiconductor can be promoted
The electric property of layer 4, and its contact resistance between source/drain can be reduced.
Optionally, after depositing second oxide semiconductor layer 4, semiconductor pattern, semiconductor are formed by patterning processes
Pattern includes the first oxide semiconductor layer 2 and the second oxide semiconductor layer 4.It is then possible to be deposited on semiconductor pattern
Metal layer simultaneously forms source electrode and drain electrode by patterning processes.
The method of the manufacturing semiconductor devices of the disclosure is illustratively described to example 3 below by example 1.
Example 1
Firstly, forming grid and gate insulating layer on the glass substrate.Then, it is formed on gate insulating layer by deposition
With a thickness of the first oxide semiconductor layer of 20nm.Here, using IGZO as forming partly leading for the first oxide semiconductor layer
Oxide body.
Then, the H for being 15 weight % by concentration2O2On spray solution to the surface of the first oxide semiconductor layer, adopt simultaneously
With ultraviolet light, to promote H therein2O2Resolve into OH group.The irradiation time of ultraviolet light is 1 minute, and exposure intensity is
5000 nits.
Then, it will be present in the H on the first oxide semiconductor layer2O2Solution drying, and continue to deposit under oxygen-free atmosphere
Second oxide semiconductor layer to 10nm thickness.Here, using IGZO as forming partly leading for the second oxide semiconductor layer
Oxide body.
Next, semiconductor pattern can be formed by patterning processes, annealing process can be executed, then so as to obtain
Obtain stable IGZO semiconductor film.It is alternatively possible to Direct precipitation metal layer and pass through patterning processes on semiconductor pattern
Form source electrode and drain electrode.
Example 2
Firstly, forming grid and gate insulating layer on the glass substrate.Then, it is formed on gate insulating layer by deposition
With a thickness of the first oxide semiconductor layer of 30nm.Here, using ITZO as forming partly leading for the first oxide semiconductor layer
Oxide body.
Then, the H for being 10 weight % by concentration2O2On spray solution to the surface of the first oxide semiconductor layer, adopt simultaneously
With ultraviolet light, to promote H therein2O2Resolve into OH group.The irradiation time of ultraviolet light is 2 minutes, and exposure intensity is
5000 nits.
Then, it will be present in the H on the first oxide semiconductor layer2O2Solution drying, and continue to deposit under oxygen-free atmosphere
Second oxide semiconductor layer to 15nm thickness.Here, using IGZO as forming partly leading for the second oxide semiconductor layer
Oxide body.
Next, semiconductor pattern can be formed by patterning processes, annealing process can be executed, then so as to obtain
Obtain stable ITZO+IGZO semiconductor film.It is alternatively possible to Direct precipitation metal layer and pass through composition on semiconductor pattern
Technique forms source electrode and drain electrode.
Example 3
Firstly, forming grid and gate insulating layer on the glass substrate.Then, it is formed on gate insulating layer by deposition
With a thickness of the first oxide semiconductor layer of 40nm.Here, using ZnO as the semiconductor for forming the first oxide semiconductor layer
Oxide.
Then, the H for being 20 weight % by concentration2O2On spray solution to the surface of the first oxide semiconductor layer, adopt simultaneously
With ultraviolet light, to promote H therein2O2Resolve into OH group.The irradiation time of ultraviolet light is 1 minute, and exposure intensity is
6000 nits.
Then, it will be present in the H on the first oxide semiconductor layer2O2Solution drying, and continue to deposit under oxygen-free atmosphere
Second oxide semiconductor layer to 10nm thickness.Here, using ZTO as the semiconductor for forming the second oxide semiconductor layer
Oxide.
Next, semiconductor pattern can be formed by patterning processes, annealing process can be executed, then so as to obtain
Obtain stable ZnO+ZTO semiconductor film.It is alternatively possible on semiconductor pattern Direct precipitation metal layer and pass through composition work
Skill forms source electrode and drain electrode.
It should be appreciated that above-mentioned example is merely to be illustratively described the side of the manufacturing semiconductor devices of the disclosure
Method, those skilled in the art can expect other examples according to the technical concept of the disclosure.Therefore, the scope of the present disclosure never limits
In above example.
In addition, the disclosure additionally provides a kind of array substrate, the array substrate includes according to method described above system
The semiconductor devices made.
In addition, the disclosure additionally provides a kind of display device, the display device includes array substrate described above.
It has been directed to attached drawing and has given description before certain exemplary embodiments to the disclosure.These exemplary realities
It applies that example is not intended to exhaustive or the disclosure is confined to disclosed precise forms, and it is evident that above
Under the enlightenment of introduction, those of ordinary skill in the art can make many modifications and variations.Therefore, the scope of the present disclosure and unawareness
Figure is confined to embodiment above-mentioned, but is intended to being limited by claim and their equivalent.
Claims (10)
1. a kind of method of manufacturing semiconductor devices, which comprises
In the first oxide semiconductor layer of substrate disposed thereon, by H2O2On spray solution to the first oxide semiconductor layer；
Using ultraviolet light H2O2Solution, to promote H therein2O2It decomposes；And
It will be present in the H on the first oxide semiconductor layer2O2Solution drying, and continue depositing second oxide semiconductor layer.
2. the method for manufacturing semiconductor devices according to claim 1, wherein in the first oxide of substrate disposed thereon half
Before conductor layer, grid and gate insulating layer are sequentially formed on substrate.
3. the method for manufacturing semiconductor devices according to claim 1, wherein in depositing second oxide semiconductor layer
Afterwards, semiconductor pattern is formed by patterning processes, the semiconductor pattern includes the first oxide semiconductor layer and the second oxidation
Object semiconductor layer.
4. the method for manufacturing semiconductor devices according to claim 3, wherein deposited metal layer is simultaneously on semiconductor pattern
Source electrode and drain electrode is formed by patterning processes.
5. the method for manufacturing semiconductor devices according to claim 1, wherein H2O2The concentration range of solution is 5 weight %
To 20 weight %.
6. the method for manufacturing semiconductor devices according to claim 1, wherein the first oxide semiconductor layer and the second oxygen
Compound semiconductor layer is formed by different semiconductor materials.
7. the method for manufacturing semiconductor devices according to claim 1, wherein the first oxide semiconductor layer and the second oxygen
Compound semiconductor layer is respectively by from including zinc oxide, indium oxide, tin oxide, zinc-tin oxide, aluminum zinc oxide, indium gallium zinc, oxygen
Change at least one formation selected in yttrium zinc and the conductor oxidate of indium tin zinc oxide.
8. the method for manufacturing semiconductor devices according to claim 1, wherein the method includes sinking in oxygen-free atmosphere
The second oxide semiconductor layer of product.
9. a kind of array substrate, the array substrate includes the semiconductor devices of manufacture according to the method for claim 1.
10. a kind of display device, the display device includes array substrate according to claim 9.
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