CN106981312B - 电子设备及其驱动方法 - Google Patents

电子设备及其驱动方法 Download PDF

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Publication number
CN106981312B
CN106981312B CN201610791220.XA CN201610791220A CN106981312B CN 106981312 B CN106981312 B CN 106981312B CN 201610791220 A CN201610791220 A CN 201610791220A CN 106981312 B CN106981312 B CN 106981312B
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line
voltage
memory
circuit
current
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Chinese (zh)
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CN106981312A (zh
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尹正赫
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SK Hynix Inc
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SK Hynix Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G11C11/1655—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G11C11/1657—Word-line or row circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2024—Rewritable memory not requiring erasing, e.g. resistive or ferroelectric RAM
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0078—Write using current through the cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/76—Array using an access device for each cell which being not a transistor and not a diode

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
CN201610791220.XA 2016-01-19 2016-08-31 电子设备及其驱动方法 Active CN106981312B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2016-0006406 2016-01-19
KR1020160006406A KR102490305B1 (ko) 2016-01-19 2016-01-19 전자 장치

Publications (2)

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CN106981312A CN106981312A (zh) 2017-07-25
CN106981312B true CN106981312B (zh) 2021-01-15

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Country Status (3)

Country Link
US (1) US10395735B2 (ko)
KR (1) KR102490305B1 (ko)
CN (1) CN106981312B (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102465169B1 (ko) * 2015-12-21 2022-11-11 에스케이하이닉스 주식회사 전자 장치
US10522214B2 (en) * 2016-06-09 2019-12-31 Synopsys, Inc. Robust negative bit-line and reliability aware write assist
US10541011B1 (en) * 2017-08-01 2020-01-21 SK Hynix Inc. Electronic device
KR102599662B1 (ko) * 2018-07-27 2023-11-07 삼성전자주식회사 주어진 동작 환경에 적합한 쓰기 전류에 기초하여 동작하는 메모리 장치 및 쓰기 전류를 구동하는 방법
KR102144535B1 (ko) * 2018-11-20 2020-08-12 한양대학교 산학협력단 전류 반복기를 사용하는 상변화 메모리 소자
KR102036603B1 (ko) * 2019-01-02 2019-10-25 조두희 투명디스플레이 장치의 어드레서블 led를 위한 전류 루프 인터페이스 구현방법 및 그 투명디스플레이 장치
KR20210105187A (ko) * 2020-02-18 2021-08-26 에스케이하이닉스 주식회사 전압 생성 회로 및 이를 이용하는 비휘발성 메모리 장치
JP2024000873A (ja) 2022-06-21 2024-01-09 キオクシア株式会社 磁気記憶装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101189679A (zh) * 2005-01-19 2008-05-28 桑迪士克3D公司 用于偏置相变存储阵列以进行可靠写入的结构和方法
CN102077292A (zh) * 2008-06-27 2011-05-25 桑迪士克3D公司 用于非易失性存储器的具有电流限制的反向设置
CN105093999A (zh) * 2014-05-19 2015-11-25 爱思开海力士有限公司 电子器件

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US8243542B2 (en) * 2005-11-30 2012-08-14 Samsung Electronics Co., Ltd. Resistance variable memory devices and read methods thereof
US20130114335A1 (en) * 2007-02-12 2013-05-09 Avalanche Technology, Inc. Memory sensing circuit
JP2009037703A (ja) * 2007-08-02 2009-02-19 Toshiba Corp 抵抗変化メモリ
US8077501B2 (en) * 2009-09-11 2011-12-13 Grandis, Inc. Differential read and write architecture
KR101150547B1 (ko) 2010-05-27 2012-06-01 에스케이하이닉스 주식회사 상 변화 메모리 장치
KR101786496B1 (ko) 2010-10-19 2017-10-19 삼성전자주식회사 메모리 장치, 이의 제조 방법, 및 상기 메모리 장치를 포함하는 메모리 시스템
KR20140028612A (ko) * 2012-08-29 2014-03-10 에스케이하이닉스 주식회사 라이트 드라이버를 구비한 반도체 메모리 장치 및 그의 제어 방법
KR102043727B1 (ko) * 2013-03-04 2019-12-02 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법, 이 반도체 장치를 포함하는 마이크로 프로세서, 프로세서, 시스템, 데이터 저장 시스템 및 메모리 시스템
KR20140142929A (ko) * 2013-06-05 2014-12-15 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법, 이 반도체 장치를 포함하는 마이크로 프로세서, 프로세서, 시스템, 데이터 저장 시스템 및 메모리 시스템
US9368205B2 (en) * 2013-08-26 2016-06-14 Intel Corporation Set and reset operation in phase change memory and associated techniques and configurations

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CN101189679A (zh) * 2005-01-19 2008-05-28 桑迪士克3D公司 用于偏置相变存储阵列以进行可靠写入的结构和方法
CN102077292A (zh) * 2008-06-27 2011-05-25 桑迪士克3D公司 用于非易失性存储器的具有电流限制的反向设置
CN105093999A (zh) * 2014-05-19 2015-11-25 爱思开海力士有限公司 电子器件

Also Published As

Publication number Publication date
KR102490305B1 (ko) 2023-01-20
CN106981312A (zh) 2017-07-25
US20170206961A1 (en) 2017-07-20
KR20170086863A (ko) 2017-07-27
US10395735B2 (en) 2019-08-27

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