CN106960788A - A kind of preparation method of drift step recovery diode and products thereof - Google Patents
A kind of preparation method of drift step recovery diode and products thereof Download PDFInfo
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- 238000011084 recovery Methods 0.000 title claims abstract description 64
- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 229910052785 arsenic Inorganic materials 0.000 claims abstract description 22
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 229910003822 SiHCl3 Inorganic materials 0.000 claims description 8
- -1 boron ion Chemical class 0.000 claims description 6
- 238000002156 mixing Methods 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- HAYXDMNJJFVXCI-UHFFFAOYSA-N arsenic(5+) Chemical compound [As+5] HAYXDMNJJFVXCI-UHFFFAOYSA-N 0.000 claims description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 claims description 3
- 229940085991 phosphate ion Drugs 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000002210 silicon-based material Substances 0.000 claims 1
- 239000002019 doping agent Substances 0.000 abstract description 10
- 238000009792 diffusion process Methods 0.000 abstract description 8
- 238000000407 epitaxy Methods 0.000 abstract description 8
- 230000008569 process Effects 0.000 abstract description 8
- 239000000758 substrate Substances 0.000 abstract description 5
- 238000010790 dilution Methods 0.000 abstract description 4
- 239000012895 dilution Substances 0.000 abstract description 4
- 230000005764 inhibitory process Effects 0.000 abstract description 3
- 238000005137 deposition process Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 description 14
- 238000001035 drying Methods 0.000 description 13
- 238000004140 cleaning Methods 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- 239000008367 deionised water Substances 0.000 description 8
- 229910021641 deionized water Inorganic materials 0.000 description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000006872 improvement Effects 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 239000002994 raw material Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 210000003739 neck Anatomy 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
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- 229920006395 saturated elastomer Polymers 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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Abstract
The invention discloses a kind of preparation method of drift step recovery diode and products thereof, using epitaxy, arsenic N is being mixed+Boron-doping P areas are deposited using vapour deposition process deposit p-doped N floor, in p-doped N areas, boron-doping P is deposited in boron-doping P areas on type substrate+Area, and be N+Area plates Ni, is P+Area plates Ti/Ni floor；The preparation method that the present invention is provided is by controlling main process gas flow H2Flow control the concentration of the reacting gas on substrate slice surface during outer layer growth, so as to ensure the uniformity of epitaxial layer, and inhibition of self-doped phenomenon and from dilution phenomenon；And dopant profiles are controlled in the growth period of epitaxial layer, prepare each layer of high-purity and crystalline quality, and uniform doping；Solve the problem of drift step recovery diode dopant profiles prepared by existing use diffusion method are uneven, and greatly shorten that preparation is time-consuming, prepared drift step recovery diode has faster switching speed and longer service life.
Description
Technical field
The invention belongs to technical field of semiconductors, more particularly, to a kind of preparation side of drift step recovery diode
Method and products thereof.
Background technology
During drift step recovery diode (Drift Step Recovery Diode, DSRD) is considered as commercial Application
The preferable solid-state switch of Pulsed power generator.It is high that some pulse power systems built using DSRD can produce crest voltage
Up to tens kilovolts of millimicrosecond pulse, climbing speed is up to 2 × 1012V/s, repetitive rate is 10kHz.DSRD this nanosecond is opened
The operation of pass process is based on drift step recovery effect (DSR), only can just occur when meeting some specified conditions.DSRD can be with
Applied to military field, such as ultra wide band (UWB) radar, ground-penetrating radar (GPR) etc. can be used for many business necks
Domain, including ozone production, the pumping of nitrogen molecular laser or excimer laser, surface plasma cleaning or surface active
Deng.
Existing DSRD is in order to obtain big switching current, and p-n junction must be placed at inner wafer depths, pass through diffusion method
Prepare, prepared particular by the deep diffusion in Si, its preparation process is difficult to control to, and last it is longer, and not
Doping concentration and profile can be controlled well.
The content of the invention
For the disadvantages described above or Improvement requirement of prior art, the invention provides a kind of drift step recovery diode
Preparation method and products thereof, its object is to solve existing diffusion method to prepare drift step recovery diode dopant profiles inequality
Problem.
To achieve the above object, according to one aspect of the present invention, there is provided a kind of system of drift step recovery diode
Preparation Method, comprises the following steps：
(1) N is used as using arsenic doped silicon wafer+Area, using SiHCl3And H2It is used as reacting gas, SiHCl3Given birth to as silicon epitaxy
Long raw material, is deposited on the arsenic doped silicon wafer using chemical vapour deposition technique and forms the N areas of p-doped, deposits shape in the N areas
Into the P areas of boron-doping, in the P areas, deposit forms the P of boron-doping+Area, obtains epitaxial wafer；
In this step, the main process gas flow H of precise control is passed through2Flow control substrate slice surface during outer layer growth
Reacting gas concentration, so as to ensure the uniformity of each layer of epitaxial wafer, and inhibition of self-doped phenomenon and from dilution phenomenon；
(2) in the N of the epitaxial wafer+After the surface sputtering layer of Ni in area, the Ni for including stacking gradually from bottom to top is formed
Layer, the N for mixing arsenic+Area, the N areas of p-doped, the P areas of boron-doping, the P of boron-doping+First middleware in area；
(3) in the P of first middleware+The surface in area, which sputters to be formed after a floor Ti, layer of Ni successively, to be included from lower
On stack gradually Ni layers, mix the N of arsenic+Area, the N areas of p-doped, the P areas of boron-doping, the P of boron-doping+In the middle of the second of area and Ti/Ni floor
Part；
(4) second middleware is made annealing treatment so that the N+Between area and Ni floor and the P+Area with
Ohmic contact is respectively formed between Ti/Ni layers, drift step recovery diode is obtained.
Preferably, the preparation method of above-mentioned drift step recovery diode, also comprises the following steps：
(5) in drift step recovery diode N+A floor Ti, a floor Al are sputtered on the Ni floor on area surface successively, on Ni layers
Form rear top metal；In P+A floor Ti, a floor Al are sputtered on the Ti/Ni floor on area surface successively, is formed just on Ti/Ni layers
Face top-level metallic.
Preferably, the preparation method of above-mentioned drift step recovery diode, the product that can obtain step (1) uses RCA
Standard cleaning method is cleaned, and is handled after drying into step (2).
It is another aspect of this invention to provide that there is provided a kind of drift step recovery two obtained according to above-mentioned preparation method
Pole pipe, including the N for mixing arsenic stacked gradually from bottom to top+Area, the N areas of p-doped, the P areas of boron-doping and the P of boron-doping+Area；N+Area and P
Area is located at N areas both sides, P respectively+Area is abutted with P areas, forms n+npp+Structure；Prepared using epitaxy including dopant profiles
Uniform p-doped N areas, boron-doping P areas and boron-doping P+The epitaxial layer in area.
It is preferred that, above-mentioned drift step recovery diode, its N+The bottom surface in area is coated with Ni floor, the P of boron-doping+The plated surface in area
There are Ti/Ni layers.
It is preferred that, above-mentioned drift step recovery diode, its N+The thickness in area is 180 μm~250 μm, and the thickness in N areas is
20 μm~100 μm, P+The thickness in area is 8~12 μm.
It is preferred that, above-mentioned drift step recovery diode, its P+The boron ion concentration in area is 1019~1020Individual/cm3, N+Area
Arsenic ion concentration be 1019~1020Individual/cm3。
It is preferred that, above-mentioned drift step recovery diode, the boron ion concentration in its P area is 4 × 1015~6 × 1015Individual/
cm3, the phosphate ion concentration in N areas is 1 × 1014~1 × 1015Individual/cm3。
In general, by the contemplated above technical scheme of the present invention compared with prior art, it can obtain down and show
Beneficial effect：
(1) preparation method for the drift step recovery diode that the present invention is provided, its object is to prepared using epitaxy
Each layer of high-purity and crystalline quality, because the growth period in epitaxial layer passes through the main process gas H of precise control2Flow,
The improvement being distributed to reaction in furnace gas flowfield is realized, so as to be advantageously controlled dopant profiles, the uniform epitaxial layer of each layer is obtained,
More accurate dopant profiles are realized, the uneven technical problem of diffusion method dopant profiles is thus solved；
(2) preparation method for the drift step recovery diode that the present invention is provided, drift step is prepared using epitaxy
Recovery diode, compared to diffusion method diffusion time of tens of hours easily, epitaxy can greatly shorten preparation time, and system
Obtain thicker PN junction；
(3) drift step recovery diode obtained by the preparation method that the present invention is provided, because epitaxy is to drift rank
The improvement for the recovery diode material property that jumps, can obtain dopant profiles and less defect evenly, drift step recovery
Therefore diode can obtain faster switching speed and longer service life.
Brief description of the drawings
Fig. 1 is the structural representation for the drift step recovery diode that embodiment is provided；
Fig. 2 is the current diagram of the shut-off overall process for the drift step recovery diode that embodiment is provided；
Fig. 3 is the longitudinal doping concentration schematic diagram for the DSRD that embodiment 1 is provided；
Fig. 4 is the longitudinal doping concentration schematic diagram for the DSRD that embodiment 2 is provided.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.As long as in addition, technical characteristic involved in each embodiment of invention described below
Not constituting conflict each other can just be mutually combined.
The drift step recovery diode that embodiment is provided, its structure as shown in figure 1, including stacking gradually from bottom to top
Mix the N of arsenic+Area 1-5, the N areas 1-4 of p-doped, the P areas 1-3 and the P of boron-doping of boron-doping+Area 1-2；N+Area 1-5 bottom surface is coated with Ni floor 1-
6, the P of boron-doping+Area 1-2 surface is coated with Ti/Ni floor 1-1；N+Area is located at N areas both sides, P respectively with P areas+Area is abutted with P areas, shape
Into n+npp+Structure.
Drift step recovery diode is a kind of semiconductor opening switch, makes it real at ns grades by controlling its plasmasphere
Now rapidly switch off；The electric current of the shut-off overall process of drift step recovery diode is as shown in Figure 2；Add malleation to anode first, give
Drift step recovery diode applies a short direct impulse, and middle P areas and N areas has just been injected into plasma, is formed
Plasmasphere；Because the time of direct impulse is extremely short, so the plasma skewness in drift step recovery diode,
The height in concentration ratio N areas in P areas.Apply a reverse impulse, drift to drift step recovery diode again after direct impulse
Plasma in step-recovery diode is outwards extracted under electric field action, and hole is transported to anode movement, electronics to negative electrode
Dynamic, at the same time the forward position of plasmasphere is also shunk at PN junction.By controlling the parameter of direct impulse and reverse impulse, make
The plasmasphere forward position for obtaining both sides is collided at PN junction just, forms space-charge region；The resistance of space-charge region increased dramatically,
Voltage is raised, and electric current is truncated.Turned off rapidly in order that obtaining drift step recovery diode, reverse impulse should cause carrier
Drifted about with saturated velocity, i.e. pulse current density jr≈qN0Vs, N0For carrier concentration, VsFor carrier saturation drift velocity.
According to the difference of the voltage class applied, different N areas thickness, the voltage that thicker N areas can be born can be designed
It is higher；The switching speed of drift step recovery diode is can adjust by adjusting P areas concentration parameter.
Illustrated below in conjunction with specific embodiment the preparation method of drift step recovery diode that the present invention provides and its
Product；
Embodiment 1
The preparation method for the drift step recovery diode that embodiment 1 is provided, comprises the following steps：
(1) N is used<100>The doping concentration of crystal orientation is 1019Individual ion cm-3Arsenic doped silicon wafer be used as N+Area 1-5,1100
DEG C furnace temperature under, using SiHCl3And H2It is used as reacting gas, SiHCl3As growing epitaxial silicon raw material, chemical vapor deposition is utilized
The doping concentration that area method continuously grows 20 μ m-thicks successively on above-mentioned arsenic doped silicon wafer is 8 × 1014Individual ion cm-3P-doped N
Area 1-4, the doping concentration of 20 μ m-thicks are 4.5 × 1015Individual ion cm-3The P areas 1-3 of boron-doping, the doping concentration of 10 μ m-thicks be
1019Individual ion cm-3Boron-doping P+Area 1-2, obtains epitaxial wafer；
In this step, because substrate is heavy doping, and continuously grow successively include p-doped N areas, boron-doping P areas with
And boron-doping P+The epitaxial wafer in area is that alternately heavy doping is lightly doped, and easily occurs auto-doping phenomenon and from dilution phenomenon；In this implementation
By controlling and accurately changing main process gas flow H in example2Flow come the reaction gas on substrate slice surface when controlling the epitaxial wafer to grow
The concentration of body, so as to ensure the uniformity of each layer of epitaxial wafer, and inhibition of self-doped phenomenon and from dilution phenomenon；
(2) epitaxial wafer is cleaned using RCA standard cleaning methods, and uses N2Drying；Wherein, RCA standard cleanings method
It is to be initiated by Kern and Puotinen et al. in N.J.Princeton RCA laboratories nineteen sixty-five, and gains the name therefrom；
(3) N of the epitaxial wafer dried up in cleaning+Area 1-5 bottom surface sputters the Ni of a floor 150nm, and uses deionized water
Cleaned, using N2Drying, forms the Ni layers for including stacking gradually from bottom to top, mixes the N of arsenic+Area, the N areas of p-doped, boron-doping
P areas, the P of boron-doping+First middleware in area；
(4) in the P of above-mentioned first middleware+The surface in area sputters the thick Ni of 30nm thick Ti, 100nm successively, and uses
Deionized water is cleaned, using N2Drying, forms the Ni layers for including stacking gradually from bottom to top, mixes the N of arsenic+Area, the N areas of p-doped, mix
The P areas of boron, the P of boron-doping+Area and the second middleware of Ti/Ni floor；
(5) 1000 DEG C of high annealing 5min are carried out to above-mentioned second middleware using RTP so that N+Between area and Ni floor with
And P+Ohmic contact is respectively formed between area and Ti/Ni floor, print is obtained；
(6) print is cleaned with acetone, isopropanol, deionized water successively, and uses N2Drying；
(7) in the print N of cleaning drying+The thick Al of 100nm thick Ti, 800nm is sputtered on the Ni floor on area surface successively,
Rear top metal is formed on Ni layers；
In P+The thick Al of 100nm thick Ti, 900nm is sputtered on the Ti/Ni floor on area surface successively, is formed on Ti/Ni layers
Front top-level metallic；And using deionized water cleaning, using N2Drying, obtains drift step recovery diode.
Drift step recovery diode prepared by embodiment 1, including the N for mixing arsenic stacked gradually from bottom to top+Area 1-
5th, the N areas 1-4 of p-doped, the P areas 1-3 and the P of boron-doping of boron-doping+Area 1-2；N+Area 1-5 bottom surface is coated with Ni floor, the P of boron-doping+Area 1-2
Surface be coated with Ti/Ni layers；Ni layer surfaces are coated with stacks gradually what is formed from top to bottom by the thick Al of thick 100nm Ti, 800nm
Rear top metal；Ti/Ni layer surfaces are coated with to be stacked gradually from bottom to top by the thick Al of thick 100nm Ti, 900nm and formed just
Face top-level metallic；
In the present embodiment, N+Area is located at N areas both sides, P respectively with P areas+Area is abutted with P areas, forms n+npp+Structure；Wherein,
N+Area's 1-5 thickness is 200 μm, the N areas 1-4 thickness of p-doped is 20 μm, the P areas 1-3 thickness of boron-doping is 20 μm, the P of boron-doping+Area 1-2
Thickness is 10 μm；Ni layers of 1-6 thickness is 150nm, in Ti/Ni layer 1-1, and Ti thickness degree is 30nm, and Ni layers of thickness is
100nm；
N areas 1-4 doping concentration is 8 × 10 in the present embodiment14Individual ion cm-3, P areas 1-3 doping concentration for 4.5 ×
1015Individual ion cm-3, P+Area 1-2 doping concentration is 1019Individual ion cm-3。
It is above-mentioned with 2ns pulse front edges prepared by embodiment 1, voltage class is 400V drift step shown in Fig. 3
Longitudinal doping concentration schematic diagram of recovery diode；Drift prepared by the epitaxy technology provided as can be seen from this figure using embodiment
Move each layer Impurity Distribution of step-recovery diode highly uniform, and form abrupt junction.
Embodiment 2
The preparation method for the drift step recovery diode that embodiment 2 is provided, comprises the following steps：
(1) N is used<100>The doping concentration of crystal orientation is 1019Individual ion cm-3Arsenic doped silicon wafer be used as N+Area 1-5,1100
DEG C furnace temperature under, using SiHCl3And H2It is used as reacting gas, SiHCl3As growing epitaxial silicon raw material, chemical vapor deposition is utilized
The doping concentration that area method continuously grows 100 μ m-thicks successively on above-mentioned arsenic doped silicon wafer is 8 × 1014Individual ion cm-3P-doped N
Area 1-4, the doping concentration of 20 μ m-thicks are 4.5 × 1015Individual ion cm-3Boron-doping P area 1-3,10 μ m-thicks doping concentration be 1019
Individual ion cm-3Boron-doping P+Area 1-2, obtains epitaxial wafer；
(2) epitaxial wafer is cleaned using RCA ablutions, and uses N2Drying；
(3) N of the epitaxial wafer dried up in cleaning+Area 1-5 bottom surface sputters the Ni of a floor 150nm, and uses deionized water
Cleaned, using N2Drying, forms the Ni layers for including stacking gradually from bottom to top, mixes the N of arsenic+Area, the N areas of p-doped, boron-doping
P areas, the P of boron-doping+First middleware in area；
(4) in the P of above-mentioned first middleware+The surface in area sputters the thick Ni of 30nm thick Ti, 100nm successively, and uses
Deionized water is cleaned, using N2Drying, forms the Ni layers for including stacking gradually from bottom to top, mixes the N of arsenic+Area, the N areas of p-doped, mix
The P areas of boron, the P of boron-doping+Area and the second middleware of Ti/Ni floor；
(5) 1000 DEG C of high annealing 5min are carried out to above-mentioned second middleware using RTP so that N+Between area and Ni floor with
And P+Ohmic contact is respectively formed between area and Ti/Ni floor, print is obtained；
(6) N is used after being cleaned successively with acetone, isopropanol, deionized water to print2Drying；
(7) in the print N of cleaning drying+The thick Al of 100nm thick Ti, 800nm is sputtered on the Ni floor on area surface successively,
Rear top metal is formed on Ni layers；
In P+The thick Al of 100nm thick Ti, 900nm is sputtered on the Ti/Ni floor on area surface successively, is formed on Ti/Ni layers
Front top-level metallic；And using deionized water cleaning, using N2Drying, obtains drift step recovery diode.
Drift step recovery diode prepared by embodiment 2, including the N for mixing arsenic stacked gradually from bottom to top+Area 1-
5th, the N areas 1-4 of p-doped, the P areas 1-3 and the P of boron-doping of boron-doping+Area 1-2；N+Area 1-5 bottom surface is coated with Ni floor, the P of boron-doping+Area 1-2
Surface be coated with Ti/Ni layers；Ni layer surfaces are coated with stacks gradually what is formed from top to bottom by the thick Al of thick 100nm Ti, 800nm
Rear top metal；Ti/Ni layer surfaces are coated with to be stacked gradually from bottom to top by the thick Al of thick 100nm Ti, 900nm and formed just
Face top-level metallic；
In the present embodiment, N+Area is located at N areas both sides, P respectively with P areas+Area is abutted with P areas, forms n+npp+Structure；Wherein,
N+Area's 1-5 thickness is 200 μm, the N areas 1-4 thickness of p-doped is 100 μm, the P areas 1-3 thickness of boron-doping is 20 μm, the P of boron-doping+Area 1-
2 thickness are 10 μm；Ni layers of 1-6 thickness is 150nm, in Ti/Ni layer 1-1, and Ti thickness degree is 30nm, and Ni layers of thickness is
100nm；
N areas 1-4 doping concentration is 8 × 10 in the present embodiment14Individual ion cm-3, P areas 1-3 doping concentration for 4.5 ×
1015Individual ion cm-3, P+Area 1-2 doping concentration is an ion 1019cm-3。
It is above-mentioned with 3ns pulse front edges prepared by embodiment 2, voltage class is 1000V drift rank shown in Fig. 4
Longitudinal doping concentration schematic diagram of jump recovery diode；From the figure and compared with Example 1, it can be seen that deposited by increasing
N areas thickness can improve DSRD voltage class, the N areas thickness of embodiment 2 reaches 100 μm, and corresponding voltage class reaches
1000V。
The preparation method of 3~embodiment of embodiment 6 is identical, and the structure of prepared drift step recovery diode is identical,
Difference is the doping concentration in each area's thickness and each area.Drift step recovery diode prepared by 1~embodiment of embodiment 6
Listed by the following Tables 1 and 2 of parameter；
One of drift step recovery diode parameter prepared by the 1~embodiment of embodiment 6 of table 1
| Sequence number | N areas thickness | N+Area's thickness | P+Area's thickness | Voltage class | Switching speed |
| 1 | 20μm | 200μm | 10μm | 400V | 2ns |
| 2 | 100μm | 200μm | 10μm | 1000V | 3.4ns |
| 3 | 30μm | 180μm | 8.5μm | 450V | 3.2ns |
| 4 | 40μm | 215μm | 9.5μm | 500V | 3.3ns |
| 5 | 70μm | 230μm | 8μm | 700V | 2.9ns |
| 6 | 85μm | 250μm | 12μm | 800V | 3.1ns |
Two of drift step recovery diode parameter prepared by the 1~embodiment of embodiment 6 of table 2
| Sequence number | N areas phosphate ion concentration | N+Area's arsenic ion concentration | P+Area's boron ion concentration | P areas boron ion concentration |
| 1 | 8×1014Individual cm-3 | 1×1019Individual cm-3 | 1×1019Individual cm-3 | 4.5×1015Individual cm-3 |
| 2 | 8×1014Individual cm-3 | 1×1019Individual cm-3 | 1×1019Individual cm-3 | 4.5×1015Individual cm-3 |
| 3 | 10×1014Individual cm-3 | 4×1019Individual cm-3 | 5×1019Individual cm-3 | 4×1015Individual cm-3 |
| 4 | 6×1014Individual cm-3 | 6×1019Individual cm-3 | 6×1019Individual cm-3 | 6×1015Individual cm-3 |
| 5 | 3×1014Individual cm-3 | 8×1019Individual cm-3 | 8.5×1019Individual cm-3 | 4.5×1015Individual cm-3 |
| 6 | 1×1014Individual cm-3 | 10×1019Individual cm-3 | 1×1020Individual cm-3 | 4.5×1015Individual cm-3 |
The drift step recovery diode prepared by preparation method provided using the embodiment of the present invention, in epitaxial wafer
Growth period is by controlling main process gas H2Flow realize to reaction in furnace gas flowfield be distributed improvement, so as to reach good
The purpose of dopant profiles is controlled well, the uniform epitaxial wafer of each layer is obtained, and thus solves the drift step recovery obtained by diffusion method
The problem of diode dopant profiles are uneven；The time that the method for the present invention prepares drift step recovery diode significantly shortens, and
And comparatively speaking, the present invention obtained by drift step recovery diode working life more, switching speed faster.
As it will be easily appreciated by one skilled in the art that the foregoing is only presently preferred embodiments of the present invention, it is not used to
The limitation present invention, any modification, equivalent and the improvement made within the spirit and principles of the invention etc., it all should include
Within protection scope of the present invention.
Claims (7)
1. a kind of preparation method of drift step recovery diode, it is characterised in that comprise the following steps：
(1) N is used as using arsenic doped silicon wafer+Area, using SiHCl3And H2It is used as reacting gas, SiHCl3It is former as growing epitaxial silicon
Material, deposit using chemical vapour deposition technique on the arsenic doped silicon wafer formed the N areas of p-doped, in the N areas deposit formation mix
The P areas of boron, in the P areas deposit form the P of boron-doping+Area, obtains epitaxial wafer；
(2) in the N of the epitaxial wafer+Area surface sputtering layer of Ni after, formed include stack gradually from bottom to top Ni layers, mix
The N of arsenic+Area, the N areas of p-doped, the P areas of boron-doping, the P of boron-doping+First middleware in area；
(3) in the P of first middleware+The surface in area, which sputters to be formed after a floor Ti, layer of Ni successively, to be included from bottom to top successively
The Ni layers of stacking, the N for mixing arsenic+Area, the N areas of p-doped, the P areas of boron-doping, the P of boron-doping+Area and the second middleware of Ti/Ni floor；
(4) second middleware is made annealing treatment so that the N+Between area and Ni floor and the P+Area and Ti/Ni
Ohmic contact is respectively formed between layer, drift step recovery diode is obtained.
2. preparation method as claimed in claim 1, it is characterised in that also comprise the following steps：
(5) one layer of Ti, one layer of Al are sputtered successively on the Ni layers of the drift step recovery diode, on Ti/Ni layers successively
Sputter one layer of Ti, one layer of Al.
3. a kind of drift step recovery diode that preparation method according to claim 1 or 2 is obtained, its feature exists
In, including the N for mixing arsenic stacked gradually from bottom to top+Area, the N areas of p-doped, the P areas of boron-doping and the P of boron-doping+Area；The N+Area with
P areas are located at N areas both sides, the P respectively+Area is abutted with P areas, constitutes n+npp+Structure.
4. drift step recovery diode as claimed in claim 3, it is characterised in that the N+The bottom surface in area is coated with Ni floor, institute
State P+The surface in area is coated with Ti/Ni floor.
5. the drift step recovery diode as described in claim 3 or 4, it is characterised in that the N+The thickness in area is 180 μm
~250 μm, the thickness in the N areas is 20 μm~100 μm, the P+The thickness in area is 8~12 μm.
6. the drift step recovery diode as described in claim 3 or 4, it is characterised in that the P+The boron ion concentration in area is
1019~1020Individual/cm3, the N+The arsenic ion concentration in area is 1019~1020Individual/cm3。
7. the drift step recovery diode as described in claim 3 or 4, it is characterised in that the boron ion concentration in the P areas is
4×1015~6 × 1015Individual/cm3, the phosphate ion concentration in the N areas is 1 × 1014~1 × 1015Individual/cm3。
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| CN109065636A (en) * | 2018-08-22 | 2018-12-21 | 电子科技大学 | A kind of drift step recovery diode |
| CN109087954A (en) * | 2018-08-22 | 2018-12-25 | 电子科技大学 | A kind of silicon carbide drift step recovery diode |
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