CN106921483A - A kind of modified memristor Chua's chaotic circuit - Google Patents
A kind of modified memristor Chua's chaotic circuit Download PDFInfo
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- CN106921483A CN106921483A CN201710159958.9A CN201710159958A CN106921483A CN 106921483 A CN106921483 A CN 106921483A CN 201710159958 A CN201710159958 A CN 201710159958A CN 106921483 A CN106921483 A CN 106921483A
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- memristor
- electric capacity
- diode
- negative pole
- inductance
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Abstract
The invention discloses a kind of modified memristor Chua's chaotic circuit, including by operational amplifier U and three resistance R1, R2, R3The simplified Cai Shi diodes of composition；Electric capacity C1, C2；Inductance L1；Diode bridge broad sense memristor M.Memristor M is by diode bridge, inductance L2And R0Equivalent realization.Wherein electric capacity C1Positive terminal be connected with memristor M negative pole ends (be denoted as 1 end), electric capacity C1Negative pole end and electric capacity C2Negative pole end negative pole end be connected (be denoted as 1 ' end)；Electric capacity C2Positive pole termination memristor M positive terminal；Operational amplifier U in-phase input ends are connected with 1 end, anti-phase input termination R3It is connected with 1 ' end afterwards；Inductance L1With C2It is in parallel；1 ' ground connection.Circuit can produce double scroll chaos, can provide a kind of effective chaos signal source for the application of the engineering fields such as chaotic secret communication, chaotic radar.
Description
Technical field
The present invention relates to a kind of modified memristor Chua's chaotic circuit, Cai Shi diode of the circuit to classical cai's circuit
Only replaced with an operational amplifier U and three resistance, simplify the complexity of circuit.And by classical cai's circuit
Coupling resistance replaces with memristor, constructs a kind of new chaotic signal generator.
Background technology
Chaos is the class advanced dynamic behavior that Kind of Nonlinear Dynamical System has, its being to determine property nonlinear system
Intrinsic stochasticity.Recent decades, chaos science obtain it is unprecedented flourish, the research of chaos not only has great
Scientific meaning, and be with a wide range of applications.In today that chaos develops by decades, in biology, mechanics, data
The numerous areas such as secrecy, power electronics serve huge impetus.
The experimental circuit of cai's circuit makes simple, and research and the improvement for cai's circuit are always nonlinear science
Important topic.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of modified memristor Chua's chaotic circuit.
In order to solve the above technical problems, the invention provides a kind of modified memristor Chua's chaotic circuit, its structure is as follows：
A kind of modified memristor Chua's chaotic circuit, it is characterised in that：Including simplifying Cai Shi diodes, memristor M, electric capacity C1、C2, inductance
L1；Wherein electric capacity C1Positive terminal be connected with memristor M negative pole ends (be denoted as 1 end), electric capacity C1Negative pole end and electric capacity C2Negative pole end
Negative pole end is connected (be denoted as 1 ' end), 1 ' ground connection；Inductance L1With electric capacity C2It is in parallel；The both positive and negative polarity of Cai Shi diodes respectively with 1 end, 1 '
End is connected.Described simplified Cai Shi diodes include operational amplifier U and three resistance R1, R2, R3, the positive of operational amplifier U
Input is terminated at 1 end.Resistance R3One end ground connection 1 ', another inverting input for terminating at operational amplifier U；Resistance R1One
The inverting input of termination operational amplifier U, another output end for terminating at operational amplifier U；Resistance R2One termination computing
The normal phase input end of amplifier U, another output end for terminating at operational amplifier U.Described memristor M includes inductance L2；Two poles
Pipe D1, D2, D3, D4The diode bridge of composition；Resistance R0.Diode bridge and inductance L2And R0Constitute memristor M.Inductance L1Negative pole with
Electric capacity C2Positive pole is connected, and is connected to the positive pole of memristor M.Electric capacity C1Positive pole, the negative pole of memristor M is connected to 1 end.Diode D1It is negative
Pole and diode D4Positive pole be connected be denoted as a ends, diode D1Positive pole and diode D2Positive pole be connected be denoted as b ends, diode
D2Negative pole and diode D3Positive pole be connected be denoted as c ends, diode D3Negative pole and diode D4Negative pole be connected be denoted as d ends,
B ends series inductances L2, resistance R0It is connected to d ends.
The modified memristor Chua's chaotic circuit main circuit contains four state variables, respectively electric capacity as shown in Figure 1
C1The voltage v at two ends1, electric capacity C2The voltage v at two ends2, inductance L1Electric current i3, inductance L2Electric current i4。
Beneficial effects of the present invention are as follows：
The modified memristor Chua's chaotic circuit of present invention design, the coupling electricity replaced with memristor in classical cai's circuit
Resistance, can be as a kind of new chaotic signal generator.
Brief description of the drawings
In order that present disclosure is more likely to be clearly understood, below according to specific embodiment and with reference to accompanying drawing,
The present invention is further detailed explanation, wherein：
Fig. 1 modified memristor Chua's chaotic circuits；
Fig. 2 broad sense diode bridge memristor circuits；
Fig. 3 state variables v1(t)–v2(t) plane numerical simulation phase rail figure；
Fig. 4 state variables v1(t)–i4(t) plane experimental verification figure；
Fig. 5 state variables v1(t)–i4(t) plane numerical simulation phase rail figure；
Fig. 6 state variables v1(t)–i4(t) plane experimental verification figure；
Fig. 7 state variables v2(t)–i3(t) plane numerical simulation phase rail figure；
Fig. 8 state variables v2(t)–i3(t) plane experimental verification figure；
Specific embodiment
Mathematical modeling：A kind of modified memristor Chua's chaotic circuit of the present embodiment, circuit builds as shown in Figure 1, it is assumed that
v1And v2Respectively electric capacity C1And C2The voltage at two ends, i3And i4Respectively flow through inductance L1And L2Electric current.The present invention is used
Broad sense memristor, memristor electric current is denoted as iM.The mathematic(al) representation of the memristor is as follows：
iM=(i4+2Is)tanh(ρv2-ρv1) (1)
Diode model lN4148, I that this is usedSIt is diode reverse saturation current, n is emission ratio, VTIt is heat
Voltage.Wherein, ρ=1/ (2nVT), IS=2.682nA, n=1.836, VT=25mV.
The electric current that note flows through simplified Cai Shi diodes is iN, iNMathematic(al) representation it is as follows：
iN=Gbv1+0.5(Ga-Gb)(|v1+Bp|-|v1-Bp|) (2)
G in formulaaIt is interior interval conductance, GbIt is outer interval conductance, BpIt is inside and outside interval transform voltages.And in R1=R2Shi You
Following relation：
Wherein；R1=1.73k Ω；R2=33k Ω；R3=33k Ω；
The design uses the operational amplifier of model AD711KN, there is provided ± 15V operating voltages, wherein EsatFor computing is put
The saturation voltage of big device, Esat≈13V.Electric capacity C shown in Fig. 21The voltage at two ends is denoted as v1, electric capacity C2The voltage at two ends is denoted as
v2, inductance L1Electric current be denoted as i3, inductance L2Electric current be denoted as i4, i is denoted as by the electric current for simplifying Cai Shi diodesN, broad sense recalls
Resistance electric current is denoted as iM.The Mathematical Modeling of modified cai's circuit can be described as follows：
Numerical simulation：Using MATLAB simulation Software Platforms, numerical simulation can be carried out to the system as described by formula (4)
Analysis.Selection Runge-Kutta (ODE23) algorithm is solved to circuit descriptive equation, can obtain the phase rail figure of this circuit state variable.
Typical circuit parameter C1=5.6nF, C2=33nF, R1=33k Ω, R2=33k Ω, R0=50 Ω, L1=20mH, L2=100mH,
Esat=13V, when circuit state variable states initial value is (0mV, 0.01mV, 0mA, 0mA), numerical simulation is carried out to modeling, is imitated
True result is respectively as shown in Fig. 3, Fig. 5 and Fig. 7.
Experimental verification：The design resistance uses accurate adjustable resistor, electric capacity to use ROHS, inductance
Coiling by hand is formed.Experiment is using Tektronix DPO3034 digital storage oscilloscopes capture measured waveform, institute's electricity consumption
Stream probe combines realization by Tektronix TCP312 and TektronixTCPA300.The phase rail figure in logarithm value emulation enters respectively
Experimental verification is gone, experimental result is respectively as shown in Fig. 4, Fig. 6 and Fig. 8.
Comparing result can be illustrated：One kind that the present invention is realized can produce modified memristor Chua's chaotic circuit, experiment electricity
Result after the attractor observed in road is converted with circuit simulation fits like a glove, can be with proof theory analysis and numerical simulation
Correctness.Therefore, the modified memristor Chua's chaotic circuit that the present invention is realized can produce chaotic signal, can believe as a kind of chaos
Number source.
Above-described embodiment is only intended to clearly illustrate example of the present invention, and is not to embodiment party of the invention
The restriction of formula.For those of ordinary skill in the field, it is different that other can also be made on the basis of the above description
The change or variation of form.There is no need and unable to be exhaustive to all of implementation method.
Claims (4)
1. a kind of modified memristor Chua's chaotic circuit, it is characterised in that：Including simplifying Cai Shi diodes, memristor M, electric capacity C1、
C2, inductance L1；Wherein electric capacity C1Positive terminal be connected with memristor M negative pole ends (be denoted as 1 end), electric capacity C1Negative pole end and electric capacity C2's
Negative pole end negative pole end is connected (be denoted as 1 ' end), 1 ' ground connection；Inductance L1With electric capacity C2It is in parallel；The both positive and negative polarity of Cai Shi diodes is respectively with 1
End, 1 ' end is connected.
2. a kind of modified memristor Chua's chaotic circuit described in, it is characterised in that：Described simplified Cai Shi diodes include fortune
Calculate amplifier U and three resistance R1, R2, R3, the normal phase input end of operational amplifier U is connected to 1 end.Resistance R3One end ground connection 1 ',
Another inverting input for terminating at operational amplifier U；Resistance R1A termination operational amplifier U inverting input, it is another
Terminate at the output end of operational amplifier U；Resistance R2A termination operational amplifier U normal phase input end, it is another to terminate at fortune
Calculate the output end of amplifier U.
3. a kind of modified memristor Chua's chaotic circuit described in, it is characterised in that：Described memristor M includes inductance L2；Diode
D1, D2, D3, D4The diode bridge of composition；Resistance R0.Diode bridge and inductance L2And R0Constitute memristor M.Diode D1Negative pole with
Diode D4Positive pole be connected be denoted as a ends, diode D1Positive pole and diode D2Positive pole be connected be denoted as b ends, diode D2's
Negative pole and diode D3Positive pole be connected be denoted as c ends, diode D3Negative pole and diode D4Negative pole be connected be denoted as d ends, b ends
Series inductance L2, resistance R0It is connected to d ends.
4. a kind of modified memristor Chua's chaotic circuit described in, it is characterised in that：Contain four state variables, respectively electric capacity
C1Both end voltage v1, electric capacity C2Terminal voltage v2, inductance L1Electric current i3, inductance L2Electric current i4。
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108737066A (en) * | 2018-07-30 | 2018-11-02 | 江苏理工学院 | A kind of modified Chua's chaotic circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104320098A (en) * | 2014-09-05 | 2015-01-28 | 常州大学 | A simple chua's chaotic circuit achieved by bridging generalized memristor |
| CN104821797A (en) * | 2015-04-15 | 2015-08-05 | 常州大学 | Simple Chua's chaotic circuit realized by bridge diode pair |
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2017
- 2017-03-17 CN CN201710159958.9A patent/CN106921483A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104320098A (en) * | 2014-09-05 | 2015-01-28 | 常州大学 | A simple chua's chaotic circuit achieved by bridging generalized memristor |
| CN104821797A (en) * | 2015-04-15 | 2015-08-05 | 常州大学 | Simple Chua's chaotic circuit realized by bridge diode pair |
Non-Patent Citations (1)
| Title |
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| 武花干，包伯成，徐权: ""基于二极管桥与串联RL滤波器的一阶广义忆阻模拟器"", 《电子学报》 * |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108737066A (en) * | 2018-07-30 | 2018-11-02 | 江苏理工学院 | A kind of modified Chua's chaotic circuit |
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Application publication date: 20170704 |