CN106849706B - A kind of AC-DC rectifier unit and its application circuit - Google Patents
A kind of AC-DC rectifier unit and its application circuit Download PDFInfo
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- CN106849706B CN106849706B CN201710210546.3A CN201710210546A CN106849706B CN 106849706 B CN106849706 B CN 106849706B CN 201710210546 A CN201710210546 A CN 201710210546A CN 106849706 B CN106849706 B CN 106849706B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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Abstract
The invention discloses a kind of AC-DC rectifier unit and its application circuit, which includes: the first rectification unit, for that will be converted to DC output voltage with phase radio-frequency input signals to pipe to rectification by input difference；Second rectification unit, for being converted to DC output voltage to pipe reverse phase radio-frequency input signals to rectification by input difference；First biasing circuit unit provides bias voltage to pipe for the second rectification unit rectifier using dynamic bias circuit, eliminates difference rectification and is lost to the threshold value of pipe and keeps lower reverse current；Second biasing circuit unit provides bias voltage to pipe for the first rectification unit rectifier using dynamic bias circuit, eliminates difference rectification and is lost to the threshold value of pipe and keeps lower reverse current；Storage capacitor, for filtering out the AC signal in DC output voltage to obtain stable DC output voltage, the present invention realizes the purpose for improving rectifier unit AC-DC transfer efficiency under low-power input condition.
Description
Technical field
The present invention relates to a kind of AC-DC rectifiers, more particularly to a kind of high-efficiency AC-DC suitable for ultrahigh frequency RFID
Rectifier unit and its application circuit.
Background technique
With passive ultra-high frequency RFID technical applications Quick Extended, to the sensitivity of ultra-high frequency RFID label chip
It is required that higher and higher.Energy needed for the work of passive ultra-high frequency RFID label chip emits frequency by label chip reader completely
Signal provides, and the effect of rectifier circuit is that the radiofrequency signal for receiving label antenna is converted to label chip internal circuit institute
The height of workable dc power, energy conversion efficiency directly influences the sensitivity of label chip.Reverse leakage current and just
It is to influence two main aspects of rectifier energy conversion efficiency, therefore reduce reverse leakage and forward conduction electricity to conducting voltage
Pressure is the key that high efficiency rectifier is realized.
Rectifier efficiency is promoted using particular device (such as Schottky diode, Low threshold metal-oxide-semiconductor) or circuit design
It is current most common means, however particular device often will increase process complexity, affect the cost and application of RFID.
Summary of the invention
In order to overcome the deficiencies of the above existing technologies, purpose of the present invention is to provide one kind to be suitable for ultrahigh frequency RFID
AC-DC rectifier unit and its application circuit improve low-power input condition to drop low forward conduction voltage and reverse leakage
The efficiency of lower rectifier unit.
In view of the above and other objects, the present invention proposes a kind of AC-DC rectifier unit, it is suitable for high-frequency RF ID, packet
It includes:
First rectification unit, for that will be converted to directly with phase radio-frequency input signals RF+ to rectification to pipe by input difference
Flow output voltage Vout；
Second rectification unit, for being converted to direct current to pipe reverse phase radio-frequency input signals RF- to rectification by input difference
Output voltage Vout；
First biasing circuit unit provides bias voltage to pipe for the rectification of the second rectification unit using dynamic bias circuit,
Difference rectification is eliminated the threshold value of pipe is lost and keeps lower reverse current；
Second biasing circuit unit provides bias voltage to pipe for the rectification of the first rectification unit using dynamic bias circuit,
Difference rectification is eliminated the threshold value of pipe is lost and keeps lower reverse current；
Storage capacitor CL obtains stable direct current output electricity for filtering out the AC signal on DC output voltage Vout
Pressure.
Further, which includes the second PMOS tube PM2L, third PMOS tube PM3L, second
NMOS tube NM2L, third NMOS tube NM3L, the second PMOS tube PM2L are connected into diode with the second NMOS tube NM2L respectively and are formed
Bleeder circuit, divide to direct current output Vout and is then connected drain output the first control voltage V1L by drain terminal, give this
The rectification of two rectification units provides biasing to the PMOS tube in pipe, and third PMOS tube PM3L is connected into respectively with third NMOS tube NM3L
Diode forms bleeder circuit, divide to direct current output Vout being then connected by drain terminal exporting output the second control voltage
V2L gives the rectification of second rectification unit to provide biasing to the NMOS tube in pipe.
Further, which is connected with second control voltage V2L by the first speed-up capacitor C3L
To accelerate the conversion speed of circuit AC-DC.
Further, which further includes third coupled capacitor C2L, third coupled capacitor C2L mono-
End connects this with phase radio-frequency input signals RF+, and the other end is connected with the grid of the second NMOS tube NM2L and drain electrode.
Further, which includes the 4th PMOS tube PM2R, the 4th NMOS tube NM2R, the 5th
PMOS tube PM3R, the 5th NMOS tube NM3R, the 4th PMOS tube PM2R are connected into diode with the 4th NMOS tube NM2R respectively and are formed
Bleeder circuit divides direct current output Vout, then exports third by the connected drain of drain terminal and controls voltage V1R, giving should
The rectification of first rectification unit provides biasing to the PMOS tube in pipe, and the 5th PMOS tube PM3R and the 5th NMOS tube NM3R distinguish
It is connected into diode and forms bleeder circuit, divide to direct current output Vout being then connected by drain terminal exporting the 4th control voltage
V2R gives the rectification of first rectification unit to provide biasing to the NMOS tube in pipe.
Further, third control voltage V1R and the 4th control voltage V2R passes through the second speed-up capacitor C3R phase
Connect to accelerate the conversion speed of circuit AC-DC.
Further, which further includes the 4th coupled capacitor C2R, the 4th coupled capacitor C2R mono-
End connection reverse phase radio-frequency input signals RF-, the other end are connected with the grid of the 4th NMOS tube NM2R and drain electrode.
Further, this is defeated with phase radio frequency including the first PMOS tube PM1L, the first NMOS tube NM1L for first rectification unit
Enter one end that signal RF+ is connected to first coupled capacitor C1L, the other end of the first coupled capacitor C1L be connected to this first
The drain electrode of the source electrode of PMOS tube PM1L and the first NMOS tube NM1L, the first PMOS tube PM1L grid connect third control voltage
V1R's, first PMOS tube PM1L drains and the source electrode of second PMOS tube PM2L, the source electrode of third PMOS tube PM3L, the 4th
One end of the source electrode of PMOS tube PM2R, the source electrode of the 5th PMOS tube PM3R and storage capacitor CL is connected to form direct current output node
Vout, the grid of first NMOS tube NM1L connect the 4th control voltage V2R, source electrode ground connection.
Further, which includes the 6th PMOS tube PM1R, the 6th NMOS tube NM1R and the second coupling electricity
Hold C1R, reverse phase radio-frequency input signals RF- is connected to one end of second coupled capacitor C1R, second coupled capacitor C1R's
The other end is connected to the drain electrode of the source electrode and the 6th NMOS tube NM1R of the 6th PMOS tube PM1R, the 6th PMOS tube PM1R grid
Connect the drain electrode of first control voltage V1L, the 6th PMOS tube PM1R and drain electrode, the 2nd PMOS of the first PMOS tube PM1L
The source electrode of pipe PM2L, the source electrode of third PMOS tube PM3L, the source electrode of the 4th PMOS tube PM2R, the 5th PMOS tube PM3R source electrode with
And one end of storage capacitor CL is connected to form direct current output node Vout, the grid of the 6th NMOS tube NM1R connects second control
Voltage V2L processed, source electrode ground connection.
In order to achieve the above objectives, the present invention also provides a kind of application circuit of AC-DC rectifier unit, which includes more
A AC-DC rectifier unit, each AC-DC rectifier unit prevention at radio-frequency port is in parallel, while by the direct current output port of i-stage
Vout is connected to the direct-flow input end mouth Vin of i+1 grade, the direct-flow input end mouth Vin ground connection of first order unit.
Compared with prior art, the present invention is based on dynamic biasing techniques to realize a kind of AC- suitable for ultrahigh frequency RFID
DC rectifier unit and its application circuit reduce forward conduction voltage and reverse leakage, greatly improve low-power input
Under the conditions of reorganizer unit efficiency (simulation result shows rectifier circuit made of the three-level rectifier unit cascade, input
Under conditions of power -13dBm, load 50K Ω 50%) transfer efficiency is greater than, for improving the spirit of ultrahigh frequency RFID electronic tag
Sensitivity and communication distance have remarkable effect.
Detailed description of the invention
Fig. 1 is a kind of circuit structure diagram of AC-DC rectifier unit of the present invention；
Fig. 2 is a kind of structural schematic diagram of the application circuit of AC-DC rectifier unit of the present invention.
Specific embodiment
Below by way of specific specific example and embodiments of the present invention are described with reference to the drawings, those skilled in the art can
Understand further advantage and effect of the invention easily by content disclosed in the present specification.The present invention can also pass through other differences
Specific example implemented or applied, details in this specification can also be based on different perspectives and applications, without departing substantially from
Various modifications and change are carried out under spirit of the invention.
Fig. 1 is a kind of circuit structure diagram of AC-DC rectifier unit of the present invention.As shown in Figure 1, a kind of AC-DC of the present invention
Rectifier unit is suitable for high-frequency RF ID, comprising: the first rectification unit 10, the second rectification unit 20, the first biasing circuit unit
30, the second biasing circuit unit 40 and storage capacitor CL.
Wherein, the first rectification unit 10, for that will be turned with phase radio-frequency input signals RF+ to rectification to pipe using input difference
It is changed to direct current output Vout, in the specific embodiment of the invention, the first rectification unit 10 includes composition input difference to rectification pair
PMOS tube PM1L, the NMOS tube NM1L and the first coupled capacitor C1L of pipe；Second rectification unit 20, for utilizing input difference
Direct current output Vout, in the specific embodiment of the invention, second are converted to by reverse phase radio-frequency input signals RF- to pipe to rectification
Rectification unit 20 includes PMOS tube PM1R, NMOS tube NM1R and second coupled capacitor of the composition input difference to rectification to pipe
C1R；Rectification of the first biasing circuit unit 30 by dynamic bias circuit for the second rectification unit 20 provides bias voltage to pipe,
To eliminate difference rectification to the threshold value loss of pipe and keep lower reverse current, in the specific embodiment of the invention, first partially
Circuits unit 30 by PMOS tube PM2L, NMOS tube NM2L, PMOS pipe PM3L, NMOS tube NM3L, the first speed-up capacitor C3L and
Third coupled capacitor C2L composition, PMOS pipe PM2L and NMOS tube NM2L are connected into diode respectively and form bleeder circuit, to direct current
Output Vout carries out partial pressure and in the drain of PMOS tube PM2L and NMOS tube NM2L output the first control voltage V1L, PMOS tube
PM3L and NMOS tube NM3L is connected into diode respectively and forms bleeder circuit, carries out partial pressure to direct current output Vout and in PMOS tube
The second control of drain output the voltage V2L, the first control voltage V1L of PM3L and NMOS tube NM3L and the second control voltage V2L are logical
It crosses capacitor C3L to be connected, the first control voltage V1L and second controls the PMOS tube that voltage V2L controls the second rectification unit 20 respectively
PM1R, NMOS tube NM1R on-off with reduce leak electricity and charge to the second coupled capacitor C1R；Second biasing circuit unit
40 rectification by dynamic bias circuit for the first rectification unit 10 provides bias voltage to pipe, to eliminate difference rectification to pipe
Threshold value is lost and keeps lower reverse current, and in the specific embodiment of the invention, the second biasing circuit unit 40 is by PMOS tube
PM2R, NMOS tube NM2R, PMOS tube PM3R, NMOS tube NM3R, the second speed-up capacitor C3R and the 4th coupled capacitor C2R composition,
PMOS tube PM2R and NMOS tube NM2R are connected into diode respectively and form bleeder circuit, to direct current output Vout carry out partial pressure and
The drain output third of PMOS tube PM2R and NMOS tube NM2R controls voltage V1R, and PMOS pipe PM3R connects respectively with NMOS tube NM3R
Bleeder circuit is formed at diode, partial pressure is carried out to direct current output Vout and in the drain of PMOS tube PM3R and NMOS tube NM3R
The 4th control voltage V2R is exported, third controls voltage V1R and is connected with the 4th control voltage V2R by the second speed-up capacitor C3R,
The third control of control voltage V1R and the 4th voltage V2R goes to control the PMOS pipe PM1L of the first rectification unit 10, NMOS tube respectively
The on-off of NM1L is leaked electricity with reducing and is charged to the first coupled capacitor C1L；Storage capacitor CL is made of multiple mos capacitances,
For filtering out the AC signal on DC output voltage Vout to obtain stable DC output voltage.It is embodied in the present invention
In example, the first coupled capacitor C1L, the second coupled capacitor C1R play stopping direct current；First speed-up capacitor C3L, the second speed-up capacitor
C3R effect is to speed up circuit AC-DC conversion speed.
One end of the first coupled capacitor C1L and third coupled capacitor C2L, reverse phase are connected to phase radio-frequency input signals RF+
Radio-frequency input signals RF- is connected to one end of the second coupled capacitor C1R and the 4th coupled capacitor C2R, the first coupled capacitor C1L's
The other end is connected to the drain electrode of the source electrode and NMOS tube NM1L of PMOS tube PM1L, and the other end of the second coupled capacitor C1R is connected to
The drain electrode of the source electrode and NMOS pipe NM1R of PMOS tube PM1R, the drain electrode of PMOS tube PM1L and drain electrode, the PMOS tube of PMOS tube PM1R
The source electrode of PM2L, the source electrode of PMOS tube PM3L, the source electrode of PMOS tube PM2R, PMOS tube PM3R source electrode and storage capacitor CL
One end be connected to form direct current output node Vout；The other end of third coupled capacitor C2L and the grid of NMOS tube NM2L and leakage
The grid of pole, the grid of PMOS tube PM2L and drain electrode, one end of the first speed-up capacitor C3L and PMOS tube PM1R is connected to form section
The first control of point voltage V1L；The other end of 4th coupled capacitor C2R and the grid of NMOS tube NM2R and drain electrode, PMOS tube
The grid of PM2R and the grid of drain electrode, one end of the second speed-up capacitor C3R and PMOS tube PM1L are connected to form node third control
Voltage V1R processed；The other end of first speed-up capacitor C3L and the grid of NMOS tube NM3L and drain electrode, PMOS tube PM3L grid and
The grid of drain electrode and NMOS tube NM1R are connected to form node second and control voltage V2L；The other end of second speed-up capacitor C3R
It is connected to form with the grid of the grid of NMOS tube NM3R and drain electrode, the grid of PMOS tube PM3R and drain electrode and NMOS tube NM1L
Node the 4th controls voltage V2R；The source electrode of NMOS tube NM1L, NM2L, NM3L, NM1R, NM2R, NM3R and storage capacitor CL's
Other end ground connection.
When work, the first control voltage V1L, the second control voltage V2L, third control voltage V1R, the 4th control voltage
V2R is made of the partial pressure of output DC voltage and the partial pressure of input radio frequency signal voltage, due to same phase radio-frequency input signals RF+ with
Reverse phase radio-frequency input signals RF- is differential voltage, when same phase radio-frequency input signals RF+ is in peak value, reverse phase radio frequency input letter
Number RF- is in valley, and PMOS tube PM1L and NMOS tube NM1R is opened at this time, and PMOS tube PM1R and NMOS tube NM1L are disconnected, same to phase
Radiofrequency signal RF+ is charged by PMOS tube PM1L to storage capacitor CL, since the voltage on capacitor cannot be mutated, reverse phase radio frequency letter
Number RF- controls voltage V1R transmitting, bias voltage, that is, third control electricity of PM1L grid to third by the 4th coupled capacitor C2R
Pressure V1R is output DC voltage partial pressure plus a negative alternating voltage (reverse phase radiofrequency signal RF- is in valley), is effectively improved
The angle of flow of PMOS tube PM1L, reduces the cut-in voltage of PMOS pipe PM1L, and the source voltage of another aspect PMOS tube PM1R is
Negative value (reverse phase radiofrequency signal RF- is in valley) passes through the with phase radiofrequency signal RF+ since the voltage on capacitor cannot be mutated
Two coupled capacitor C2L control voltage V1L to the first control voltage V1L transmitting, the gate bias voltage of PMOS tube PM1R i.e. first
A positive alternating voltage (being in peak value with phase radiofrequency signal RF+) is added for output DC voltage partial pressure, is effectively reduced at this time
The leakage current of PMOS tube PM1R；Meanwhile second controls voltage V2L to export DC voltage partial pressure and adding a positive alternating voltage (together
Phase radiofrequency signal RF+ is in peak value, and controls voltage V2L to second by the second coupled capacitor C2L, the first speed-up capacitor C3L
Transmitting), which be connected NMOS tube NM1R, and the second coupled capacitor C1R is electrically charged, and the 4th control voltage V2R is that output is straight
It flows voltage and adds a negative alternating voltage (reverse phase radiofrequency signal RF- is in valley), which cut NMOS tube NM1L
Only, the first coupled capacitor C1L discharges to storage capacitor CL.When reverse phase radiofrequency signal RF- signal is in peak value, believe with phase radio frequency
Number RF+ signal is in valley, the working condition of the working condition of PMOS tube PM1L and PM1R and NMOS tube NM1L and NM1R with
Foregoing circuit is opposite.
As it can be seen that the AC-DC rectifier unit suitable for ultrahigh frequency RFID of the present invention is effectively dropped by dynamic bias circuit
Low forward conduction voltage and reverse leakage, improve the AC-DC transfer efficiency under rectifier unit circuit low input power.
Fig. 2 is a kind of structural schematic diagram of the application circuit of AC-DC rectifier unit of the present invention.That is, of the invention
AC-DC rectifier unit unit N cascades to form application circuit as a whole, as shown in Fig. 2, by each AC-DC when application
The ground connection of rectifier unit is as direct-flow input end mouth Vin, and specifically by prevention at radio-frequency port parallel connection, i.e., RF+ links together and RF-
It links together, while the direct current output port Vout of i-stage being connected to the direct-flow input end mouth Vin (i=of i+1 grade
1 ... ..., N-1), the parameter of the direct-flow input end mouth Vin ground connection of first order unit, units at different levels may be different.
In conclusion the present invention is based on dynamic biasing techniques to realize a kind of AC-DC rectification suitable for ultrahigh frequency RFID
Device unit and its application circuit reduce forward conduction voltage and reverse leakage, greatly improve under low-power input condition
(simulation result shows rectifier circuit made of the three-level rectifier unit cascade, input power-to the efficiency of reorganizer unit
Under conditions of 13dBm, load 50K Ω 50%) transfer efficiency is greater than, for improving the sensitivity of ultrahigh frequency RFID electronic tag
There is remarkable effect with communication distance.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.Any
Without departing from the spirit and scope of the present invention, modifications and changes are made to the above embodiments by field technical staff.Therefore,
The scope of the present invention, should be as listed in the claims.
Claims (9)
1. a kind of AC-DC rectifier unit is suitable for ultrahigh frequency RFID, comprising:
First rectification unit, it is defeated for by input difference direct current will to be converted to phase radio-frequency input signals RF+ to pipe to rectification
Voltage Vout out；
Second rectification unit, for being converted to direct current output to pipe reverse phase radio-frequency input signals RF- to rectification by input difference
Voltage Vout；
First biasing circuit unit provides bias voltage to pipe for the second rectification unit rectifier using dynamic bias circuit, disappears
Except threshold value of the difference rectification to pipe is lost and keeps lower reverse current, which includes the second PMOS tube
PM2L, third PMOS tube PM3L, the second NMOS tube NM2L, third NMOS tube NM3L, the second PMOS tube PM2L and the 2nd NMOS
Pipe NM2L is connected into diode respectively and forms bleeder circuit, divide to direct current output Vout then defeated by the connected drain of drain terminal
First control voltage V1L out, gives the rectification of second rectification unit to provide biasing, third PMOS tube PM3L to the PMOS tube in pipe
It is connected into diode respectively with third NMOS tube NM3L and forms bleeder circuit, drain terminal is divided and then passed through to direct current output Vout
Be connected output the second control voltage V2L, and the rectification of second rectification unit is given to provide biasing to the NMOS tube in pipe；
Second biasing circuit unit provides bias voltage to pipe for the first rectification unit rectifier using dynamic bias circuit, disappears
Except threshold value of the difference rectification to pipe is lost and keeps lower reverse current；
Storage capacitor CL, for filtering out the AC signal on DC output voltage Vout to obtain stable DC output voltage.
2. AC-DC rectifier unit as described in claim 1, it is characterised in that: the first control voltage V1L and second control
Voltage V2L is connected to accelerate the conversion speed of circuit AC-DC by the first speed-up capacitor C3L.
3. AC-DC rectifier unit as described in claim 1, it is characterised in that: the first biasing circuit unit further includes
The one end three coupled capacitor C2L, third coupled capacitor C2L connects this with phase radio-frequency input signals RF+, the other end and the 2nd NMOS
The grid of pipe NM2L is connected with drain electrode.
4. AC-DC rectifier unit as described in claim 1, it is characterised in that: the second biasing circuit unit includes the 4th
PMOS tube PM2R, the 4th NMOS tube NM2R, the 5th PMOS tube PM3R, the 5th NMOS tube NM3R, the 4th PMOS tube PM2R and
Four NMOS tube NM2R are connected into diode respectively and form bleeder circuit, divide to direct current output Vout, then pass through drain terminal phase
Even drain output third control voltage V1R, give the rectification of first rectification unit in pipe PMOS tube provide biasing, the 5th
PMOS tube PM3R and the 5th NMOS tube NM3R is connected into diode respectively and forms bleeder circuit, divide so to direct current output Vout
It is connected afterwards by drain terminal and exports the 4th control voltage V2R, gives the rectification of first rectification unit to provide the NMOS tube in pipe inclined
It sets.
5. a kind of AC-DC rectifier unit as claimed in claim 4, it is characterised in that: the third control voltage V1R and this
Four control voltage V2R are connected to accelerate the conversion speed of circuit AC-DC by the second speed-up capacitor C3R.
6. AC-DC rectifier unit as claimed in claim 5, it is characterised in that: the second biasing circuit unit further includes
Four coupled capacitor C2R, the 4th one end coupled capacitor C2R connects reverse phase radio-frequency input signals RF-, the other end and the 4th NMOS
The grid of pipe NM2R is connected with drain electrode.
7. AC-DC rectifier unit as claimed in claim 5, it is characterised in that: first rectification unit includes the first PMOS
Pipe PM1L, the first NMOS tube NM1L and the first coupled capacitor C1L, this is connected to first coupling with phase radio-frequency input signals RF+
One end of capacitor C1L is closed, the other end of first coupled capacitor C1L is connected to the source electrode and first of first PMOS tube PM1L
The drain electrode of NMOS tube NM1L, the first PMOS tube PM1L grid connect third control voltage V1R, the leakage of first PMOS tube PM1L
Pole and the source electrode of second PMOS tube PM2L, the source electrode of third PMOS tube PM3L, the source electrode of the 4th PMOS pipe PM2R, the 5th
The source electrode of PMOS tube PM3R and one end of storage capacitor CL are connected to form direct current output node Vout, first NMOS tube NM1L
Grid connect the 4th control voltage V2R, source electrode ground connection.
8. a kind of AC-DC rectifier unit as claimed in claim 7, it is characterised in that: second rectification unit includes the 6th
PMOS tube PM1R, the 6th NMOS tube NM1R and the second coupled capacitor C1R, reverse phase radio-frequency input signals RF- be connected to this second
The other end of one end of coupled capacitor C1R, second coupled capacitor C1R is connected to the source electrode and the 6th of the 6th PMOS tube PM1R
The drain electrode of NMOS tube NM1R, the 6th PMOS tube PM1R grid connect first control voltage V1L, the leakage of the 6th PMOS tube PM1R
Pole and the drain electrode of the first PMOS tube PM1L, the source electrode of second PMOS tube PM2L, third PMOS tube PM3L source electrode, the 4th PMOS
One end of the source electrode of pipe PM2R, the source electrode of the 5th PMOS tube PM3R and storage capacitor CL is connected to form direct current output node
Vout, the grid of the 6th NMOS tube NM1R connect second control voltage V2L, source electrode ground connection.
9. a kind of application circuit of AC-DC rectifier unit, which is characterized in that the circuit includes multiple AC-DC rectifier units,
Each AC-DC rectifier unit prevention at radio-frequency port is in parallel, while the direct current output port Vout of i-stage is connected to i+1 grade
Direct-flow input end mouth Vin, the direct-flow input end mouth Vin ground connection of first order unit, each AC-DC rectifier unit include:
First rectification unit, it is defeated for by input difference direct current will to be converted to phase radio-frequency input signals RF+ to pipe to rectification
Voltage Vout out；
Second rectification unit, for being converted to direct current output to pipe reverse phase radio-frequency input signals RF- to rectification by input difference
Voltage Vout；
First biasing circuit unit provides bias voltage to pipe for the second rectification unit rectifier using dynamic bias circuit, disappears
Except threshold value of the difference rectification to pipe is lost and keeps lower reverse current, which includes the second PMOS tube
PM2L, third PMOS tube PM3L, the second NMOS tube NM2L, third NMOS tube NM3L, the second PMOS tube PM2L and the 2nd NMOS
Pipe NM2L is connected into diode respectively and forms bleeder circuit, divide to direct current output Vout then defeated by the connected drain of drain terminal
First control voltage V1L out, gives the rectification of second rectification unit to provide biasing, third PMOS tube PM3L to the PMOS tube in pipe
It is connected into diode respectively with third NMOS tube NM3L and forms bleeder circuit, drain terminal is divided and then passed through to direct current output Vout
Be connected output the second control voltage V2L, and the rectification of second rectification unit is given to provide biasing to the NMOS tube in pipe；
Second biasing circuit unit provides bias voltage to pipe for the first rectification unit rectifier using dynamic bias circuit, disappears
Except threshold value of the difference rectification to pipe is lost and keeps lower reverse current；
Storage capacitor CL, for filtering out the AC signal on DC output voltage Vout to obtain stable DC output voltage.
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| CN201710210546.3A CN106849706B (en) | 2017-03-31 | 2017-03-31 | A kind of AC-DC rectifier unit and its application circuit |
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| CN201710210546.3A CN106849706B (en) | 2017-03-31 | 2017-03-31 | A kind of AC-DC rectifier unit and its application circuit |
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| CN110350810A (en) * | 2019-05-24 | 2019-10-18 | 广东工业大学 | A kind of elimination threshold voltage intersection multidiameter delay output full-wave rectifying circuit |
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| JP2009027878A (en) * | 2007-07-23 | 2009-02-05 | Nec Corp | Rectifier |
| EP2424092B1 (en) * | 2010-08-27 | 2016-10-12 | Nxp B.V. | High efficiency charge pump |
| CN102063638B (en) * | 2011-02-17 | 2012-10-03 | 上海龙晶微电子有限公司 | Rectification circuit for radio frequency electronic tags |
| CN103138568B (en) * | 2011-12-01 | 2015-04-15 | 国民技术股份有限公司 | Rectifying circuit and radio frequency identification (RFID) chip |
| CN103956920B (en) * | 2014-04-21 | 2016-08-24 | 复旦大学 | Static threshold eliminates and eliminates, with dynamic threshold, the voltage-doubler rectifier combined |
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2017
- 2017-03-31 CN CN201710210546.3A patent/CN106849706B/en active Active
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