CN106816558B - Top radiation organic EL display panel, its production method and display device - Google Patents
Top radiation organic EL display panel, its production method and display device Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 230000005855 radiation Effects 0.000 title abstract 2
- 238000000034 method Methods 0.000 claims abstract description 72
- 230000008569 process Effects 0.000 claims abstract description 54
- 239000010409 thin film Substances 0.000 claims abstract description 30
- 239000010408 film Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000011161 development Methods 0.000 claims description 15
- 238000002834 transmittance Methods 0.000 claims description 14
- 230000005540 biological transmission Effects 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 230000000295 complement effect Effects 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 abstract description 24
- 230000035807 sensation Effects 0.000 abstract description 5
- 239000013078 crystal Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 111
- 238000000206 photolithography Methods 0.000 description 14
- 238000010586 diagram Methods 0.000 description 5
- 230000008020 evaporation Effects 0.000 description 4
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- 238000007641 inkjet printing Methods 0.000 description 2
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- 229920005989 resin Polymers 0.000 description 2
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- 238000007650 screen-printing Methods 0.000 description 1
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
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- H10K2102/3023—Direction of light emission
- H10K2102/3026—Top emission
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Abstract
The invention discloses a kind of top radiation organic EL display panel, its production method and display device, which includes: that multiple film layers are sequentially formed on underlay substrate to constitute the thin film transistor (TFT) that surface has multiple bulge-structures；Flatness layer is formed on thin film transistor (TFT)；Using the mask plate with the figure that matches with multiple bulge-structures, photoetching process is carried out to flatness layer, to planarize flatness layer.Production method provided in an embodiment of the present invention, by using the mask plate with the figure that matches with multiple bulge-structures in film crystal pipe surface, photoetching process is carried out to flatness layer, to planarize the flatness layer, the flat performance that can be improved flatness layer keeps the thickness of the OLED film in flat upper production more uniform, thus, uniformity of luminance in pixel can be improved, alleviate the granular sensation of OLED device.
Description
Technical Field
The invention relates to the technical field of display, in particular to a top-emission organic electroluminescent display panel, a manufacturing method thereof and a display device.
Background
In the Display field, Organic Light-Emitting diodes (OLEDs) have advantages of self-luminescence, fast response, wide viewing angle, high brightness, bright color, lightness and thinness, and are considered as next generation Display technologies, compared with Liquid Crystal Displays (LCDs). OLED devices can be classified into top-emitting OLED devices and bottom-emitting OLED devices according to the light coupling-out mode. Compared with the bottom-emitting OLED, the top-emitting OLED and the TFT transistor are combined for active matrix display, so that the aperture ratio of the device is not influenced, and the OLED with the top-emitting structure is more suitable for active matrix display. In the present research situation, the application of the top-emitting OLED device in the active display field is further restricted by many factors, such as light coupling-out rate, color purity, and viewing angle characteristics.
In a top-emitting OLED device, in order to fabricate a functional layer of the OLED device on a Thin-film transistor (TFT), a planarization layer needs to be fabricated on the TFT, however, when the planarization performance of the planarization layer is not good, the surface of the planarization layer still has an uneven phenomenon, which results in an uneven phenomenon in a pixel region.
The film forming method of the OLED device mainly includes an evaporation process and a solution process. The evaporation process is mature in small-size application, and the flatness of the evaporation EL film layer is good. The film forming methods of the solution process mainly include inkjet printing, nozzle coating, spin coating, screen printing and the like, wherein the inkjet printing technology is considered as an important method for realizing mass production of large-size OLED devices due to high material utilization rate and large-size realization. In inkjet printed OLED devices, uniformity of the thickness of the OLED thin film within a pixel is very important, which has a significant impact on the lifetime and efficiency of the OLED device. Due to the characteristic of free flowing of liquid drops in the solution process, the flatness in the pixels at the opening part has a large influence on the distribution of the liquid drops, if a section difference exists on the flat layer, the thickness uniformity of an OLED film layer is further influenced, the uniformity of light emission in the pixels of the device is uneven from the point of view of device lighting, and the granular sensation is obvious.
Disclosure of Invention
The embodiment of the invention provides a top-emission organic electroluminescent display panel, a manufacturing method thereof and a display device, which are used for solving the problem of uneven light emission in pixels caused by poor planarization performance of a planarization layer in the prior art.
The embodiment of the invention provides a manufacturing method of a top-emission organic electroluminescent display panel, which comprises the following steps:
sequentially forming a plurality of film layers on a substrate to form a thin film transistor with a plurality of protruding structures on the surface;
forming a planarization layer on the thin film transistor;
and carrying out photoetching process on the flat layer by adopting a mask plate with a pattern matched with the plurality of convex structures so as to flatten the flat layer.
In a possible implementation manner, in the above manufacturing method provided in an embodiment of the present invention, after forming a planarization layer on the thin film transistor, the method further includes:
and carrying out a photoetching process on the flat layer so as to form a plurality of through holes in a non-display area.
In a possible implementation manner, in the manufacturing method provided in the embodiment of the present invention, the photolithography process for planarizing the planarization layer and the photolithography process for forming the plurality of via holes are the same photolithography process; wherein,
the mask plate adopted by the photoetching process comprises a light transmitting area and a non-light transmitting area;
and the light transmittance of the light transmission area corresponding to the protruding structure is different from that of the light transmission area corresponding to the via hole.
In a possible implementation manner, in the manufacturing method provided by the embodiment of the present invention, the material of the planarization layer is a positive photoresist;
the step of performing a photolithography process on the planarization layer by using a mask plate having a pattern matching the plurality of bump structures to planarize the planarization layer specifically includes:
and carrying out a photoetching process on the flat layer by adopting a mask plate with the same pattern as the plurality of convex structures so as to flatten the flat layer.
In a possible implementation manner, in the manufacturing method provided by the embodiment of the present invention, the material of the planarization layer is a negative photoresist;
the step of performing a photolithography process on the planarization layer by using a mask plate having a pattern matching the plurality of bump structures to planarize the planarization layer specifically includes:
and carrying out a photoetching process on the flat layer by adopting a mask plate with a pattern complementary with the plurality of convex structures so as to flatten the flat layer.
In a possible implementation manner, in the above manufacturing method provided in an embodiment of the present invention, before performing a photolithography process on the planarization layer by using a mask plate having a pattern matching with the plurality of protruding structures to planarize the planarization layer, the method further includes:
and measuring the height of each protruding structure, and determining the exposure, exposure time and development time for photoetching the flat layer according to the height of each protruding structure.
In a possible implementation manner, in the above manufacturing method provided by the embodiment of the present invention, the height of the protruding structure is between 10nm and 1 μm;
the exposure amount is 10mJ/cm2-500mJ/cm2The exposure time is 30s-150s, and the development time is 10s-200 s.
In a possible implementation manner, in the manufacturing method provided in the embodiment of the present invention, the method further includes:
and baking the flat layer after the photoetching process.
The embodiment of the invention also provides a top-emission organic electroluminescent display panel which is manufactured by adopting the manufacturing method.
The embodiment of the invention also provides a display device which comprises the top-emitting organic electroluminescent display panel.
The invention has the following beneficial effects:
the embodiment of the invention provides a top-emission organic electroluminescent display panel, a manufacturing method thereof and a display device, wherein the manufacturing method comprises the following steps: sequentially forming a plurality of film layers on a substrate to form a thin film transistor with a plurality of protruding structures on the surface; forming a planarization layer on the thin film transistor; and carrying out photoetching process on the flat layer by adopting a mask plate with a pattern matched with the plurality of convex structures so as to flatten the flat layer. According to the manufacturing method provided by the embodiment of the invention, the mask plate with the pattern matched with the plurality of convex structures on the surface of the thin film transistor is adopted to carry out the photoetching process on the flat layer so as to flatten the flat layer, so that the flatness of the flat layer can be improved, the thickness of the OLED thin film manufactured on the flat layer is more uniform, the uniformity of light emission in pixels can be improved, and the granular sensation of an OLED device can be relieved.
Drawings
Fig. 1 is a flowchart of a method for fabricating a top emission organic electroluminescent display panel according to an embodiment of the present invention;
fig. 2a is a schematic structural diagram of a manufacturing method according to an embodiment of the invention;
FIG. 2b is a second schematic structural diagram of a manufacturing method according to an embodiment of the present invention;
fig. 2c is a third schematic structural diagram of a manufacturing method according to an embodiment of the invention;
FIG. 2d is a fourth schematic structural diagram of a manufacturing method according to an embodiment of the present invention;
fig. 3 is a top view of a thin film transistor according to an embodiment of the present invention;
FIGS. 4a and 4b are height profiles corresponding to dashed lines AA 'and BB' in FIG. 3, respectively, after formation of a planarization layer;
101, a substrate base plate; 102. a thin film transistor; 103. a raised structure; 104. a planarization layer; 105. a mask plate; 106. a raised portion; 200. a sub-pixel unit.
Detailed Description
The embodiment of the invention provides a top-emission organic electroluminescent display panel, a manufacturing method thereof and a display device, aiming at the problem of uneven light emission in pixels caused by poor planarization performance of a planarization layer in the prior art.
The following describes in detail specific embodiments of a backlight module and a display device according to embodiments of the present invention with reference to the accompanying drawings. The thicknesses and shapes of the various film layers in the drawings are not to be considered true proportions, but are merely intended to illustrate the present invention.
An embodiment of the present invention provides a method for manufacturing a top emission organic electroluminescent display panel, as shown in fig. 1, including:
s101, sequentially forming a plurality of film layers on a substrate to form a thin film transistor with a plurality of protruding structures on the surface;
s102, forming a flat layer on the thin film transistor;
s103, carrying out a photoetching process on the flat layer by adopting a mask plate with a pattern matched with the plurality of convex structures so as to flatten the flat layer.
According to the manufacturing method provided by the embodiment of the invention, the mask plate with the pattern matched with the plurality of convex structures on the surface of the thin film transistor is adopted to carry out the photoetching process on the flat layer so as to flatten the flat layer, so that the flatness of the flat layer can be improved, the thickness of the OLED thin film manufactured on the flat layer is more uniform, the uniformity of light emission in pixels can be improved, and the granular sensation of an OLED device can be relieved.
Referring to fig. 2 a-2 d, since the thin film transistor 102 on the substrate 101 is generally composed of a plurality of layers, for example, a plurality of layers including a gate, a source, a drain, a gate insulating layer, etc., each having a specific pattern, and the plurality of layers are stacked together to form a plurality of bump structures 103, as shown in fig. 2a, the pattern of the bump structures 103 is determined by the pattern of each layer constituting the thin film transistor 102, and the height of the bump structures 103 is generally between 10nm and 1 μm, therefore, the pattern of the bump structures 103 can be determined according to the pattern of each layer constituting the thin film transistor 102, so as to determine the pattern of the mask in the subsequent step S103. Fig. 3 shows the pattern of the protrusion structure 103 after the thin film transistor 102 is fabricated in each sub-pixel unit 200, and as can be seen from fig. 3, the pattern of the protrusion structure 103 in each sub-pixel unit 200 is substantially the same.
In step S102, the flat layer 104 is generally made of a resin material (e.g., photoresist), and the material for making the flat layer 104 generally has a certain viscosity and fluidity, so that there are raised portions 106 with a certain height at positions corresponding to the raised structures 103 on the formed flat layer 104, as shown in fig. 2b, and the height of the raised portions 106 on the flat layer 104 is smaller than the height of the raised structures 103 on the thin film transistor 102, so that the height of the raised portions 106 on the flat layer 104 can be estimated from the height of the raised structures 103 on the thin film transistor 102 and the thickness of the flat layer 104. The mask plate 105 in step S103 can be determined by the structure of the thin film transistor 102 in step S101, and since the planarization layer 104 is generally made of a resin material, the raised portions 106 on the planarization layer 104 can be removed by a photolithography process.
Fig. 4a and 4b are height distribution diagrams corresponding to dotted lines AA 'and BB' in fig. 3 after the formation of the planarization layer 104, respectively, in fig. 4a, H denotes a height, X denotes a position in the horizontal direction, in fig. 4b, H denotes a height, and Y denotes a position in the vertical direction. In specific implementation, in a manner similar to fig. 4a and 4b, a height distribution of each position of the planarization layer 104 may be obtained, and the transmittance of the light-transmitting region in the mask blank may be determined according to the obtained height distribution of each position of the planarization layer 104, for example, a positive photoresist may be used, and the transmittance of a position with a larger height value may be set to be higher, and the transmittance of a position with a smaller height value may be set to be lower, so that more positions with larger height values on the planarization layer 104 are removed, and less positions with lower height values are removed, so that the planarization layer 104 tends to be planarized. Therefore, when the functional layer is subsequently manufactured on the flat layer 104, the obtained functional layer is relatively uniform no matter an evaporation process or a solution process is adopted, so that the uneven light emission of the OLED device caused by the uneven thickness of the functional layer is avoided.
In practical applications, when the heights of the protruding portions 106 on the flat layer 104 are substantially the same, as shown in fig. 4a, the light transmittances of the light transmitting areas on the mask plate may be set to be the same, and if the heights of the protruding portions 106 on the flat layer 104 are different from each other, the average value of the heights may be taken to set a uniform transmittance, or the transmittances may be set according to the heights of different positions, which is not limited herein.
Further, after the step S102, the method may further include:
and carrying out a photoetching process on the flat layer so as to form a plurality of through holes in a non-display area.
The anode of the OLED device may be connected to the thin film transistor by forming a plurality of via holes through the non-display region on the planarization layer. It should be noted that the photolithography process for forming the via hole may be performed before the photolithography process for planarizing the planarization layer, may be performed after the photolithography process for planarizing the planarization layer, or may be performed simultaneously, and the order of the two photolithography processes is not limited herein.
Furthermore, the photoetching process for flattening the flattening layer and the photoetching process for forming the through holes are the same photoetching process; wherein,
the mask plate adopted by the photoetching process comprises a light transmitting area and a non-light transmitting area;
and the light transmittance of the light transmission area corresponding to the protruding structure is different from that of the light transmission area corresponding to the via hole.
By adopting a special mask plate, two photoetching processes are combined into one photoetching process, one process can be saved, so that the cost is saved, specifically, the height of a general protruding structure is smaller than the thickness of a flat layer, and a via hole is equal to the thickness of the flat layer, so that the transmittance of a light-transmitting area at the position corresponding to the via hole on the mask plate can be set to be higher, such as 100%, 95% or 90%, and the transmittance of a light-transmitting area at the position corresponding to the protruding structure is lower, such as 50%, 45% or 60%, and the specific transmittance value needs to be determined according to the height of the protruding structure and the thickness of the flat layer.
In the step S103, the pattern of the mask plate 105 matches the patterns of the plurality of bump structures 103, so that the photolithography process performed on the planarization layer 104 can remove the bump 106 on the planarization layer 104 to planarize the planarization layer 104, and in the specific implementation, the pattern of the mask plate 105 is related to the performance of the material of the planarization layer 104, which includes the following two cases:
the first condition is as follows: the material of the planarization layer 104 is a positive photoresist;
the step S103 may specifically include:
the planarization layer 104 is planarized by a photolithography process using a mask plate 105 having the same pattern as the plurality of bump structures 103, as shown in fig. 2 c.
Since the positive photoresist can be dissolved in the corresponding developing solution after exposure, after the flat layer 104 is exposed by using the mask plate 105 with the same pattern as the raised structure 103, the part of the flat layer 104 corresponding to the raised structure 103 is dissolved in the developing solution, so that the raised part 106 on the flat layer 104 is removed, and the flatness of the flat layer 104 is improved.
Case two: the material of the planarization layer 104 is a negative photoresist;
the step S103 may specifically include:
the planarization layer 104 is planarized by performing a photolithography process on the planarization layer 104 using a mask plate 105 having a pattern complementary to the plurality of raised structures 103, as shown in fig. 2 d.
Since the negative photoresist is insoluble in a developing solution after exposure, after the flat layer 104 is exposed by using the mask plate 105 having a complementary pattern with the raised structure 103, the exposed portion (the portion except for the raised structure 103) of the flat layer 104 is insoluble in the developing solution, and the portion of the flat layer 104 corresponding to the raised structure 103 is soluble in the developing solution, so that the raised portion 106 on the flat layer 104 can be removed, and the flatness of the flat layer 104 is improved.
Further, in order to more accurately remove the raised portions on the planarization layer, before step S103, the method may further include:
and measuring the height of each convex structure, and determining the exposure, exposure time and development time for photoetching the flat layer according to the height of each convex structure.
In a specific implementation, measuring the height of each bump structure may include:
and measuring the height of each convex structure by adopting a step profiler or an optical test mode.
By determining the height of each protruding structure, the exposure amount, the exposure time and the development time required for removing the protruding part on the flat layer can be determined according to the height of each protruding structure, so that the flat performance of the flat layer can be further improved.
In practical application, if the height difference of each protrusion structure is relatively large, a special mask plate can be adopted to expose the flat layer, and the light transmittance of the light transmission area of the mask plate can be set according to the height of the protrusion structure, for example, the light transmission area can be set to be 50% light transmission, 60% light transmission or 75% light transmission and other numerical values, so that the protrusion structures with different heights have different exposure, and the flat layer is relatively flat.
In specific implementation, the height of the convex structure is generally between 10nm and 1 μm;
the exposure amount was 10mJ/cm2-500mJ/cm2The exposure time is 30s to 150s (preferably 50s), and the development time is 10s to 200 s.
More specifically, the exposure amount is preferably 100mJ/cm2-200mJ/cm2。
Furthermore, the manufacturing method provided by the embodiment of the present invention may further include:
and baking the flat layer after the photoetching process.
The flat layer after the photoetching process is baked, so that the flat layer can be cured, the edge position of the flat layer can be further flattened, and the flatness performance of the flat layer can be improved.
Based on the same inventive concept, the embodiment of the invention also provides a top-emission organic electroluminescent display panel which is manufactured by adopting the manufacturing method. Because the principle of solving the problems of the top emission organic electroluminescent display panel is similar to that of the manufacturing method, the implementation of the top emission organic electroluminescent display panel can refer to the implementation of the manufacturing method, and repeated details are not repeated.
Based on the same inventive concept, embodiments of the present invention provide a display device, including the top-emitting organic electroluminescent display panel, which may be applied to any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigator. Since the principle of the display device to solve the problem is similar to that of the top emission organic electroluminescent display panel, the implementation of the display device can be referred to the implementation of the top emission organic electroluminescent display panel, and repeated details are omitted.
According to the top-emitting organic electroluminescent display panel, the manufacturing method thereof and the display device provided by the embodiment of the invention, the mask plate with the pattern matched with the plurality of convex structures on the surface of the thin film transistor is adopted to carry out the photoetching process on the flat layer so as to flatten the flat layer, so that the flatness of the flat layer can be improved, the thickness of the OLED thin film manufactured on the flat layer is more uniform, the uniformity of light emission in pixels can be improved, and the granular sensation of an OLED device can be relieved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. A method for manufacturing a top emission organic electroluminescent display panel is characterized by comprising the following steps:
sequentially forming a plurality of film layers on a substrate to form a thin film transistor with a plurality of protruding structures on the surface;
forming a planarization layer on the thin film transistor;
determining the light transmittance of a light-transmitting area in the mask according to the height distribution of each position of the flat layer;
adopting a mask plate with a pattern matched with the plurality of convex structures to carry out exposure and development processes on the flat layer so as to flatten the flat layer;
after forming a planarization layer on the thin film transistor, the method further includes:
carrying out exposure and development processes on the flat layer to form a plurality of through holes in a non-display area;
the exposure and development process for flattening the flat layer is the same as the exposure and development process for forming the through holes; wherein,
the mask plate adopted by the exposure and development process comprises a light-transmitting area and a non-light-transmitting area;
and the light transmittance of the light transmission area corresponding to the protruding structure is different from that of the light transmission area corresponding to the via hole.
2. The method of claim 1, wherein the material of the planarization layer is a positive photoresist;
the method comprises the following steps of adopting a mask plate with a pattern matched with the plurality of protruding structures to expose and develop the flat layer so as to flatten the flat layer, and specifically comprises the following steps:
and carrying out exposure and development processes on the flat layer by adopting a mask plate with the same pattern as the plurality of convex structures so as to flatten the flat layer.
3. The method of claim 1, wherein the material of the planarization layer is a negative photoresist;
the method comprises the following steps of adopting a mask plate with a pattern matched with the plurality of protruding structures to expose and develop the flat layer so as to flatten the flat layer, and specifically comprises the following steps:
and carrying out exposure and development processes on the flat layer by adopting a mask plate with a pattern complementary to the plurality of convex structures so as to flatten the flat layer.
4. The manufacturing method according to any one of claims 1 to 3, wherein before performing the exposure and development process on the planarization layer by using a mask plate having a pattern matching with the plurality of raised structures to planarize the planarization layer, the method further comprises:
and measuring the height of each protruding structure, and determining the exposure, exposure time and developing time of the exposure and developing process of the flat layer according to the height of each protruding structure.
5. The method of claim 4, wherein the height of the raised structures is between 10nm and 1 μm;
the exposure amount is 10mJ/cm2-500mJ/cm2The exposure time is 30s-150s, and the development time is 10s-200 s.
6. The method of manufacturing of claim 1, further comprising:
and baking the flat layer after the exposure and development processes.
7. A top-emission organic electroluminescent display panel, characterized in that the top-emission organic electroluminescent display panel is manufactured by the manufacturing method of any one of claims 1 to 6.
8. A display device comprising the top-emission organic electroluminescent display panel according to claim 7.
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| CN201710243869.2A CN106816558B (en) | 2017-04-14 | 2017-04-14 | Top radiation organic EL display panel, its production method and display device |
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| CN201710243869.2A CN106816558B (en) | 2017-04-14 | 2017-04-14 | Top radiation organic EL display panel, its production method and display device |
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| CN110034152B (en) * | 2018-01-12 | 2023-08-04 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN110021654B (en) * | 2019-04-24 | 2021-11-09 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method thereof and display device |
| CN111029387A (en) * | 2019-12-20 | 2020-04-17 | 京东方科技集团股份有限公司 | Manufacturing method of OLED substrate, display device and mask plate |
| CN112331696B (en) * | 2019-12-27 | 2022-12-06 | 广东聚华印刷显示技术有限公司 | Light-emitting device, substrate thereof and manufacturing method |
| CN112271266B (en) * | 2020-10-26 | 2023-05-16 | 合肥京东方卓印科技有限公司 | Film structure, preparation method thereof, display panel and display device |
| CN113013212B (en) * | 2021-02-25 | 2022-07-12 | 京东方科技集团股份有限公司 | Display panel, preparation method thereof and display device |
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