CN106788346A - A kind of ramp generator circuit - Google Patents
A kind of ramp generator circuit Download PDFInfo
- Publication number
- CN106788346A CN106788346A CN201611046029.9A CN201611046029A CN106788346A CN 106788346 A CN106788346 A CN 106788346A CN 201611046029 A CN201611046029 A CN 201611046029A CN 106788346 A CN106788346 A CN 106788346A
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- China
- Prior art keywords
- transistor
- electric capacity
- switch
- generator circuit
- ramp generator
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
Abstract
The invention provides a kind of ramp generator circuit, including：Bandgap voltage reference, Voltage to current transducer module, integrator module；Wherein, the output end of bandgap voltage reference is connected with the input of the Voltage to current transducer module, the output end of Voltage to current transducer module is connected with integrator module, the output end output ramp signal of integrator module, so as to obtain a high accuracy ramp signal for the continuous-stable unrelated with technique change, circuit structure is simple, and stability and reliability are high, it is easy to be widely popularized and use.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of ramp generator circuit.
Background technology
In modern ADC, in DAC chip and power supply chip, many chip architectures are required for an effective slope of stabilization
Signal is used for the application such as measurement and dynamic control of signal as reference signal.The precision and stability of this signal is to integral core
The performance of piece has a great impact.
At present, realize that ramp signal typically there are three kinds of modes, a kind of is to use traditional resistance capacitance integrator circuit, but
Because resistance has larger process deviation in CMOS technology, its output signal accuracy is poor；Two are integrated using switching capacity
Device circuit, but it is output as a step-like ramp signal, it is not satisfactory in high-precision applications；Three is using a DAC
To build a ramp signal, on the one hand it is still present the discontinuous problem of output signal, and DAC areas are larger in addition, resource
Expend larger.
The content of the invention
In order to overcome problem above, the present invention is intended to provide a kind of ramp generator circuit, so as to obtain one and technique
The high accuracy ramp signal of the unrelated continuous-stable of change.
In order to achieve the above object, the invention provides a kind of ramp generator circuit, including：Bandgap voltage reference,
Voltage-current conversion module, integrator module；Wherein, the output end of the bandgap voltage reference turns with the voltage-to-current
The input for changing the mold block is connected, and the output end of the Voltage-current conversion module is connected with the integrator module, described
The output end output ramp signal of integrator module.
Preferably, the ramp generator circuit also includes switched-capacitor circuit module and power supply, and the voltage-to-current turns
Mold changing block includes the first operational amplifier, the first transistor, transistor seconds, the first electric capacity and the second electric capacity；Wherein, described
The reverse input end of one operational amplifier is connected with the output end of the bandgap voltage reference, first operational amplifier
Drain electrode, one end of the switched-capacitor circuit module, the one of first electric capacity of positive input and the first transistor
End is connected；The source electrode of the first transistor is connected with the drain electrode of the transistor seconds, first operational amplifier
Output end be connected with the grid of the transistor seconds, one end of second electric capacity；The grid of the first transistor
Source electrode with the first transistor is connected；The source electrode of the transistor seconds is connected with the positive pole of the power supply；It is described
The other end of the first electric capacity is connected with the negative pole of the power supply；The other end of second electric capacity and the positive pole phase of the power supply
Connection.
Preferably, the just extremely VDD of the power supply, the negative pole of the power supply is VSS.
Preferably, the first transistor and the transistor seconds are PMOS.
Preferably, the switched-capacitor circuit module includes the 3rd electric capacity, the 4th electric capacity, first switch, second switch, the
Three switches, the 4th switch；Wherein, one end of one end of the first switch and the second switch, the first transistor leakage
Extremely it is connected, one end of the 3rd electric capacity and the other end of the first switch, one end of the 3rd switch are connected, described the
One end of four electric capacity is connected with the other end of the second switch, one end of the 4th switch；3rd electric capacity it is another
The other end of the other end of end and the 4th electric capacity, the other end of the 3rd switch and the 4th switch connects same level.
Preferably, the first switch and the 4th switch be by a clock control, the second switch and the
Three switches are by another clock control.
Preferably, one clock and described another clock are two non-mutually overlapping clocks.
Preferably, described integrator module is put including third transistor, the 4th transistor, the 5th electric capacity and the second computing
Big device；The third transistor drain electrode is connected with the source electrode of the 4th transistor, drain electrode and second computing of the 4th transistor
The reverse input end of amplifier, one end of the 5th electric capacity are connected, and the output end of second amplifier is another with the 5th electric capacity
End is connected, and the source electrode of the third transistor is connected with the positive pole of power supply；The grid and transistor seconds of the third transistor
Grid be connected；The grid of the 4th transistor is connected with the grid of the first transistor；Second operational amplifier it is defeated
Go out end output ramp signal.
Preferably, the third transistor and the 4th transistor are PMOS transistor.
Preferably, the bandgap voltage reference produces a reference voltage unrelated with supply voltage, temperature.
A kind of ramp generator circuit of the invention, the high accuracy for obtaining a continuous-stable unrelated with technique change is oblique
Slope signal, circuit structure is simple, and stability and reliability are high, it is easy to be widely popularized and use.
Brief description of the drawings
Fig. 1 is the schematic diagram of the ramp generator circuit of a preferred embodiment of the invention
Specific embodiment
To make present disclosure more clear understandable, below in conjunction with Figure of description, present disclosure is made into one
Step explanation.Certainly the invention is not limited in the specific embodiment, the general replacement known to those skilled in the art
Cover within the scope of the present invention.
A kind of ramp generator circuit of the invention, including：Bandgap voltage reference, Voltage-current conversion module, integration
Device module；Wherein, the output end of bandgap voltage reference is connected with the input of Voltage-current conversion module, voltage-to-current
The output end of modular converter is connected with integrator module, the output end output ramp signal of integrator module.
The present invention is described in further detail below in conjunction with accompanying drawing 1 and specific embodiment.It should be noted that, accompanying drawing is adopted
With very simplified form, using non-accurately ratio, and only it is used to conveniently, clearly reach the mesh of aid illustration the present embodiment
's.
Refer to Fig. 1, a kind of ramp generator circuit of the present embodiment, including：Bandgap voltage reference, voltage-to-current
Modular converter 1, integrator module 3, also include switched-capacitor circuit module 2 and power supply here.Here, the just extremely VDD of power supply,
The negative pole of the power supply is VSS.
Specifically, the output end of bandgap voltage reference is connected with the input of Voltage-current conversion module 1, voltage-
The output end of current conversion module 1 is connected with integrator module 3, the output end output ramp signal of integrator module 3.This
In, bandgap voltage reference produces a reference voltage VREF unrelated with supply voltage, temperature.
In the present embodiment, Voltage-current conversion module 1 includes the first operational amplifier OP1, the first transistor M1, second
Transistor M2, the first electric capacity C1 and the second electric capacity C2；Wherein, the reverse input end and band-gap reference of the first operational amplifier OP1
The output end of voltage source is connected, the positive input of the first operational amplifier OP1 be connected with the drain electrode of the first transistor M1 and
Node D1, the output end of the first operational amplifier OP1 and the grid of transistor seconds M2 are connected in one end of the first electric capacity C1
It is connected and is connected in node D2 with one end of the second electric capacity C2.The grid of the first transistor M1 and the source electrode of the first transistor M1
It is connected and is connected in node D3 with the drain electrode of transistor seconds M2.The source electrode of transistor seconds M2 and the positive pole VDD of power supply
It is connected；The other end of the second electric capacity C2 is connected with the positive pole VDD of power supply.Node D1 and the one of switched-capacitor circuit module 2
End is connected, and the source electrode of the first transistor M1 is connected with the drain electrode of transistor seconds M2, the other end and the electricity of the first electric capacity C1
The negative pole VSS in source is connected.
Here, switched-capacitor circuit module 2 includes the 3rd electric capacity C3, the 4th electric capacity C4, first switch S1, second switch
S2, the 3rd switch S3, the 4th switch S4；Wherein, one end of one end of first switch S1 and second switch S2 are commonly connected to section
Point D1, the other end of first switch S1 is connected and is connected to section with one end of the 3rd electric capacity C3 with one end of the 3rd switch S3
Point D4；The other end of second switch S2 is connected and is connected to section with one end of the 4th electric capacity C4 with one end of the 4th switch S4
Point D5.The other end of the 3rd electric capacity C3, the other end of the 3rd switch S3, the other end of the 4th electric capacity C4, the 4th switch S4's is another
One end is connected with level V1.One end of first switch S1 is connected with the drain electrode of the first transistor M1, one end of the 3rd electric capacity C3
The other end, one end of the 3rd switch S3 with first switch S1 are connected, and one end of the 4th electric capacity C4 is another with second switch S2
End, one end of the 4th switch S4 are connected.Wherein, the switches of first switch S1 and the 4th S4 is by a clock control, second switch S2
With the 3rd switch S3 by another clock control.Here, when a clock and another clock are two non-mutually overlapping
Clock.
In the present embodiment, integrator module 3 includes third transistor M3, the 4th transistor M4, the 5th electric capacity C5 and second
Operational amplifier OP2；The drain electrode of third transistor M3 is connected with the source electrode of the 4th transistor M4, the drain electrode of the 4th transistor M4 with
The reverse input end of the second operational amplifier OP2, one end of the 5th electric capacity C5 are connected, the output end of the second amplifier OP2 and the
The other end of five electric capacity C5 is connected, and the source electrode of third transistor M3 is connected with the positive pole VDD of power supply；The grid of third transistor M3
Grid with transistor seconds M2 is connected；The grid of the 4th transistor M4 is connected with the grid of the first transistor M1；Second computing
The output end output ramp signal of amplifier OP2.
It should be noted that the first transistor M1, transistor seconds M2, third transistor M3 and the 4th transistor M4 are
PMOS, the substrate of this four PMOSs meets positive source VDD.
The operation principle of the ramp generator circuit of the present embodiment is as follows：
Switched-capacitor circuit 2 uses the non-handing-over clock control of two-phase, and being equivalent to one can be by the resistance of clock control size
Req, its resistance is：
Wherein, f is the frequency for controlling clock CLK1, C3It is the size of the 3rd electric capacity C3 and the 4th electric capacity C4, the 3rd electric capacity
The size of C3 and the 4th electric capacity C4 is identical, by adjusting clock frequency and selecting the big of the 3rd electric capacity C3 and the 4th electric capacity C4
It is small, can both realize the control of equivalent resistance.Can be made on node D1 by the way of double switch condenser network alternate conduction
Ripple reduction half.
The leakage current of transistor seconds M2 is：
Wherein VrefIt is the output voltage of band-gap reference module, V1Biased electrical is connect by the 3rd electric capacity C3, the 4th electric capacity C4
Pressure.
The effect of the first electric capacity C1 is to carry out phase compensation, and the second electric capacity C2 is used to filter, stabilization transistor seconds M2's
Grid voltage, to ensure image current stabilization, continuously.
If the ratio of the breadth length ratio of transistor seconds M2 and third transistor M3 is K, then the electric current of third transistor M3 is
KI1,
Integrator final output：
As can be seen from the above equation, VoutSize it is unrelated with the absolute value of electric capacity, and with the capacitance C of the 3rd electric capacity C33With
The capacitance C of the 5th electric capacity C55Ratio it is related, thus effectively avoid the output error that technique change is brought.
The high accuracy ramp generator circuit of the present embodiment can be very good to obtain one it is unrelated with technique change high-precision
Degree ramp signal, ramp signal continuous-stable, simple structure, it is adaptable to industrial production.
Although the present invention is disclosed as above with preferred embodiment, right embodiment is illustrated only for the purposes of explanation, and
Be not used to limit the present invention, those skilled in the art can make without departing from the spirit and scope of the present invention it is some more
Dynamic and retouching, the protection domain that the present invention is advocated should be defined by claims.
Claims (10)
1. a kind of ramp generator circuit, it is characterised in that including：Bandgap voltage reference, Voltage-current conversion module, product
Divide device module；Wherein, the output end of the bandgap voltage reference is connected with the input of the Voltage-current conversion module
Connect, the output end of the Voltage-current conversion module is connected with the integrator module, the output end of the integrator module
Output ramp signal.
2. ramp generator circuit according to claim 1, it is characterised in that the ramp generator circuit also includes opening
Powered-down capacitive circuit module and power supply, the Voltage-current conversion module include the first operational amplifier, the first transistor, second
Transistor, the first electric capacity and the second electric capacity；Wherein, the reverse input end of first operational amplifier and band-gap reference electricity
The output end of potential source is connected, and the positive input of first operational amplifier and the drain electrode of the first transistor, described opens
One end of powered-down capacitive circuit module, one end of first electric capacity are connected；The source electrode of the first transistor and described second
The drain electrode of transistor is connected, the output end of first operational amplifier and the grid of the transistor seconds, described second
One end of electric capacity is connected；The grid of the first transistor is connected with the source electrode of the first transistor；Described second is brilliant
The source electrode of body pipe is connected with the positive pole of the power supply；The other end of first electric capacity is connected with the negative pole of the power supply；
The other end of second electric capacity is connected with the positive pole of the power supply.
3. ramp generator circuit according to claim 2, it is characterised in that the just extremely VDD of the power supply, the electricity
The negative pole in source is VSS.
4. ramp generator circuit according to claim 2, it is characterised in that the first transistor and described second brilliant
Body pipe is PMOS.
5. ramp generator circuit according to claim 1, it is characterised in that the switched-capacitor circuit module includes the
Three electric capacity, the 4th electric capacity, first switch, second switch, the 3rd switch, the 4th switch；Wherein, one end of the first switch and
One end of the second switch, the first transistor drain electrode are connected, one end of the 3rd electric capacity and the first switch
The other end, one end of the 3rd switch are connected, one end of the 4th electric capacity and the other end of the second switch, described the
One end of four switches is connected；The other end of the 3rd electric capacity and the other end of the 4th electric capacity, the other end of the 3rd switch
The other end with the 4th switch connects same level.
6. ramp generator circuit according to claim 5, it is characterised in that the first switch and the described 4th
, by a clock control, the second switch and the 3rd switch are by another clock control for switch.
7. ramp generator circuit according to claim 6, it is characterised in that one clock and it is described another
Clock is two non-mutually overlapping clocks.
8. ramp generator circuit according to claim 1, it is characterised in that described integrator module includes that the 3rd is brilliant
Body pipe, the 4th transistor, the 5th electric capacity and the second operational amplifier；The third transistor drain electrode and the source electrode of the 4th transistor
It is connected, the drain electrode of the 4th transistor is connected with the reverse input end of the second operational amplifier, one end of the 5th electric capacity, described
The output end of the second amplifier is connected with the other end of the 5th electric capacity, the source electrode of the third transistor and the positive pole phase of power supply
Even；The grid of the third transistor is connected with the grid of transistor seconds；The grid and first crystal of the 4th transistor
The grid of pipe is connected；The output end output ramp signal of second operational amplifier.
9. ramp generator circuit according to claim 8, it is characterised in that the third transistor and described 4th brilliant
Body pipe is PMOS transistor.
10. ramp generator circuit according to claim 1, it is characterised in that the bandgap voltage reference produces
The individual reference voltage unrelated with supply voltage, temperature.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611046029.9A CN106788346A (en) | 2016-11-22 | 2016-11-22 | A kind of ramp generator circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611046029.9A CN106788346A (en) | 2016-11-22 | 2016-11-22 | A kind of ramp generator circuit |
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| CN106788346A true CN106788346A (en) | 2017-05-31 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201611046029.9A Pending CN106788346A (en) | 2016-11-22 | 2016-11-22 | A kind of ramp generator circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020211303A1 (en) * | 2019-04-18 | 2020-10-22 | 宁波飞芯电子科技有限公司 | Ramp generator, analog-to-digital converter and method for controlling generation of ramp signal |
| CN113794467A (en) * | 2021-09-17 | 2021-12-14 | 成都微光集电科技有限公司 | Slope generator |
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| CN101236444A (en) * | 2007-01-30 | 2008-08-06 | 夏普株式会社 | Constant current source, slope voltage generating circuit and A/D converter |
| CN102176188A (en) * | 2011-03-30 | 2011-09-07 | 上海北京大学微电子研究院 | Band-gap reference voltage producing circuit |
| CN102297688A (en) * | 2010-06-25 | 2011-12-28 | 中国科学院电子学研究所 | Full-differential capacitance reading circuit for crosswise sampling secondary charge summation |
| CN204425283U (en) * | 2015-03-10 | 2015-06-24 | 遵义师范学院 | The Full differential operational amplifier that a kind of unity gain bandwidth is adjustable |
| CN105119602A (en) * | 2015-08-28 | 2015-12-02 | 西安启微迭仪半导体科技有限公司 | Switched capacitor comparator circuit in analog to digital converter |
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2016
- 2016-11-22 CN CN201611046029.9A patent/CN106788346A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236444A (en) * | 2007-01-30 | 2008-08-06 | 夏普株式会社 | Constant current source, slope voltage generating circuit and A/D converter |
| CN102297688A (en) * | 2010-06-25 | 2011-12-28 | 中国科学院电子学研究所 | Full-differential capacitance reading circuit for crosswise sampling secondary charge summation |
| CN102176188A (en) * | 2011-03-30 | 2011-09-07 | 上海北京大学微电子研究院 | Band-gap reference voltage producing circuit |
| CN204425283U (en) * | 2015-03-10 | 2015-06-24 | 遵义师范学院 | The Full differential operational amplifier that a kind of unity gain bandwidth is adjustable |
| CN105119602A (en) * | 2015-08-28 | 2015-12-02 | 西安启微迭仪半导体科技有限公司 | Switched capacitor comparator circuit in analog to digital converter |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020211303A1 (en) * | 2019-04-18 | 2020-10-22 | 宁波飞芯电子科技有限公司 | Ramp generator, analog-to-digital converter and method for controlling generation of ramp signal |
| CN113794467A (en) * | 2021-09-17 | 2021-12-14 | 成都微光集电科技有限公司 | Slope generator |
| CN113794467B (en) * | 2021-09-17 | 2023-06-09 | 成都微光集电科技有限公司 | Ramp generator |
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Application publication date: 20170531 |