CN106784217A - Compound substrate, semiconductor device structure and preparation method thereof - Google Patents
Compound substrate, semiconductor device structure and preparation method thereof Download PDFInfo
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- CN106784217A CN106784217A CN201611140373.4A CN201611140373A CN106784217A CN 106784217 A CN106784217 A CN 106784217A CN 201611140373 A CN201611140373 A CN 201611140373A CN 106784217 A CN106784217 A CN 106784217A
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- 239000000758 substrate Substances 0.000 title claims abstract description 125
- 239000004065 semiconductor Substances 0.000 title claims abstract description 105
- 150000001875 compounds Chemical class 0.000 title claims abstract description 74
- 238000002360 preparation method Methods 0.000 title claims abstract description 47
- 150000004767 nitrides Chemical class 0.000 claims abstract description 48
- 230000012010 growth Effects 0.000 claims abstract description 43
- 238000010276 construction Methods 0.000 claims abstract description 33
- 230000000737 periodic effect Effects 0.000 claims abstract description 6
- 230000007704 transition Effects 0.000 claims description 34
- 238000000407 epitaxy Methods 0.000 claims description 30
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 18
- 229910052681 coesite Inorganic materials 0.000 claims description 8
- 229910052906 cristobalite Inorganic materials 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052682 stishovite Inorganic materials 0.000 claims description 8
- 229910052905 tridymite Inorganic materials 0.000 claims description 8
- 239000004744 fabric Substances 0.000 claims 1
- 238000009826 distribution Methods 0.000 abstract description 8
- 238000000605 extraction Methods 0.000 abstract description 8
- 125000004122 cyclic group Chemical group 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 202
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 31
- 229910002601 GaN Inorganic materials 0.000 description 29
- 238000000034 method Methods 0.000 description 23
- 239000013078 crystal Substances 0.000 description 17
- 229910052594 sapphire Inorganic materials 0.000 description 13
- 239000010980 sapphire Substances 0.000 description 13
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 9
- 229910017083 AlN Inorganic materials 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- 238000002156 mixing Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 229910002704 AlGaN Inorganic materials 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000006911 nucleation Effects 0.000 description 3
- 238000010899 nucleation Methods 0.000 description 3
- 238000002310 reflectometry Methods 0.000 description 3
- 229910005540 GaP Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052593 corundum Inorganic materials 0.000 description 2
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- JRVCPDVOFCWKAG-UHFFFAOYSA-N Amosulalol hydrochloride Chemical compound Cl.COC1=CC=CC=C1OCCNCC(O)C1=CC=C(C)C(S(N)(=O)=O)=C1 JRVCPDVOFCWKAG-UHFFFAOYSA-N 0.000 description 1
- 208000012868 Overgrowth Diseases 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000004678 hydrides Chemical class 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910017464 nitrogen compound Inorganic materials 0.000 description 1
- 150000002830 nitrogen compounds Chemical class 0.000 description 1
- 230000032696 parturition Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000004153 renaturation Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The present invention provides a kind of compound substrate, semiconductor device structure and preparation method thereof, and the preparation method of the compound substrate is comprised the following steps：1）Growth substrates are provided；2）Nitride buffer layer is formed on the growth substrates surface；3）Semiconductor medium laminated construction is formed on the nitride buffer layer surface；4）The semiconductor medium laminated construction is graphical, form periodic intervals distribution bulge-structure with the nitride buffer layer surface.The present invention forms the bulge-structure being distributed in cyclic array by nitride buffer layer surface, can improve the light extraction efficiency of the semiconductor devices formed on the compound substrate surface, reduces the dislocation density in the epitaxial layer that the compound substrate surface is formed；Simultaneously as each layer has larger reflection differences with the GaN layer in the semiconductor devices that the compound substrate surface is formed in the bulge-structure, the light emission rate of the semiconductor devices formed on the compound substrate surface can be improved.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of compound substrate, semiconductor device structure and its system
Preparation Method.
Background technology
Semiconductor lighting has the advantages that long lifespan, energy-saving and environmental protection, safe, its application as new and effective solid light source
Field expands rapidly.The core of semiconductor lighting is light emitting diode (LED), from structure for LED be exactly by III-V
Compounds of group, as the semiconductors such as GaAs (GaAs), GaP (gallium phosphide), GaAsP (gallium arsenide phosphide), GaN (gallium nitride) are formed
PN junction.Therefore, it has the I-V characteristic of general PN junction, i.e. forward conduction, reversely cut-off, breakdown characteristics.Additionally, in certain bar
Under part, it also has the characteristics of luminescence.Under forward voltage, by injection P areas of N areas, hole is by injection N areas of P areas for electronics.Into other side
Minority carrier (son less) part in region is combined and lights with majority carrier (son more).
In order to the luminous efficiency for increasing LED can typically increase having for SQW between the N-type layer and P-type layer of PN junction
Source region, the emission wavelength of LED depends on the material and the width of SQW of composition LED PN junctions and SQW, GaN base III-V nitrogen
Compound is the optimal material for preparing visible LED including InGaN, AlGaN etc..The concrete structure of LED is mostly using extension
Means are grown in substrate successively according to the order of N-type layer, active area, P-type layer.Due to without cheap GaN homo-substrates,
GaN base LED is typically grown on Si, SiC and Sapphire Substrate, and wherein Sapphire Substrate is most popular substrate.
It is extremely difficult in the high-quality crystalline material of grown on foreign substrates, on a sapphire substrate growth of device level
GaN crystal material is even more difficult, and until the beginning of the nineties, Japanese is developed using metal organic chemical compound vapor deposition (MOCVD)
The two-step growth method of growth of device level GaN epitaxial layer is gone out.So-called two-step growth method is exactly：First in 500 DEG C or so of life
Under temperature long, sapphire substrate surface growth thickness the GaN or AlGaN of 30 rans cushion (buffer
Layer), growth temperature is then increased to greater than 1000 DEG C again, can just grows high-quality GaN epitaxial layer.With such
There is substantial amounts of dislocation in the device architecture that method is made, the luminous efficiency of dislocation density device higher is lower.
Present most widely used so-called sapphire pattern substrate (PSS) technology, it is possible to reduce the dislocation in epitaxial layer is close
Degree, improves the internal quantum efficiency of LED, it is also possible to by the diffusing scattering of PSS figures, improve the light extraction efficiency of LED.Conventional PSS
Technology is exactly to form various microcosmos patterns in sapphire surface using photoetching process and etching process.Such as in (0001)
The sapphire surface of crystal orientation forms the pyramidal projections being still made up of sapphire material with some cycles structure, conoid process
To retain (0001) crystal face of certain area between rising.Due to (0001) crystal face between pyramidal projections surface and pyramidal projections
Between there is certain selective growth mechanism, it is, when carrying out epitaxial growth, (0001) crystal face between pyramidal projections
The probability of upper nucleation is bigger than the probability of the nucleation on pyramidal projections surface, and the epitaxial layer above pyramidal projections is general by laterally giving birth to
Long to be formed, so epitaxial growth is carried out on PSS substrates has the effect of lateral growth, the dislocation that can be reduced in epitaxial layer is close
Degree, improves the internal quantum efficiency using the LED of PSS substrates.The microstructure of another aspect PSS substrate surfaces is sent to LED
Light have certain diffusing scattering effect, total reflection effect can be destroyed, therefore PSS substrates can also improve the light extraction efficiency of LED.
Conventional PSS Growns LED epitaxial structure, will also use two-step method presented hereinbefore.
Conventional PSS technologies also have many defects.Firstly, since dry method is still either used with wet method, it is sapphire to add
Work difficulty is all very big, and this can not only influence the product yield of conventional PSS, can also increase manufacturing cost；Secondly as sapphire
The growth selectivity between (0001) crystal face between pyramidal projections surface and pyramidal projections is not clearly, if conoid process
The area of (0001) crystal face between rising is too small, the surface of pyramidal projections also can nucleation, and formed on pyramidal projections surface
The crystal orientation of nucleus and (0001) crystal face between pyramidal projections on the crystal orientation of nucleus that is formed it is different, be easily caused polycrystalline
Produce；Again, it is 1.8 or so because the refractive index of Sapphire Substrate is higher, even if forming bulge-structure in its surface, to LED
The diffusing scattering effect of the light for being sent to the lifting of light extraction efficiency nor preferably, also have very big limitation.
Laterally overgrown technology (Epitaxial Lateral Overgrowth, ELO) be thickness be micron dimension
High-quality GaN epitaxial layer on formed medium mask, then carry out secondary epitaxy growth obtain dislocation density than relatively low
GaN.The GaN epitaxial layer of the high-quality is mono-crystalline structures, and production cost is high.And between medium figure and sapphire surface
Thickness can influence the effect of diffusing scattering more than 1 micron of GaN, can also influence the uniformity of device, and weight more than 1 micron of GaN in addition
Renaturation.
There is article to report and directly form semiconductor medium layer pattern in sapphire substrate surface, carry out epitaxial growth, but
It is process window very little, does not have volume production to be worth.
There is also one layer of the sputtering (Sputter) on conventional PSS now has the technology of aluminium nitride (AlN) of certain crystal orientation,
Also there is significant difference with the technology, cost performance is also poorer than the technology.
Recent years, the epitaxial structure of GaN base LED component also had some to develop, except excessively basic n-type GaN layer, InGaN are more
Outside mqw light emitting layer and p-type GaN layer, in order to reduce the stress in epitaxial structure, the injection efficiency of carrier is improved,
InGaN stress-buffer layers would generally be inserted before InGaN multiple quantum well light emittings layer, after InGaN multiple quantum well light emittings layer also
P-type AlGaN electronic barrier layers can be inserted.Even so, the luminous efficiency of GaN base LED component also has very big room for promotion.
Therefore it provides one kind can effectively improve GaN base epitaxial layer and LED epitaxial structure crystal mass, such as dislocation are close
Degree, and the manufacture of the novel graphic substrate and related device of LED property indices, especially LED luminous efficiencies can be improved
Method is necessary.
The content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of compound substrate, semiconductor device
Part structure and preparation method thereof, for solving the crystal mass that GaN base epitaxial layer of the prior art and LED epitaxial structure are present
It is not high, respectively to the problem that performance indications are to be improved.
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of compound substrate, described multiple
The preparation method for closing substrate is comprised the following steps：
1) growth substrates are provided；
2) nitride buffer layer is formed on the growth substrates surface；
3) semiconductor medium laminated construction is formed on the nitride buffer layer surface；
4) it is the semiconductor medium laminated construction is graphical, between the formation periodically of the nitride buffer layer surface
Every distribution bulge-structure.
As a kind of preferred scheme of the preparation method of compound substrate of the invention, the semiconductor medium lamination packs
At least two-layer semiconductor medium layer is included, the material of the adjacent semiconductor medium layer is different.
As a kind of preferred scheme of the preparation method of compound substrate of the invention, the semiconductor medium lamination packs
Include SiO2Layer, Si3N4Layer or SiONxIn layer at least two.
Used as a kind of preferred scheme of the preparation method of compound substrate of the invention, the bulge-structure is shaped as cylinder
It is shape, square column type, conical or bullet-headed.
As a kind of preferred scheme of the preparation method of compound substrate of the invention, the maximum transversal chi of the bulge-structure
Very little is 0.1 μm~10 μm, and the height of the bulge-structure is 0.2 μm~3 μm, and the minimum spacing of the adjacent bulge-structure is
0.1 μm~5 μm.
The present invention also provides a kind of compound substrate, and the compound substrate includes：
Growth substrates；
Nitride buffer layer, positioned at the growth substrates surface；
Bulge-structure, the nitride buffer layer surface is distributed in periodic intervals；The bulge-structure is semiconductor
Dielectric stack structure.
Used as a kind of preferred scheme of compound substrate of the invention, the bulge-structure includes at least two-layer semiconductor medium
Layer, the material of the adjacent semiconductor medium layer is different.
As a kind of preferred scheme of the preparation method of compound substrate of the invention, the semiconductor medium lamination packs
Include SiO2Layer, Si3N4Layer or SiONxIn layer at least two.
As a kind of preferred scheme of compound substrate of the invention, the bulge-structure be shaped as cylinder, square column type,
It is conical or bullet-headed.
Used as a kind of preferred scheme of compound substrate of the invention, the maximum transverse size of the bulge-structure is 0.1 μm
~10 μm, the height of the bulge-structure is 0.2 μm~3 μm, and the minimum spacing of the adjacent bulge-structure is 0.1 μm~5 μm.
The present invention also provides a kind of preparation method of semiconductor device structure, the preparation method of the semiconductor device structure
Comprise the following steps：
1) compound substrate is prepared using the preparation method as described in above-mentioned either a program；
2) extension transition zone is formed on the compound substrate surface, the extension transition zone is filled up between the bulge-structure
Gap, and the bulge-structure is completely covered；
3) N-type epitaxy layer is formed in the extension transition layer surface；
4) quantum well layer is formed on the N-type epitaxy layer surface；
5) p-type epitaxial layer is formed on the quantum well layer surface.
As a kind of preferred scheme of the preparation method of semiconductor device structure of the invention, step 5) after, also include
N electrode is formed on the N-type epitaxy layer surface, and the step of the p-type epi-layer surface forms P electrode.
As a kind of preferred scheme of the preparation method of semiconductor device structure of the invention, step 5) after, also include
P electrode is formed in the p-type epi-layer surface, and N is formed away from the surface of the nitride buffer layer in the growth substrates
The step of electrode.
The present invention also provides a kind of semiconductor device structure, and the semiconductor device structure includes：
Compound substrate as described in above-mentioned either a program；
Extension transition zone, the gap filled up between the bulge-structure is simultaneously completely covered the bulge-structure；
N-type epitaxy layer, positioned at the extension transition layer surface；
Quantum well layer, positioned at the N-type epitaxy layer surface；
P-type epitaxial layer, with the quantum well layer surface.
Used as a kind of preferred scheme of semiconductor device structure of the invention, the semiconductor device structure also includes：
N electrode, positioned at the N-type epitaxy layer surface；
P electrode, positioned at the p-type epi-layer surface.
Used as a kind of preferred scheme of semiconductor device structure of the invention, the semiconductor device structure also includes：
P electrode, positioned at the p-type epi-layer surface；
N electrode, positioned at the growth substrates away from the nitride buffer layer surface.
As described above, compound substrate of the invention, semiconductor device structure and preparation method thereof, with following beneficial effect
Really：The preparation method of compound substrate of the invention forms the projection being distributed in cyclic array by nitride buffer layer surface
Structure, can improve the light extraction efficiency of the semiconductor devices formed on the compound substrate surface, reduce follow-up described compound
Dislocation density in the epitaxial layer that substrate surface is formed；Simultaneously as the bulge-structure is semiconductor medium laminated construction, institute
State each layer and the GaN layer subsequently in the semiconductor devices that the compound substrate surface is formed in bulge-structure have it is larger anti-
Penetrate that rate is poor, the light emission rate of the follow-up semiconductor devices formed on the compound substrate surface can be improved.
Brief description of the drawings
Fig. 1 is shown as the flow chart of the preparation method of the compound substrate provided in the embodiment of the present invention one.
The structure that Fig. 2 to Fig. 7 is shown as each step of preparation method of the compound substrate provided in the embodiment of the present invention one is shown
It is intended to.
Fig. 8 is shown as the flow chart of the semiconductor device structure preparation method provided in the embodiment of the present invention three.
Fig. 9 to Figure 14 is shown as the knot of each step of semiconductor device structure preparation method provided in the embodiment of the present invention three
Structure schematic diagram.
Component label instructions
10 growths sink to the bottom
11 nitride buffer layers
12 semiconductor medium laminated construction
13 bulge-structures
14 extension transition zones
15 N-type epitaxy layers
16 quantum well layers
17 p-type epitaxial layers
18 N electrodes
19 P electrodes
Specific embodiment
Embodiments of the present invention are illustrated below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages of the invention and effect easily.The present invention can also be by specific realities different in addition
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Refer to Fig. 1~Figure 14.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though package count when only display is with relevant component in the present invention rather than according to actual implementation in diagram
Mesh, shape and size are drawn, and the kenel of each component, quantity and ratio can be a kind of random change during its actual implementation, and its
Assembly layout kenel is likely to increasingly complex.
Embodiment one
Fig. 1 is referred to, the present invention provides a kind of preparation method of compound substrate, and the preparation method of the compound substrate includes
Following steps：
1) growth substrates are provided；
2) nitride buffer layer is formed on the growth substrates surface；
3) semiconductor medium laminated construction is formed on the nitride buffer layer surface；
4) it is the semiconductor medium laminated construction is graphical, between the formation periodically of the nitride buffer layer surface
Every the bulge-structure of distribution.
In step 1) in, refer to S1 steps and the Fig. 2 in Fig. 1, there is provided growth substrates 10.
As an example, the growth substrates 10 can be selected according to actual needs, it is preferable that the growth substrates 10 can be with
Al2O3Substrate, SiC substrate Si substrates, ZnO substrates or GaN substrate.
In step 2) in, S2 steps and the Fig. 3 in Fig. 1 are referred to, forming nitride on the surface of the growth substrates 10 delays
Rush layer 11.
As an example, the nitride buffer layer 11 can be AlxGa1-xN layers, wherein, 0≤x≤0.5；Can also be BN
Layer；It can also be AlN layers, AlN layers of crystal orientation is (0001) crystal orientation.
As an example, can using MOCVD (Metalorganic chemical vapor deposition), HVPE (hydride gas-phase epitaxy) or
PVD (physical vapour deposition (PVD)) techniques form the nitride buffer layer 11 on the surface of the growth substrates 10.
As an example, the thickness of the nitride buffer layer 11 can be set according to actual needs, it is preferable that this reality
Apply in example, the thickness of the nitride buffer layer 11 is 50 angstroms~600 angstroms.
In step 3) in, S3 steps and the Fig. 4 in Fig. 1 are referred to, formed on the surface of the nitride buffer layer 11 and partly led
Body dielectric stack structure 12.
As an example, using techniques such as plasma reinforced chemical vapour deposition (PECVD), PVD or electron beam evaporations in institute
State that the surface of nitride buffer layer 11 is sequentially depositing or alternating deposit at least two-layer semiconductor medium layer described is partly led to be formed successively
The medium laminated structure 12 of body, the material of described and adjacent semiconductor medium layer is different, and semiconductor medium layer is anti-
Penetrate rate and differ larger with the reflectivity of GaN.
As an example, the semiconductor medium laminated construction 12 includes SiO2Layer, Si3N4Or SiONxIn layer at least two
Kind.Specifically, the semiconductor medium laminated construction 12 can be to include SiO2Layer and Si3N4Double-layer structure, or bag
Include the SiO being alternately superimposed on successively2Layer and Si3N4Sandwich construction, or including the SiO being sequentially stacked2Layer, Si3N4And
SiONxThe three-decker of layer, can also be to include the SiO being periodically alternately superimposed on successively2Layer, Si3N4And SiONxThe multilayer of layer
Structure, can also be to include aperiodicity is alternately superimposed on successively SiO2Layer, Si3N4And SiONxThe sandwich construction of layer.Wherein,
The SiO that Fig. 4 includes being sequentially stacked with the semiconductor medium laminated construction 122Layer, Si3N4And SiONxThe three-decker conduct of layer
Example.
In step 4) in, S4 steps and the Fig. 5 to Fig. 7 in Fig. 1 are referred to, wherein, Fig. 6 and Fig. 7 is the cross section structure of Fig. 5
Schematic diagram, the semiconductor medium laminated construction 12 is graphical, formed periodically with the surface of the nitride buffer layer 11
The bulge-structure 13 being spaced apart.
As an example, using lithographic etch process to etch the removal part semiconductor medium laminated construction 12 to be formed
Bulge-structure 13 is stated, the nitride buffer layer 11 is exposed between the bulge-structure 13.
As an example, the bulge-structure 13 is distributed on the surface of the nitride buffer layer 11 in periodicity hexagonal, also may be used
With in array distribution.
As an example, the bulge-structure 13 is shaped as cylinder, square column type, conical or bullet-headed.Wherein, scheme
6 are shaped as bullet-headed cross section structure schematic diagram for the bulge-structure 13, and Fig. 7 is being shaped as the bulge-structure 13
The cross section structure schematic diagram of cylinder or square column type.
As an example, the maximum transverse size of the bulge-structure 13 is 0.1 μm~10 μm, i.e., the described bottom of bulge-structure 13
The size in portion is 0.1 μm~10 μm；The height of the bulge-structure 13 is 0.2 μm~3 μm, i.e. step 3) in formed described half
The thickness of conductive medium laminated construction 12 is 0.2 μm~3 μm；The minimum spacing of the adjacent bulge-structure 13 is 0.1 μm~5 μ
M, i.e., the spacing of the adjacent bottom of the bulge-structure 13 is 0.1 μm~5 μm.
The preparation method of compound substrate of the invention is in periodicity battle array by being formed on the surface of the nitride buffer layer 11
The bulge-structure 13 of column distribution, can improve the light extraction efficiency of the follow-up semiconductor devices formed on the compound substrate surface,
Reduce the follow-up dislocation density in the epitaxial layer that the compound substrate surface is formed；Simultaneously as the bulge-structure 13 is
Semiconductor medium laminated construction, each layer and the semiconductor devices for subsequently being formed on the compound substrate surface in the bulge-structure
In GaN layer there are larger reflection differences, the follow-up semiconductor devices formed on the compound substrate surface can be improved
Light emission rate.
Embodiment two
Please continue to refer to Fig. 5 and Fig. 7, the present invention also provides a kind of compound substrate, and the compound substrate can be using implementation
Preparation method described in example one is prepared, and the compound substrate includes：Growth substrates 10；Nitride buffer layer 11, institute
Nitride buffer layer 11 is stated positioned at the surface of the growth substrates 10；Bulge-structure 13, the bulge-structure 13 is in periodic intervals
It is distributed in the surface of the nitride buffer layer 11；The bulge-structure 13 is semiconductor medium laminated construction.
As an example, the growth substrates 10 can be Al2O3Substrate, SiC substrate Si substrates, ZnO substrates or GaN substrate.
As an example, the nitride buffer layer 11 can be AlxGa1-xN layers, wherein, 0≤x≤0.5；Can also be BN
Layer；It can also be AlN layers, AlN layers of crystal orientation is (0001) crystal orientation.
As an example, the thickness of the nitride buffer layer 11 can be set according to actual needs, it is preferable that this reality
Apply in example, the thickness of the nitride buffer layer 11 is 50 angstroms~600 angstroms.
As an example, the bulge-structure 13 includes at least two-layer semiconductor medium layer, the adjacent semiconductor medium layer
Material it is different, and the reflectivity of semiconductor medium layer differs larger with the reflectivity of GaN.
As an example, the bulge-structure 13 includes SiO2Layer, Si3N4Or SiONxIn layer at least two.Specifically, convex
It can be to include SiO to play structure 132Layer and Si3N4Double-layer structure, or including the SiO being alternately superimposed on successively2Layer with
Si3N4Sandwich construction, or including the SiO being sequentially stacked2Layer, Si3N4And SiONxThe three-decker of layer, can also be
Including the SiO being periodically alternately superimposed on successively2Layer, Si3N4And SiONxThe sandwich construction of layer, can also be to include non-week successively
The SiO that phase property is alternately superimposed on2Layer, Si3N4And SiONxThe sandwich construction of layer.Wherein, Fig. 6 and Fig. 7 are with the bulge-structure
13 include the SiO being sequentially stacked2Layer, Si3N4And SiONxThe three-decker of layer is as an example.
As an example, the bulge-structure 13 is distributed on the surface of the nitride buffer layer 11 in periodicity hexagonal, also may be used
With in array distribution.
As an example, the bulge-structure 13 is shaped as cylinder, square column type, conical or bullet-headed.Wherein, scheme
6 are shaped as bullet-headed cross section structure schematic diagram for the bulge-structure 13, and Fig. 7 is being shaped as the bulge-structure 13
The cross section structure schematic diagram of cylinder or square column type.
As an example, the maximum transverse size of the bulge-structure 13 is 0.1 μm~10 μm, i.e., the described bottom of bulge-structure 13
The size in portion is 0.1 μm~10 μm；The height of the bulge-structure 13 is 0.2 μm~3 μm, i.e., the thickness of described bulge-structure 13
It is 0.2 μm~3 μm；The minimum spacing of the adjacent bulge-structure 13 is 0.1 μm~5 μm, i.e., the adjacent bottom of the bulge-structure 13
The spacing in portion is 0.1 μm~5 μm.
Compound substrate of the invention is formed in the convex of cyclic array distribution by the surface of the nitride buffer layer 11
Structure 13 is played, the light extraction efficiency of the follow-up semiconductor devices formed on the compound substrate surface can be improved, reduced and subsequently exist
Dislocation density in the epitaxial layer that the compound substrate surface is formed；Simultaneously as the bulge-structure 13 is semiconductor medium
Laminated construction, each layer and GaN layer subsequently in the semiconductor devices that the compound substrate surface is formed in the bulge-structure
With larger reflection differences, the light emission rate of the follow-up semiconductor devices formed on the compound substrate surface can be improved.
Embodiment three
Fig. 8 is referred to, the present invention also provides a kind of preparation method of semiconductor device structure, the semiconductor device structure
Preparation method comprise the following steps：
1) compound substrate is prepared using the preparation method as described in embodiment one；
2) extension transition zone is formed on the compound substrate surface, the extension transition zone is filled up between the bulge-structure
Gap, and the bulge-structure is completely covered；
3) N-type epitaxy layer is formed in the extension transition layer surface；
4) quantum well layer is formed on the N-type epitaxy layer surface；
5) p-type epitaxial layer is formed on the quantum well layer surface.
In step 1) in, the S1 steps in Fig. 8 are referred to, composite lining is prepared using the preparation method described in embodiment one
Bottom.
The specific method for preparing the compound substrate refers to embodiment one, is not repeated herein.
In step 2) in, S2 steps and the Fig. 9 in Fig. 7 are referred to, form extension transition zone on the compound substrate surface
14, the gap that the extension transition zone 14 is filled up between the bulge-structure 13, and the bulge-structure 13 is completely covered.
As an example, forming extension transition zone 14 in the growth district 121 using MOCVD or HVPE techniques.
As an example, the thickness of the extension transition zone 14 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the extension transition zone 14 can be 1 μm~10 μm.
In one example, the extension transition zone 14 be single layer structure, the extension transition zone 14 can for GaN layer,
AlGaN layer, AlN layer, InGaN layer, AlInGaN layer, the N-type semiconductor material layer for mixing Si or the p-type semiconductor material layer for mixing Mg.
In another example, the extension transition zone 14 is two-layer or multi-layer laminate structure, and the extension transition zone 14 can
Think GaN layer, AlGaN layer, AlN layer, InGaN layer, AlInGaN layer, the N-type semiconductor material layer for mixing Si or the p-type half for mixing Mg
In conductor material layer at least two laminated construction.
It should be noted that in the present embodiment with the bulge-structure 13 be shaped as it is bullet-headed as an example, other
The corresponding process of the bulge-structure 13 and structure of shape are identical with the embodiment.
In step 3) in, S3 steps and the Figure 10 in Fig. 8 are referred to, formed outside N-type on the surface of extension transition zone 14
Prolong layer 15.
As an example, the N-type epitaxy layer 15 can be formed on the surface of extension transition zone 14 using MOCVD techniques.
In step 4) in, S4 steps and the Figure 11 in Fig. 8 are referred to, form SQW on the surface of the N-type epitaxy layer 15
Layer 16.
As an example, the quantum well layer 16 can be formed on the surface of the N-type epitaxy layer 15 using MOCVD techniques.
In step 5) in, S5 steps and the Figure 12 in Fig. 8 are referred to, form p-type extension on the surface of the quantum well layer 16
Layer 17.
As an example, the p-type epitaxial layer 17 can be formed on the surface of the quantum well layer 16 using MOCVD techniques.
In one example, Figure 13, step 5 are referred to) after, it is additionally included in the surface of the N-type epitaxy layer 15 and forms N electrode
18, and the step of the surface of p-type epitaxial layer 17 forms P electrode 19.
As an example, when the surface of the N-type epitaxy layer 15 forms the N electrode 18, first being gone using lithographic etch process
Ledge structure is formed to expose the N-type epitaxy layer 15 except the part quantum well layer 16 and part the p-type epitaxial layer 17,
Then form the N electrode on the surface of the N-type epitaxy layer 15 again.Certainly, can also be formed the N-type epitaxy layer 15 is exposed
After ledge structure, while the surface of the N-type epitaxy layer 15 forms the N electrode, in the surface shape of the p-type epitaxial layer 17
Into the P electrode 16.
In another example, Figure 14, step 5 are referred to) after, it is additionally included in the surface of p-type epitaxial layer 17 and forms P electricity
Pole 19, and the step of the growth substrates 10 form N electrode 18 away from the surface of the nitride buffer layer 11.
Example IV
Please continue to refer to Figure 13 and Figure 14, the present invention also provides a kind of semiconductor device structure, the junction of semiconductor device
Structure can be prepared by the preparation method in embodiment three, and the semiconductor device structure includes：Such as institute in embodiment two
The compound substrate stated；Extension transition zone 14, the gap that the extension transition zone 14 is filled up between the bulge-structure 13 is simultaneously complete
Cover the bulge-structure 13；N-type epitaxy layer 15, the N-type epitaxy layer 15 is located at the surface of extension transition zone 14；SQW
Layer 16, the quantum well layer 16 is located at the surface of the N-type epitaxy layer 15；P-type epitaxial layer 17, the p-type epitaxial layer 17 with it is described
The surface of quantum well layer 16.
As an example, the thickness of the extension transition zone 14 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the extension transition zone 14 can be 1 μm~10 μm.
In one example, the extension transition zone 14 be single layer structure, the extension transition zone 14 can for GaN layer,
AlGaN layer, AlN layer, InGaN layer, AlInGaN layer, the N-type semiconductor material layer for mixing Si or the p-type semiconductor material layer for mixing Mg.
In another example, the extension transition zone 14 is two-layer or multi-layer laminate structure, and the extension transition zone 14 can
Think GaN layer, AlGaN layer, AlN layer, InGaN layer, AlInGaN layer, the N-type semiconductor material layer for mixing Si or the p-type half for mixing Mg
In conductor material layer at least two laminated construction.
It should be noted that in the present embodiment it is same using the bulge-structure 13 be shaped as it is bullet-headed as showing.
In one example, as shown in figure 13, the semiconductor device structure also includes：N electrode 18, the N electrode 18
In the surface of the N-type epitaxy layer 15；P electrode 19, the P electrode is located at the surface of p-type epitaxial layer 17.
In another example, as shown in figure 14, the semiconductor device structure also includes：P electrode 19, the P electrode 19
Positioned at the surface of p-type epitaxial layer 17；N electrode 18, it is slow away from the nitride that the N electrode 18 is located at the growth substrates 10
Rush the surface of layer 11.
In sum, the present invention provides a kind of compound substrate, semiconductor device structure and preparation method thereof, the composite lining
The preparation method at bottom is comprised the following steps：1) growth substrates are provided；2) nitride buffer layer is formed on the growth substrates surface；
3) semiconductor medium laminated construction is formed on the nitride buffer layer surface；4) by the semiconductor medium laminated construction figure
Change, periodic intervals distribution bulge-structure is formed with the nitride buffer layer surface.The preparation of compound substrate of the invention
Method forms the bulge-structure being distributed in cyclic array by nitride buffer layer surface, can improve in the composite lining
The light extraction efficiency of the semiconductor devices that basal surface is formed, reduces the follow-up position in the epitaxial layer that the compound substrate surface is formed
Dislocation density；Simultaneously as the bulge-structure be semiconductor medium laminated construction, in the bulge-structure each layer with subsequently in institute
The GaN layer stated in the semiconductor devices of compound substrate surface formation has larger reflection differences, can improve follow-up described
The light emission rate of the semiconductor devices that compound substrate surface is formed.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
The personage for knowing this technology all can carry out modifications and changes under without prejudice to spirit and scope of the invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete with institute under technological thought without departing from disclosed spirit such as
Into all equivalent modifications or change, should be covered by claim of the invention.
Claims (16)
1. a kind of preparation method of compound substrate, it is characterised in that the preparation method of the compound substrate is comprised the following steps：
1) growth substrates are provided；
2) nitride buffer layer is formed on the growth substrates surface；
3) semiconductor medium laminated construction is formed on the nitride buffer layer surface；
4) it is the semiconductor medium laminated construction is graphical, form periodic intervals point with the nitride buffer layer surface
The bulge-structure of cloth.
2. the preparation method of compound substrate according to claim 1, it is characterised in that：The semiconductor medium laminated construction
Including at least two-layer semiconductor medium layer, the material of the adjacent semiconductor medium layer is different.
3. the preparation method of compound substrate according to claim 1, it is characterised in that：The semiconductor medium laminated construction
Including SiO2Layer, Si3N4Layer or SiONxIn layer at least two.
4. the preparation method of compound substrate according to claim 1, it is characterised in that：The bulge-structure be shaped as circle
It is cylindricality, square column type, conical or bullet-headed.
5. the preparation method of compound substrate according to claim 1, it is characterised in that：The maximum transversal of the bulge-structure
Size is 0.1 μm~10 μm, and the height of the bulge-structure is 0.2 μm~3 μm, and the minimum spacing of the adjacent bulge-structure is
0.1 μm~5 μm.
6. a kind of compound substrate, it is characterised in that the compound substrate includes：
Growth substrates；
Nitride buffer layer, positioned at the growth substrates surface；
Bulge-structure, the nitride buffer layer surface is distributed in periodic intervals；The bulge-structure is semiconductor medium
Laminated construction.
7. compound substrate according to claim 6, it is characterised in that：The bulge-structure is situated between including at least two-layer semiconductor
Matter layer, the material of the adjacent semiconductor medium layer is different.
8. compound substrate according to claim 7, it is characterised in that：The semiconductor medium laminated construction includes SiO2Layer,
Si3N4Layer or SiONxIn layer at least two.
9. compound substrate according to claim 6, it is characterised in that：The bulge-structure be shaped as cylinder, square column
It is shape, conical or bullet-headed.
10. compound substrate according to claim 6, it is characterised in that：The maximum transverse size of the bulge-structure is 0.1
μm~10 μm, the height of the bulge-structure is 0.2 μm~3 μm, and the minimum spacing of the adjacent bulge-structure is 0.1 μm~5 μ
m。
A kind of 11. preparation methods of semiconductor device structure, it is characterised in that the preparation method bag of the semiconductor device structure
Include following steps：
1) compound substrate is prepared using the preparation method as any one of claim 1 to 5；
2) extension transition zone is formed on the compound substrate surface, between the extension transition zone is filled up between the bulge-structure
Gap, and the bulge-structure is completely covered；
3) N-type epitaxy layer is formed in the extension transition layer surface；
4) quantum well layer is formed on the N-type epitaxy layer surface；
5) p-type epitaxial layer is formed on the quantum well layer surface.
The preparation method of 12. semiconductor device structures according to claim 11, it is characterised in that：Step 5) after, also
It is included in the N-type epitaxy layer surface and forms N electrode, and the step of the p-type epi-layer surface forms P electrode.
The preparation method of 13. semiconductor device structures according to claim 11, it is characterised in that：Step 5) after, also
Be included in the p-type epi-layer surface and form P electrode, and the growth substrates away from the nitride buffer layer surface shape
The step of into N electrode.
14. a kind of semiconductor device structures, it is characterised in that the semiconductor device structure includes：
Compound substrate as any one of claim 6 to 10；
Extension transition zone, the gap filled up between the bulge-structure is simultaneously completely covered the bulge-structure；
N-type epitaxy layer, positioned at the extension transition layer surface；
Quantum well layer, positioned at the N-type epitaxy layer surface；
P-type epitaxial layer, with the quantum well layer surface.
15. semiconductor device structures according to claim 14, it is characterised in that：The semiconductor device structure is also wrapped
Include：
N electrode, positioned at the N-type epitaxy layer surface；
P electrode, positioned at the p-type epi-layer surface.
16. semiconductor device structures according to claim 14, it is characterised in that：The semiconductor device structure is also wrapped
Include：
P electrode, positioned at the p-type epi-layer surface；
N electrode, positioned at the growth substrates away from the nitride buffer layer surface.
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