CN106784025A - A kind of the high frequency silicon Schotty diode structure and preparation method of standard CMOS process manufacture - Google Patents

A kind of the high frequency silicon Schotty diode structure and preparation method of standard CMOS process manufacture Download PDF

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Publication number
CN106784025A
CN106784025A CN201710125150.9A CN201710125150A CN106784025A CN 106784025 A CN106784025 A CN 106784025A CN 201710125150 A CN201710125150 A CN 201710125150A CN 106784025 A CN106784025 A CN 106784025A
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China
Prior art keywords
diode
high frequency
cmos process
standard cmos
silicon schotty
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CN201710125150.9A
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Inventor
李虎
李一虎
熊永忠
邓小东
王勇
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Chengdu Joyou Microchip Technology Co Ltd
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Chengdu Joyou Microchip Technology Co Ltd
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Priority to CN201710125150.9A priority Critical patent/CN106784025A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • H01L29/66143Schottky diodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The invention discloses the high frequency silicon Schotty diode structure and preparation method of a kind of manufacture of standard CMOS process, the present invention includes p-type chip substrate, it is arranged at P+ doped regions and N well regions in p-type chip substrate, it is arranged at the N+ doped regions of N well regions, it is arranged at the oxide layer of p-type chip substrate side, and is arranged at diode anode in oxide layer, diode cathode and underlayer electrode.Silicon Schotty diode of the invention uses anode and cathode interdigital structure, diode series resistance can be effectively reduced, chip back is carried out simultaneously thinning, reduce parasitic capacitance, its high frequency performance is improved, it can be using the CMOS technology processing procedure of existing standard, as long as slightly operation adjustment can be manufactured, on the premise of radio circuit application requirement is met, diode cost can be greatly reduced.

Description

A kind of high frequency silicon Schotty diode structure of standard CMOS process manufacture and making Method
Technical field
The invention belongs to microelectronics technology, and in particular to a kind of high frequency silicon Schotty two of standard CMOS process manufacture Pole pipe structure and preparation method.
Background technology
With the development and the progress of technology of society, microwave-radio technology is increasingly deep into our life production, Such as Internet of Things, high-speed communication etc..In microwave radio circuit engineering, Schottky diode compared to more other diodes due to With more preferable high frequency characteristics, therefore it is used frequently as the detection component of the reception in radio circuit.
Current Schottky diode forms metal-semicroductor barrier and contacts frequently with metal and semiconductor, and in order to reach To quick response speed, the radio frequency loss of radio circuit is reduced, typically all using metal and the N-type with high mobility half Conductor contact for producing schottky diode.Such as Titanium and N-type GaAs contact for producing radio frequency Schottky diode, this be because For GaAs has electron mobility higher than silicon, the smaller Schottky diode of series resistance can be produced, for penetrating The radio frequency loss that frequency circuit brings is smaller, and it is no any problem that this is applied in scientific research or small lot application, but is worked as Radio-frequency technique is more and more ripe, when in high volume being manufactured, would have to consider the cost-performance ratio of component.Although making The Schottky diode made of the semiconductor (such as GaAs, indium phosphide etc.) of III-V high mobility has more preferable high frequency Performance, but relative to wide variety of silicon materials and technique in integrated circuit, its cost is far above and uses silicon materials and silicon work The Schottky diode that skill makes.So if being directed to silicon materials and process characteristic, silicon Xiao that can meet application demand is developed Special based diode is used for the microwave radio circuit produced in enormous quantities, and cost will be greatly reduced, and brings considerable economy Benefit.
The content of the invention
In order to improve above mentioned problem, the invention provides a kind of high frequency silicon Schotty diode of standard CMOS process manufacture Structure and preparation method.The Schottky diode structure and preparation method can directly use present wide variety of standard CMOS Manufacturing process, it is only necessary to somewhat adjust process flow in its manufacturing process, you can meet and require.Designed by device and made Checking, the silicon Schotty diode cut-off frequency made using this structure and technique is more than 200GHz, therefore is entirely capable of meeting Ka Wave band (< 35GHz) radio circuit application below.Because the silicon CMOS technology line of standard, its material and wafer area can be used Advantage in terms of size, silicon Schotty diode cost is substantially reduced.
To achieve these goals, the technical solution adopted by the present invention is as follows:
A kind of high frequency silicon Schotty diode structure of standard CMOS process manufacture, including p-type chip substrate, are arranged at P P+ doped regions and N well regions on cake core substrate, are arranged at the N+ doped regions of N well regions, are arranged at the oxygen of p-type chip substrate side Change layer, and be arranged at diode anode in oxide layer, diode cathode and underlayer electrode.
Further, the diode anode is by metal and N well region directly contacts.
Yet further, the frequency of the high frequency silicon Schotty diode structure is more than 200GHz.
Further, the diode anode and the interdigital setting of diode cathode.
A kind of preparation method of the high frequency silicon Schotty diode structure of standard CMOS process manufacture, comprises the following steps:
(1) B+ ions are injected in p-type chip substrate, P+ doped regions are formed, there is provided underlayer electrode forms Europe with substrate Nurse is contacted;
(2) P+ ions are injected in p-type chip substrate, N well regions are formed;
(3) As+ ions are injected in N well regions, forms N+ doped regions, there is provided ohm formed between metal and diode cathode and is connect Touch;
(4) deposited oxide layer, and chemical wet etching oxide layer, form electrode contact hole;
(5) sputter multiple layer metal, and chemical wet etching metal level, form underlayer electrode, diode cathode, diode sun respectively Pole;
(6) it is thinning, obtain final product product.
Further, thinning is full thinning back side of silicon wafer;Or, in device area thinning back side, final thickness 10 μm~ 700μm。
Yet further, diode anode is by metal and N well region directly contacts.
Further, the cut-off frequency of made high frequency silicon Schotty diode structure is more than 200GHz.
In addition, the diode anode and the interdigital setting of diode cathode.That is diode anode and diode are cloudy Pole uses interdigitated electrode structure.
What deserves to be explained is, the present invention uses anode and cathode interdigital structure, is effectively reduced diode series resistance, overcomes silicon Material and technique make diode series resistance hang-up, while being thinned chip thickness, reduce parasitic capacitance, therefore improve Silicon Schotty diode high frequency performance, reduces radio frequency loss.
The present invention has underlayer electrode, and p-type chip substrate can be made to keep, with potential or reverse bias, reducing silicon with N traps PN junction Schottky diode leakage current.
Depending on the interdigital quantity of diode anode and cathode electrode of the invention and length can be according to design parameters, its spacing becomes Change according to institute's accepted standard CMOS making technology constrained designs.
The present invention compared with prior art, with advantages below and beneficial effect:
(1) the CMOS technology making technology line for using, slightly operation adjustment can meet production, can be greatly reduced and be produced into This.
(2) the Silicon Wafer dimensioned area that the COMS manufacturing process of commercial standard (CS) is produced is big, high-volume manufacture silicon Schotty Diode singulated dies are shared cost equally and are greatly lowered.
(3) present invention uses anode and cathode interdigital and chip thinning structure, improves silicon Schotty diode cut-off frequency.Fig. 8 It is the I-V test curves of the silicon Schotty diode manufactured using 0.35 μm of standard CMOS process, negative and positive number of pole-pairs 10, series electrical Road < 6 Ω, Fig. 9 are the C-V test curves of Schottky diode, electric capacity 0.18pF, therefore the silicon Schotty diode cutoff frequency Rate > 200GHz.
(4) present invention using commercial standard (CS) COMS processing lines manufacture silicon Schotty pipe, device performance stabilization, repeatability, Reliability can be protected.
Brief description of the drawings
Fig. 1 is high frequency silicon Schotty diode planar structure schematic diagram of the present invention.
Fig. 2 is high frequency silicon Schotty diode device cross section structure diagram of the present invention.
Fig. 3 forms P+ doped region schematic diagrames to inject B+ ions in p-type chip substrate in the present invention.
Fig. 4 forms N well region schematic diagrames to inject P+ ions in p-type chip substrate in the present invention.
Fig. 5 forms N+ doped region schematic diagrames to inject As+ ions in N well regions in the present invention.
Fig. 6 is metal electrode contact hole making schematic diagram in the present invention.
Fig. 7 is metal electrode making schematic diagram in the present invention.
Fig. 8 is the I-V characteristic test curve figure of medium-high frequency silicon Schotty diode of the present invention.
Fig. 9 is the C-V characteristic test curve maps of medium-high frequency silicon Schotty diode of the present invention.
Wherein, the corresponding parts title is marked to be in accompanying drawing:1-P cake core substrates, 2-N well regions, 3- diode anodes, 4- diode cathodes, 5- underlayer electrodes, 6-N+ doped regions, 7-P+ doped regions, 8- oxide layers.
Specific embodiment
The invention will be further described with reference to the accompanying drawings and examples, and embodiments of the present invention are included but is not limited to The following example.
Embodiment
As shown in figs. 1 to 6, a kind of high frequency silicon Schotty diode structure of standard CMOS process manufacture, it is characterised in that Including p-type chip substrate 1, P+ doped regions 7 and N well regions 2 in p-type chip substrate are arranged at, are arranged at the N+ doped regions of N well regions 6, the oxide layer 8 of p-type chip substrate side is arranged at, and be arranged at diode anode 3, diode cathode 4 in oxide layer With underlayer electrode 5.Wherein, the diode anode is by metal and N well region directly contacts.High frequency silicon Schotty diode cutoff frequency Rate is more than 200GHz.The diode anode and the interdigital setting of diode cathode.
Silicon Schotty diode of the invention uses anode and cathode interdigital structure, can effectively reduce diode series resistance, together Shi Jinhang chip backs are thinning, reduce parasitic capacitance, improve its high frequency performance, and it can use the CMOS technology of existing standard Processing procedure, as long as slightly operation adjustment can be manufactured, on the premise of radio circuit application requirement is met, can be greatly reduced diode Cost.
In order to the present invention is better described, the preparation method of the high frequency silicon Schotty diode structure is provided below, specifically Step is as follows:
(1) according to standard CMOS process processing procedure, B+ ions are injected in p-type chip substrate, P+ doped regions is formed, as lining Hearth electrode forms the transition region of Ohmic contact with p-type chip substrate, as shown in Figure 3.
(2) according to standard CMOS process processing procedure, P+ ions are injected in p-type chip substrate, forms N well regions, N+ well regions will It is the active area of silicon Schotty diode device, as shown in Figure 4.
(3) according to standard CMOS process processing procedure, As+ ions are injected in N well regions, N+ doped regions is formed, as silicon Schotty The cathode electrode of diode forms the transition region of Ohmic contact with semi-conducting material, as shown in Figure 5.
(4) according to standard CMOS process processing procedure, in the first metal formation process, the oxide layer of boracic phosphorus, and light are deposited Etch electrode contact hole quarter, as shown in Figure 6.
(5) according to standard CMOS process processing procedure, in first layer metal formation process, the sputter multiple layer metal on wafer Film, and chemical wet etching goes out each electrode of silicon Schotty diode, forms diode anode, diode cathode and underlayer electrode, such as Fig. 7 It is shown.
(6) chip thinning, after wafer completes whole operation flow, according to design requirement, thinning back side, core is carried out to chip Piece thickness is thinned to 10 μm~700 μm, can to whole wafer overall reduction, also can only thinning device area, to improve Xiao Te Base high frequency performance, as shown in Figure 2.
As for the second layer metal interconnection in other techniques, the operation such as device purifying protection can successively after (5th) operation Carry out, it is consistent with conventional criteria CMOS technology processing procedure, do not tire out state herein.
The high frequency silicon Schotty diode preparation method only using or have adjusted a little operation in existing standard CMOS i.e. Requirement can be met, therefore with process is simple, Schottky diode reliability, uniformity and repeatability obtained by manufacture can be obtained To guarantee.
According to above-described embodiment, the present invention just can be well realized.What deserves to be explained is, before said structure design Put, to solve same technical problem, even if some made in the present invention are used without substantial change or polishing Technical scheme essence still as the present invention, therefore it should also be as within the scope of the present invention.

Claims (9)

1. the high frequency silicon Schotty diode structure that a kind of standard CMOS process is manufactured, it is characterised in that including p-type chip substrate (1) P+ doped regions (7) and N well regions (2) in p-type chip substrate, are arranged at, the N+ doped regions (6) of N well regions are arranged at, are set In the oxide layer (8) of p-type chip substrate side, and it is arranged at diode anode (3), diode cathode (4) in oxide layer With underlayer electrode (5).
2. the high frequency silicon Schotty diode structure that a kind of standard CMOS process according to claim 1 is manufactured, its feature It is that the diode anode is by metal and N well region directly contacts.
3. the high frequency silicon Schotty diode structure that a kind of standard CMOS process according to claim 1 is manufactured, its feature It is that high frequency silicon Schotty diode cut-off frequency is more than 200GHz.
4. the high frequency silicon Schotty diode structure that a kind of standard CMOS process according to claim 1 is manufactured, its feature It is, the diode anode and the interdigital setting of diode cathode.
5. the preparation method of the high frequency silicon Schotty diode structure of a kind of standard CMOS process manufacture, it is characterised in that including Following steps:
(1) B+ ions are injected in p-type chip substrate, P+ doped regions is formed, there is provided underlayer electrode forms ohm and connects with substrate Touch;
(2) P+ ions are injected in p-type chip substrate, N well regions are formed;
(3) As+ ions are injected in N well regions, forms N+ doped regions, there is provided Ohmic contact is formed between metal and diode cathode;
(4) deposited oxide layer, and chemical wet etching oxide layer, form electrode contact hole;
(5) sputter multiple layer metal, and chemical wet etching metal level, form underlayer electrode, diode cathode, diode anode respectively;
(6) it is thinning, obtain final product product.
6. the making side of the high frequency silicon Schotty diode structure of a kind of standard CMOS process manufacture according to claim 5 Method, it is characterised in that thinning is full thinning back side of silicon wafer;Or, in device area thinning back side, final thickness is in 10 μm~700 μ m。
7. the making side of the high frequency silicon Schotty diode structure of a kind of standard CMOS process manufacture according to claim 5 Method, it is characterised in that diode anode is by metal and N well region directly contacts.
8. the making side of the high frequency silicon Schotty diode structure of a kind of standard CMOS process manufacture according to claim 5 Method, it is characterised in that high frequency silicon Schotty diode cut-off frequency is more than 200GHz.
9. the making side of the high frequency silicon Schotty diode structure of a kind of standard CMOS process manufacture according to claim 5 Method, it is characterised in that the diode anode and the interdigital setting of diode cathode.
CN201710125150.9A 2017-03-03 2017-03-03 A kind of the high frequency silicon Schotty diode structure and preparation method of standard CMOS process manufacture Pending CN106784025A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103258843A (en) * 2013-05-30 2013-08-21 中国电子科技集团公司第十三研究所 Multi-hole substrate for terahertz Schottky diode
TWM511295U (en) * 2015-07-02 2015-11-01 Univ Central Taiwan Sci & Tech Simple operation measurement ruler for measuring pediatric oral ulcer
CN106206694A (en) * 2015-05-06 2016-12-07 北大方正集团有限公司 A kind of power device and preparation method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103258843A (en) * 2013-05-30 2013-08-21 中国电子科技集团公司第十三研究所 Multi-hole substrate for terahertz Schottky diode
CN106206694A (en) * 2015-05-06 2016-12-07 北大方正集团有限公司 A kind of power device and preparation method thereof
TWM511295U (en) * 2015-07-02 2015-11-01 Univ Central Taiwan Sci & Tech Simple operation measurement ruler for measuring pediatric oral ulcer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LI QIANG ET AL: "Design and Fabrication of Schottky Diode with Standard CM OS Process", 《CHINESE JOURNAL OF SEMICONDUCTORS》 *

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