CN106206694A - A kind of power device and preparation method thereof - Google Patents
A kind of power device and preparation method thereof Download PDFInfo
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- CN106206694A CN106206694A CN201510226995.8A CN201510226995A CN106206694A CN 106206694 A CN106206694 A CN 106206694A CN 201510226995 A CN201510226995 A CN 201510226995A CN 106206694 A CN106206694 A CN 106206694A
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- substrate
- power device
- described substrate
- reduction processing
- thinning
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Abstract
The invention discloses a kind of power device and preparation method thereof, during the substrate thinning of the power device of the present invention, edges of substrate is not carried out thinning, so that the thickness of edges of substrate is thicker, improve the intensity of substrate, reduce the fragment rate in technique, eliminating the restriction to substrate minimum thickness, technical scheme is without using support chip simultaneously, and technique is simple, production cost is low, and disclosure satisfy that device performance requirements.
Description
Technical field
The present invention relates to semiconductor chip and manufacture field, be more particularly to a kind of power device and preparation method thereof.
Background technology
For power device, having two particularly important parameters, one is conducting resistance, and another is breakdown voltage, wishes that conducting resistance is the least, and breakdown voltage is the highest more good for application.Power device, in order to bear high voltage, needs to use the thickest low-doped epitaxial layer.By increasing epitaxy layer thickness or reducing the doping content of epitaxial layer, breakdown voltage can be improved, but while do so, improve conducting resistance, be unfavorable for reducing power attenuation during break-over of device.As can be seen here, it is difficult to the two parameter is optimized simultaneously.
Current DC/DC conversion efficiency typically 80%～90% scope, have nearly half power consumption penalty produce on power field device, these a part of reasons lost by device power consumption are that conducting resistance is converted into Joule heat, cause device to heat up.Reducing conducting resistance the most as much as possible, reduce heat dissipation capacity, the resistance to pressure simultaneously not reducing device becomes the technical barrier of power field effect transistor.
One of solution used at present is exactly the substrate of thinning power device, the thickness of the function effective coverage of the device on substrate is generally 5 to 100um, but this thickness has actually only taken up the sub-fraction of whole wafer thickness, the substrate of remaining thickness is intended merely to ensure that substrate has enough intensity during manufacturing, test, encapsulate and transporting.
In prior art, after device Facad structure on substrate completes, need substrate is carried out thinning back side, reach required thickness, some species of power device, also will the most thinning after, continue make structure overleaf, then metal level is made, and then from back side extraction electrode.The manufacture method mainly deficiency of at present conventional power device thin slice has 2 points:
1, after substrate thinning, intensity declines, and during causing processing technology, fragment rate raises, and improves the manufacturing cost of device, limits the minimum thickness of substrate simultaneously, have impact on the performance of device；
2, during processing technology, substrate is placed on support chip, so can increase substrate strength, but increase technology difficulty, also increase device manufacturing cost.
Summary of the invention
(1) to solve the technical problem that
The technical problem to be solved in the present invention be how to realize the substrate thinning to power device while reduce the fragment rate of manufacturing process, eliminate the restriction of substrate minimum thickness and reduce cost of manufacture.
(2) technical scheme
In order to solve above-mentioned technical problem, the invention provides a kind of power device manufacture method, said method comprising the steps of:
S1, in the one side of substrate, make the Facad structure of power device, the another side of described substrate is carried out thinning, and the edge of described substrate another side is not carried out reduction processing；
S2, in described substrate another side thinning area make described power device structure；
S3, excise the non-weakened region of described substrate.
Preferably, in described step S1, before carrying out described reduction processing, cover described Facad structure with resin or photoresist, protect.
Preferably, in described step S1, utilize abrasive wheel that described substrate is carried out reduction processing.
Preferably, in described step S1, after described substrate is carried out reduction processing, carry out etching operation, to eliminate the stress effect owing to grinding the Mechanical wound formed.
Preferably, the mixed liquor utilizing Fluohydric acid. and Strong oxdiative acid carries out described etching operation.
Preferably, before making described structure, remove described resin or photoresist that described Facad structure covers.
Preferably, described Facad structure is positioned at the position of corresponding and described weakened region of one side of described substrate.
Preferably, described substrate is silicon wafer.
Preferably, in described step S3, Sectioning is used to excise the non-weakened region of described substrate.
The invention also discloses a kind of power device, described power device is formed for utilizing said method to make.
(3) beneficial effect
The invention provides a kind of power device and preparation method thereof, the present invention is during the substrate thinning of power device, edges of substrate is not carried out thinning, so that the thickness of edges of substrate is thicker, improve the intensity of substrate, reduce the fragment rate in technique, eliminating the restriction to substrate minimum thickness, technical scheme is without using support chip simultaneously, and technique is simple, production cost is low, and disclosure satisfy that device performance requirements.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, the accompanying drawing used required in embodiment or description of the prior art will be briefly described below, apparently, accompanying drawing in describing below is only some embodiments of the present invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the substrate thinning method flow diagram of power device of the present invention；
Fig. 2 a, 2b are the structural representations of the substrate after step S1 operates in the method utilizing the present invention；
Fig. 2 c is the top view of the substrate after step S1 operates in the method utilizing the present invention；
Fig. 3 is the structural representation of the substrate after step S2 operates in the method utilizing the present invention；
Fig. 4 is the structural representation of the substrate after step S3 operates in the method utilizing the present invention.
Detailed description of the invention
With embodiment, the present invention is described in further detail below in conjunction with the accompanying drawings.Following example are used for illustrating the present invention, but can not be used for limiting the scope of the present invention.
The invention discloses the manufacture method of a kind of power device, as it is shown in figure 1, said method comprising the steps of:
S1, in the one side of substrate 2, make the Facad structure 1 of power device, the another side of described substrate 2 is carried out thinning, and the edge 4 of described substrate 2 another side is not carried out reduction processing, as shown in Fig. 2 a, 2b and 2c；
In this step, before carrying out described reduction processing, cover described Facad structure 1 with resin or photoresist, for described Facad structure 1 is protected；All may be used for protecting the membranoid substance of electronic device to protect can also to use other in addition to using described resin or photoresist；
In this step, utilize but be not limited to use abrasive wheel that described substrate is carried out reduction processing；
In this step, after described substrate 2 is carried out reduction processing, etching operation to be carried out, this is because grinding can cause Mechanical wound, the stress of Mechanical wound is easily caused substrate deformation, utilizes etching operation, the back side of the substrate after grinding is processed, make the back side become coarse, discharge above-mentioned stress, make substrate be not susceptible to deformation.
Preferably, described etching operation utilizes the mixed liquor of Fluohydric acid. and Strong oxdiative acid to corrode, it is also possible to corrode with other solution being suitable for；
S2, in described substrate 2 another side thinning area make described power device structure 3, as shown in Figure 3；
Before making described structure 3, it is preferable that remove described resin or photoresist that described Facad structure 1 covers.
S3, excise the non-weakened region 4 of described substrate, as shown in Figure 4.
Described Facad structure 1 is positioned at the position of the corresponding of the one side of described substrate 2 and described weakened region; so the device of front surface region 1 will not be damaged removing substrate 2 edge when; preferably; the device of described Facad structure 1 and described structure 3, away from the most thinning edge a certain distance of described substrate, is more beneficial for protecting described Facad structure 1 and the device of described structure 3.Described substrate non-weakened region 4 device does not uses.
Preferably, described substrate 2 is silicon wafer, can be other all can be used as the material of substrate 2；The crystal orientation of described silicon wafer, doping type do not limit, and determine according to type of device.
In described step S3, use but be not limited to the non-weakened region 4 using Sectioning to excise described substrate.
The invention also discloses a kind of power device, described power device is formed for utilizing said method to make.
The present invention is directed to after in existing technique, silicon chip substrate is thinning, die strength declines, fragment rate in technical process is caused to raise, improve the manufacturing cost of device, limit the problem that the minimum thickness of silicon chip have impact on the performance of device simultaneously, propose solution, the present invention is without using support chip, technique is simple, production cost is low, thinning by silicon chip edge not being carried out in thinning process, so that silicon chip edge thickness is thicker, improve the intensity of silicon chip, reduce the fragment rate in technique, reduce device manufacturing cost, the most areas of silicon chip is the most thinning simultaneously, meet device performance requirements.
Embodiment of above is merely to illustrate the present invention, rather than limitation of the present invention.Although the present invention being described in detail with reference to embodiment, it will be understood by those within the art that, technical scheme is carried out various combination, amendment or equivalent, without departure from the spirit and scope of technical solution of the present invention, all should contain in the middle of scope of the presently claimed invention.
Claims (10)
1. a power device manufacture method, it is characterised in that said method comprising the steps of:
S1, in the one side of substrate, make the Facad structure of power device, another to described substrate
One side carries out thinning, and the edge of described substrate another side is not carried out reduction processing；
S2, in described substrate another side thinning area make described power device the back side knot
Structure；
S3, excise the non-weakened region of described substrate.
Method the most according to claim 1, it is characterised in that in described step S1,
Before carrying out described reduction processing, cover described Facad structure with resin or photoresist, carry out
Protection.
Method the most according to claim 2, it is characterised in that in described step S1,
Utilize abrasive wheel that described substrate is carried out reduction processing.
Method the most according to claim 3, it is characterised in that in described step S1,
After described substrate is carried out reduction processing, carry out etching operation, to eliminate owing to grinding formation
The stress effect of Mechanical wound.
Method the most according to claim 4, it is characterised in that utilize Fluohydric acid. and strong oxygen
The mixed liquor changing acid carries out described etching operation.
Method the most according to claim 5, it is characterised in that make described structure
Before, described resin or photoresist that described Facad structure covers are removed.
Method the most according to claim 6, it is characterised in that described Facad structure is positioned at
The position of the corresponding and described weakened region of the one side of described substrate.
Method the most according to claim 7, it is characterised in that described substrate is silicon wafer.
Method the most according to claim 8, it is characterised in that in described step S3,
Sectioning is used to excise the non-weakened region of described substrate.
10. a power device, it is characterised in that described power device is for utilizing claim 1
Make to method described in 9 any one and formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510226995.8A CN106206694A (en) | 2015-05-06 | 2015-05-06 | A kind of power device and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510226995.8A CN106206694A (en) | 2015-05-06 | 2015-05-06 | A kind of power device and preparation method thereof |
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| Publication Number | Publication Date |
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| CN106206694A true CN106206694A (en) | 2016-12-07 |
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| CN201510226995.8A Pending CN106206694A (en) | 2015-05-06 | 2015-05-06 | A kind of power device and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106784025A (en) * | 2017-03-03 | 2017-05-31 | 成都中宇微芯科技有限公司 | A kind of the high frequency silicon Schotty diode structure and preparation method of standard CMOS process manufacture |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903633A (en) * | 2011-07-27 | 2013-01-30 | 万国半导体股份有限公司 | Methods for fabricating anode shorted field stop insulated gate bipolar transistor |
| CN104517804A (en) * | 2014-07-29 | 2015-04-15 | 上海华虹宏力半导体制造有限公司 | Ring removing method of Taiko thinning process |
-
2015
- 2015-05-06 CN CN201510226995.8A patent/CN106206694A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903633A (en) * | 2011-07-27 | 2013-01-30 | 万国半导体股份有限公司 | Methods for fabricating anode shorted field stop insulated gate bipolar transistor |
| CN104517804A (en) * | 2014-07-29 | 2015-04-15 | 上海华虹宏力半导体制造有限公司 | Ring removing method of Taiko thinning process |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106784025A (en) * | 2017-03-03 | 2017-05-31 | 成都中宇微芯科技有限公司 | A kind of the high frequency silicon Schotty diode structure and preparation method of standard CMOS process manufacture |
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Application publication date: 20161207 |
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