CN106783852B - It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current - Google Patents

It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current Download PDF

Info

Publication number
CN106783852B
CN106783852B CN201710012602.2A CN201710012602A CN106783852B CN 106783852 B CN106783852 B CN 106783852B CN 201710012602 A CN201710012602 A CN 201710012602A CN 106783852 B CN106783852 B CN 106783852B
Authority
CN
China
Prior art keywords
current mirror
oxide
metal
channel
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710012602.2A
Other languages
Chinese (zh)
Other versions
CN106783852A (en
Inventor
刘珍利
周盛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CRM ICBG Wuxi Co Ltd
Original Assignee
China Resources Semiconductor Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Resources Semiconductor Shenzhen Co Ltd filed Critical China Resources Semiconductor Shenzhen Co Ltd
Priority to CN201710012602.2A priority Critical patent/CN106783852B/en
Publication of CN106783852A publication Critical patent/CN106783852A/en
Application granted granted Critical
Publication of CN106783852B publication Critical patent/CN106783852B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

Abstract

The present invention discloses a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, including current mirror amplifying circuit and inhibition current mirror electric leakage current circuit.The present invention further discloses a kind of ambient light sensor circuits of electric leakage current circuit containing above-mentioned inhibition current mirror.The present invention inhibits current mirror electric leakage current circuit by setting, other accesses are provided for the first order current mirror leakage current and second level current mirror leakage current of current mirror amplifying circuit, the first order current mirror leakage current and second level current mirror leakage current for making current mirror amplifying circuit will not be into the input terminals of the third level current mirror of current mirror amplifying circuit, to will not be amplified and be exported by third level current mirror.Thus it is guaranteed that the low-noise factor of current mirror amplifying circuit, so that circuit mirror amplifying circuit is adapted to higher requirement.

Description

It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current
Technical field
The present invention relates to technical field of integrated circuits.More particularly, to a kind of for inhibiting current mirror leakage current CMOS integrated circuit.
Background technique
Ambient light sensor (ALS) can perceive ambient light situation, and inform processing chip automatic adjustment display back Brightness reduces the power consumption of product.Ambient light sensor includes the photoelectric tube and multistage current amplifier for detecting environment light, works as light Environment light is converted into photoelectric current by fulgurite, and multistage current mirror amplifier after photoelectric current amplification to exporting, to realize that light-electricity turns It changes.In actual life, require to use in television set, computer monitor, infrared camera, mobile phone, digital camera, intelligent switch etc. To ambient light sensor.
Traditional current mirror amplifier can also amplify previous stage electric current while amplifying the photoelectric current that photoelectric tube is converted into The leakage current of mirror, the current mirror leakage current of every level-one can all be amplified by rear class current mirror, and the leakage current after multistage amplification is cumulative is not It can ignore.For example, the photoelectric current of photoelectric tube conversion is very faint when the ambient light illumination for needing to detect is very faint, The leakage current signal of effective current signal magnitude and output by current mirror amplifier amplification output being amplified is very nearly the same, It is even smaller than leakage current.In this way, ambient light sensor under faint illumination may output error as a result, influence environment light The use of sensor.
Traditional ambient light sensor is as shown in Figure 1, include photoelectric conversion circuit and current mirror amplifying circuit.Environment light passes Sensor includes photoelectric tube D0, D1, PMOS tube P0, P1, P2, P3, P4, P5 and NMOS tube N0, N1, wherein the electrical connection of the end PMOS tube S Identical high potential, the end PMOS tube B are electrically connected identical high potential VDD, and the end NMOS tube S is electrically connected identical low potential GND, The end NMOS tube B is electrically connected low potential GND.P0 and P1 is a pair of of current mirror, and (W/L)P0/(W/L)P1=1;P2 and P3 is a pair of Current mirror, and K1=(W/L)P3/(W/L)P2;P4 and P5 is a pair of of current mirror, and K3=(W/L)P5/(W/L)P4;N0 and N1 is one To current mirror, and K2=(W/L)N1/(W/L)N0;D0 with D1 area is identical, and D0 is firmly opaque with metal covering, does not have above D1 The veils such as metal can be with light transmission.The anode electrical connection low potential GND of D0, D0 cathode are electrically connected the end D of P0, and the end G of P0 is electrically connected The end D of P0, the end G of the end the G electrical connection P0 of P1 are connect, the end D of P1 is electrically connected the cathode of D1, and the anode of D1 is electrically connected low potential GND, The end G and the end D of P2 is shorted and is electrically connected the cathode of D1, the end G of the end the G electrical connection P2 of P3, the end D of the end the D electrical connection N0 of P3, N0 The end D and the end G of N0 be shorted, be electrically connected the end G of N1, the end D and the end G of the end the D electrical connection P4 of N1, the G of the end the G electrical connection P4 of P5 The end D at end, P5 is electrically connected output port Iout
When ambient light sensor works, under conditions of having illumination, illumination is converted into photoelectric current I by D10, by multistage electricity Flow the photoelectric current I of mirror amplificationlight=K1*K2*K3*I0.The noise current I of D1 itselfdark1By the noise current I of D0dark0It supports Disappear, Idark0=Idark1, P0 with P1 size is identical.Metal-oxide-semiconductor itself has the electric leakage to low potential GND or high potential VDD, and It can be amplified by current mirror by the leakage current of metal-oxide-semiconductor channel, the amplification of the leakage current of prime adds up again finally from output end and is put Big photoelectric current exports together.The multiple that wherein the current mirror electric leakage of the first order is amplified is maximum, and the leakage current that output is total Main source, the current mirror of rear class also have electric leakage is still more much smaller than the electric leakage of first order current mirror can ignore.It is flowed from the end P2 Leakage current out is ILP2, the leakage current flowed out from the end P3 is ILP3, the leakage current of first order current mirror is (K1*ILP2+ILP3) quilt It from the noise current that the end D of P5 exports is I after the amplification of multistage current mirrorleak≈K2*K3*(K1*ILP2+ILP3), total electricity of output Flow Iout=Ileak+Ilight.Under faint illumination, I0It is extremely faint, usually pA grades (10-12A), then output end IleakWith IlightIt compares, the two approximation or IleakIt is bigger, then the I exportedoutDeviation is serious, leads to optical sensor cisco unity malfunction.
Accordingly, it is desirable to provide a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current.
Summary of the invention
It is an object of the present invention to provide a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current.
In order to achieve the above objectives, the present invention adopts the following technical solutions:
It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, comprising:
Current mirror amplifying circuit, including N number of current mirror pair, each current mirror is to including input side metal-oxide-semiconductor and outlet side MOS The grid of pipe, two metal-oxide-semiconductors is connected and is connect with the drain electrode of input side metal-oxide-semiconductor;Drain electrode of first current mirror to input side metal-oxide-semiconductor Input terminal as current mirror amplifying circuit;N current mirror is to the drain electrode of outlet side metal-oxide-semiconductor as the defeated of current mirror amplifying circuit Outlet;And
Inhibit current mirror electric leakage current circuit, there is circuit structure identical with current mirror amplifying circuit, the first current mirror The drain electrode of input side metal-oxide-semiconductor is connect with grid;Drain electrode and current mirror amplifying circuit of its N current mirror to outlet side metal-oxide-semiconductor N current mirror connects the drain electrode of input side metal-oxide-semiconductor;
Wherein, N is natural number and N >=2.
Preferably, N number of current mirror centering channel type be the first channel metal-oxide-semiconductor current mirror to and channel type be second For the metal-oxide-semiconductor current mirror of channel to being arranged alternately, the first channel is opposite with the conduction type of the second channel.
Preferably, the metal-oxide-semiconductor of the first channel is P-channel metal-oxide-semiconductor, and the metal-oxide-semiconductor of the second channel is N-channel MOS pipe;Or first The metal-oxide-semiconductor of channel is N-channel MOS pipe, and the metal-oxide-semiconductor of the second channel is P-channel metal-oxide-semiconductor.
Preferably, current mirror amplifying circuit include the first current mirror for being sequentially connected electrically to, the second current mirror to and third Current mirror pair, the first current mirror is to two metal-oxide-semiconductors for including channel type being the first channel, and the second current mirror is to including channel-like Type is two metal-oxide-semiconductors of the second channel, and third current mirror is to two metal-oxide-semiconductors for including channel type being the first channel;Inhibit electricity Stream mirror electric leakage current circuit include the 4th current mirror that is sequentially connected electrically to, the 5th current mirror to and the 6th current mirror pair, the 4th electricity Mirror is flowed to two metal-oxide-semiconductors for including channel type being the first channel, and the 5th current mirror is the second channel to including channel type Two metal-oxide-semiconductors, the 6th current mirror is to two metal-oxide-semiconductors for including channel type being the first channel.
Each current mirror is to including the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grid of the first metal-oxide-semiconductor and the second metal-oxide-semiconductor grid phase The input that the drain electrode of the first metal-oxide-semiconductor of Lian Bingyu is connected as corresponding current mirror pair;The drain electrode of second metal-oxide-semiconductor is as corresponding current mirror pair Output;The source electrode of the source electrode of first metal-oxide-semiconductor and the second metal-oxide-semiconductor is connected and connects high potential or low electricity according to channel type selection Position;
The input terminal of first current mirror pair is connected with photoelectric conversion circuit output end, and output end is defeated with the second current mirror pair Enter end to be connected;The input terminal of third current mirror pair is connected with the output end of the second current mirror pair, and output end is CMOS integrated circuit Output end;The input terminal of 4th current mirror pair is hanging, and output end is connected with the input terminal of the 5th current mirror pair;6th current mirror Pair input terminal be connected with the output end of the 5th current mirror pair, output end is connected with the input terminal of third current mirror pair.
It is further preferred that the second channel is N-channel, and first, third, the 4th and the 6th are electric when the first channel is P-channel The source electrode of the first metal-oxide-semiconductor and the source electrode of the second metal-oxide-semiconductor for flowing mirror pair are connected and connect high level, second and the 5th current mirror pair the The source electrode of the source electrode of one metal-oxide-semiconductor and the second metal-oxide-semiconductor is connected and connects low level;
When the first channel be N-channel, the second channel be P-channel, first, third, the 4th and the 6th current mirror pair first The source electrode of the source electrode of metal-oxide-semiconductor and the second metal-oxide-semiconductor is connected and connects low level, second and the 5th current mirror pair the first metal-oxide-semiconductor source Pole is connected with the source electrode of the second metal-oxide-semiconductor and connects high level.
Preferably, the first current mirror is to for first order Current amplifier;Second current mirror is to for second level Current amplifier; Third current mirror is to for third level Current amplifier.
Preferably, the 4th current mirror is to for first order drain current suppressing;5th current mirror is to for second level leakage current Inhibit;6th current mirror is to for third level drain current suppressing.
It is another object of the present invention to provide a kind of ambient light sensor including above-mentioned CMOS integrated circuit, the biographies Sensor further includes by the 7th current mirror to, the photoelectric conversion circuit that forms of photoelectric tube and hidden pipe;
7th current mirror is to the first metal-oxide-semiconductor and the second metal-oxide-semiconductor for including channel type being the first channel, the 7th current mirror pair The grid of first metal-oxide-semiconductor and the 7th current mirror are connected to the second metal-oxide-semiconductor grid and with the 7th current mirror to the first metal-oxide-semiconductor drain electrode phase Lian Bingjing photoelectric tube connects high level/low level;7th current mirror is to the drain electrode of the second metal-oxide-semiconductor as the defeated of photoelectric conversion circuit Connect high level/low level out and through hidden pipe;7th current mirror is to the source electrode of the first metal-oxide-semiconductor and the 7th current mirror to the 2nd MOS The source electrode of pipe is connected and connects high potential or low potential according to channel type selection.
Preferably, photoelectric tube is for converting optical signals into current signal;Hidden pipe is used to offset the dark current of photoelectric tube.
Preferably, when the first channel is P-channel, the second channel is N-channel, the source of the first metal-oxide-semiconductor of the 7th current mirror pair Pole is connected with the source electrode of the second metal-oxide-semiconductor and connects high level, and the anode of photoelectric tube and hidden pipe connects low level;
When the first channel is N-channel, the second channel is P-channel, the source electrode and second of the first metal-oxide-semiconductor of the 7th current mirror pair The source electrode of metal-oxide-semiconductor is connected and connects low level, and the cathode of photoelectric tube and hidden pipe connects high level.
Beneficial effects of the present invention are as follows:
The present invention inhibits current mirror electric leakage current circuit by setting, is that the first order current mirror of current mirror amplifying circuit leaks electricity Stream and second level current mirror leakage current provide other accesses, make the first order current mirror leakage current and the of current mirror amplifying circuit Secondary current mirror leakage current will not enter the input terminal of the third level current mirror of current mirror amplifying circuit, thus will not be by the third level Current mirror amplifies and exports.Thus it is guaranteed that the low-noise factor of current mirror amplifying circuit, so that circuit mirror amplifying circuit can be with Adapt to higher requirement.
Detailed description of the invention
Specific embodiments of the present invention will be described in further detail with reference to the accompanying drawing.
Fig. 1 shows existing ambient light sensor circuit diagram.
Fig. 2 shows the ambient light sensing circuit diagrams that can inhibit leakage current in embodiment 1.
Fig. 3 shows the ambient light sensing circuit diagram that can inhibit leakage current in embodiment 2.
Specific embodiment
In order to illustrate more clearly of the present invention, the present invention is done further below with reference to preferred embodiments and drawings It is bright.Similar component is indicated in attached drawing with identical appended drawing reference.It will be appreciated by those skilled in the art that institute is specific below The content of description is illustrative and be not restrictive, and should not be limited the scope of the invention with this.
The present invention provides a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, comprising: current mirror amplifying circuit With inhibition current mirror electric leakage current circuit.Wherein, current mirroring circuit includes PMOS current mirror and NMOS current mirror, inhibits current mirror leakage Current circuit includes PMOS current mirror and NMOS current mirror.Current mirror electric leakage current circuit first order current mirror and current mirror is inhibited to put Big circuit first order current mirror type is identical, i.e., is all PMOS current mirror or is all NMOS current mirror.Inhibit current mirror electric leakage Current circuit second level current mirror is identical with current mirror amplifying circuit second level current mirror.Inhibit the current mirror electric leakage current circuit third level Current mirror is identical with current mirror amplifying circuit third level current mirror.The input terminal of current mirror amplifying circuit is current mirror amplifying circuit The input terminal of first order current mirror, the output end of current mirror amplifying circuit are the defeated of the third level current mirror of current mirror amplifying circuit Outlet inhibits input terminal, that is, first order current mirror input terminal of current mirror electric leakage current circuit hanging.Inhibit current mirror electric leakage galvanic electricity The output end on road is the third level current mirror outputs for inhibiting current mirror electric leakage current circuit, inhibits the of current mirror electric leakage current circuit Tertiary current mirror output end is connected with the second level current mirror outputs of current mirror amplifying circuit, and with current mirror amplifying circuit Third current mirror input terminal connection.
It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, including current mirror amplifying circuit and inhibit current mirror Amplifying circuit.Wherein, current mirror amplifying circuit includes N number of current mirror pair, and each current mirror is to including input side metal-oxide-semiconductor and output The grid of side metal-oxide-semiconductor, two metal-oxide-semiconductors is connected and is connect with the drain electrode of input side metal-oxide-semiconductor;First current mirror is to input side metal-oxide-semiconductor Input terminal of the drain electrode as current mirror amplifying circuit;N current mirror amplifies electricity as current mirror to the drain electrode of outlet side metal-oxide-semiconductor The output end on road.Inhibit current mirror electric leakage current circuit that there is circuit structure identical with current mirror amplifying circuit, the first electric current Mirror connect the drain electrode of input side metal-oxide-semiconductor with grid;Its N current mirror amplifies electricity to the drain electrode of outlet side metal-oxide-semiconductor and current mirror Road N current mirror connects the drain electrode of input side metal-oxide-semiconductor;Wherein, N is natural number and N >=2.
In the present invention, N number of current mirror centering channel type be the first channel metal-oxide-semiconductor current mirror to and channel type be For the metal-oxide-semiconductor current mirror of two channels to being arranged alternately, the first channel is opposite with the conduction type of the second channel.The MOS of first channel Pipe is P-channel metal-oxide-semiconductor, and the metal-oxide-semiconductor of the second channel is N-channel MOS pipe;Or first channel metal-oxide-semiconductor be N-channel MOS pipe, second The metal-oxide-semiconductor of channel is P-channel metal-oxide-semiconductor.
Specifically, the present invention provides a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, including current mirror to put Big circuit and current mirror is inhibited to leak electricity current circuit, wherein current mirror amplifying circuit include the first current mirror for being sequentially connected electrically to, Second current mirror to and third current mirror pair, the first current mirror to include channel type be the first channel two metal-oxide-semiconductors, second Current mirror is the first channel to including channel type including channel type to two metal-oxide-semiconductors for being the second channel, third current mirror Two metal-oxide-semiconductors;Inhibit current mirror electric leakage current circuit include the 4th current mirror that is sequentially connected electrically to, the 5th current mirror to and the Six current mirrors pair, the 4th current mirror is to two metal-oxide-semiconductors for including channel type being the first channel, and the 5th current mirror is to including channel Type is two metal-oxide-semiconductors of the second channel, and the 6th current mirror is to two metal-oxide-semiconductors for including channel type being the first channel;Each electricity Flow mirror to including the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grid of the first metal-oxide-semiconductor and the second metal-oxide-semiconductor grid are connected and with first The input that metal-oxide-semiconductor drain electrode is connected as corresponding current mirror pair;Output of the drain electrode of second metal-oxide-semiconductor as corresponding current mirror pair;The The source electrode of the source electrode of one metal-oxide-semiconductor and the second metal-oxide-semiconductor is connected and connects high potential or low potential according to channel type selection;First electric current The input terminal of mirror pair is connected with photoelectric conversion circuit output end, and output end is connected with the input terminal of the second current mirror pair;Third electricity The input terminal of stream mirror pair is connected with the output end of the second current mirror pair, and output end is the output end of CMOS integrated circuit;4th electricity The input terminal for flowing mirror pair is hanging, and output end is connected with the input terminal of the 5th current mirror pair;The input terminal of 6th current mirror pair and The output end of five current mirrors pair is connected, and output end is connected with the input terminal of third current mirror pair.
Embodiment 1
As shown in Fig. 2, the first channel is P-channel in the present embodiment, the second channel is N-channel.
The cmos circuit provided in this embodiment for inhibiting current mirror leakage current includes photoelectric conversion circuit a, current mirror amplification Circuit b and inhibition current mirror electric leakage current circuit c.
Photoelectric conversion circuit a includes photoelectric tube D0, photoelectric tube D1, PMOS tube P0, P1, the anode electrical connection low potential of D0 The end D of the cathode electrical connection P0 of GND, D0, the end D of the end the G electrical connection P0 of P0, the end G of the end the G electrical connection P0 of P1, the end the D electricity of P1 Connect the cathode of D1.D0 with D1 area is identical, and the shielding layers such as D0 metal cover opaque, does not have shielding layer can be with above D1 Light transmission, P0 and P1 are a pair of of current mirror, (W/L)P0/(W/L)P1=1.
Current mirror amplifying circuit b includes PMOS tube P2, P3, P4, P5 and NMOS tube N0, N1, all end PMOS tube S electricity Identical high potential VDD is connected, all ends PMOS tube B are electrically connected identical high potential VDD, and all ends NMOS tube S are electrically connected Low potential GND is met, all ends NMOS tube B are electrically connected low potential GND.P0 and P1 is a pair of of current mirror, (W/L)P0/(W/L)P1 =1, P2 and P3 are a pair of of current mirror, K1=(W/L)P3/(W/L)P2, P4 and P5 are a pair of of current mirror, K3=(W/L)P5/(W/ L)P4, N0 and N1 are a pair of of current mirror K2=(W/L)N1/(W/L)N0, the end G and the end D of P2 is shorted and is electrically connected the cathode of D1, P3 The end G electrical connection P2 the end G, the end G at the end D of the end the D electrical connection N0 of P3, the end D of N0 and N0 is shorted, and the end G of N1 is electrically connected N0 The end G, the end D and the end G of the end the D electrical connection P4 of N1, the end G of the end the G electrical connection P4 of P5, the end D of P5 is electrically connected output port Iout
Inhibiting current mirror electric leakage current circuit c includes PMOS tube P2c, P3c, P4c and P5c, NMOS tube N0c and N1c.All The end PMOS tube S is electrically connected high potential VDD, and all ends PMOS tube B are electrically connected high potential VDD, all end NMOS tube S electrical connections Low potential GND, all ends NMOS tube B are electrically connected low potential GND.The end G of P2c is electrically connected the end D of P2c and the end G of P3c and hangs Sky, the end D and the end G of the end the D electrical connection N0c of P3c, the end G of the end the G electrical connection N0c of N1c, the end D of the end the D electrical connection P4c of N1c With the end G, the end G of the end the G electrical connection P4c of P5c, the end D of the end the D electrical connection N1 of P5c.P2c and P3c is a pair of of current mirror K1= (W/L)P3c/(W/L)P2c, wide length is identical with P2, P3.N0c and N1c is a pair of of current mirror, K2c=(W/L)N1c/(W/L)N0c, wide Length is identical with N0, N1.P5c and P4c is a pair of of current mirror K3c=(W/L)P5c/(W/L)P4c, wide length is identical with P4, P5.
In the present embodiment, the first metal-oxide-semiconductor of the first current mirror pair is P2, and the second metal-oxide-semiconductor of the first current mirror pair is P3;The First metal-oxide-semiconductor of two current mirrors pair is N0, and the second metal-oxide-semiconductor of the second current mirror pair is N1;First metal-oxide-semiconductor of third current mirror pair For P4, the second metal-oxide-semiconductor of third current mirror pair is P5;First metal-oxide-semiconductor of the 4th current mirror pair is P2c, the 4th current mirror pair Second metal-oxide-semiconductor is P3c;First metal-oxide-semiconductor of the 5th current mirror pair is N0c, and the second metal-oxide-semiconductor of the 5th current mirror pair is N1c;6th First metal-oxide-semiconductor of current mirror pair is P4c, and the second metal-oxide-semiconductor of the 6th current mirror pair is P5c;First metal-oxide-semiconductor of the 7th current mirror pair For P0, the second metal-oxide-semiconductor of the 7th current mirror pair is P1.D1 is photoelectric tube, and D2 is hidden pipe.
It is provided in this embodiment to be used to inhibit the CMOS integrated circuit operation principle of current mirror leakage current as follows: the face D0 and D1 Product is identical, the leakage current I that D1 is generateddark1The leakage current I generated with D0dark0Equal, P0 with P1 size is identical.It fixes at some Illumination condition under, illumination is converted into photoelectric current I by D10.Flow through the electric current I at the end D of P3P3Include two parts electric current: a part It is the leakage current I of current mirror itselfLM1=K1*ILP2+ILP3, another part is photoelectric current I0.So the electricity flowed out from the end D of P3 Flow IM1=K1*I0+(K1*ILP2+ILP3), wherein ILP3It is the leakage current of P3 itself, the electric current for flowing through the end D of N1 is IM2=K2* (IM1+ILN0)+ILN1, wherein ILN0It is the leakage current of N0 itself, ILN1It is the leakage current of N1 itself.The leakage then flowed out from the end D of N1 Electric current ILM2=K1*K2*ILP2+K2*(ILP3+ILN0)+ILN1.Inhibit current mirror electric leakage current circuit c analog current mirror amplifying circuit b Leakage current generation mechanism, circuit structure is identical, and current mirror ratio is identical so that from the end D of P5c flow out prime add itself leak Electric current ILM2c=ILM2It is equal, then ILM2May not flow into P4 will not be amplified into output port.The electric current I of final outputout= K1*K2*K3*I0+K3*ILP4+ILP5, (ILP4It is the leakage current of P4 itself, ILP5It is the leakage current of P5 itself) wherein Ilight=K1* K2*K3*I0, Ileak=K3*ILP4+ILP5, IlightCompare IleakIt is much bigger.The result of flow verifying is as follows: amplification factor K1*K2*K3 The test result of=100000 circuit structure is shown, under faint illumination condition, the I of output end outputlightIt is uA (10- 6A) rank, the circuit I of Traditional photovoltaic ambient light sensor in Fig. 1leakAlso in uA (10-6A) rank, IlightAnd IleakIt is close.And For inhibiting the I of the CMOS integrated circuit of current mirror leakage current in Fig. 2leakIt is nA (10-9A) rank, the total current I of outputoutIt is uA(10-6A) grade, IlightIt is IleakHundred times or more, IleakCan ignore, leakage current no longer influence output electric current as a result, Ambient light sensor can work normally in the very weak place of illumination.
Embodiment 2
As shown in figure 3, the first channel is N-channel in the present embodiment, the second channel is P-channel.
It should be noted that current mirror amplifying circuit series should not be limited to three-level in the present invention, equally, inhibit current mirror Leaking electricity current circuit should be corresponding with current mirror amplifying circuit series.
Obviously, the above embodiment of the present invention be only to clearly illustrate example of the present invention, and not be pair The restriction of embodiments of the present invention may be used also on the basis of the above description for those of ordinary skill in the art To make other variations or changes in different ways, all embodiments can not be exhaustive here, it is all to belong to this hair The obvious changes or variations that bright technical solution is extended out are still in the scope of protection of the present invention.

Claims (9)

1. a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current, which is characterized in that the CMOS integrated circuit includes:
Current mirror amplifying circuit include the first current mirror for being sequentially connected electrically to, the second current mirror to and third current mirror pair, institute The first current mirror is stated to two metal-oxide-semiconductors for including channel type being the first channel, second current mirror is to including channel type For two metal-oxide-semiconductors of the second channel, the third current mirror to including two metal-oxide-semiconductors that channel type is the first channel,
Inhibit current mirror electric leakage current circuit include the 4th current mirror that is sequentially connected electrically to, the 5th current mirror to and the 6th current mirror Right, the 4th current mirror is to two metal-oxide-semiconductors for including channel type being the first channel, and the 5th current mirror is to including channel Type be the second channel two metal-oxide-semiconductors, the 6th current mirror to include channel type be the first channel two metal-oxide-semiconductors,
The current mirror of described first, second, third, fourth, the 5th and the 6th to include the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, it is described The grid of first metal-oxide-semiconductor and the second metal-oxide-semiconductor grid are connected and are connected with the drain electrode of the first metal-oxide-semiconductor as the defeated of corresponding current mirror pair Enter;Output of the drain electrode of second metal-oxide-semiconductor as corresponding current mirror pair;The source electrode of the source electrode of first metal-oxide-semiconductor and the second metal-oxide-semiconductor is connected And high potential or low potential are connect according to channel type selection,
The input terminal of first current mirror pair is connected with photoelectric conversion circuit output end, and output end is defeated with the second current mirror pair Enter end to be connected;The input terminal of the third current mirror pair is connected with the output end of the second current mirror pair, and output end is the CMOS The output end of integrated circuit;The input terminal of 4th current mirror pair is hanging, the input terminal phase of output end and the 5th current mirror pair Even;The input terminal of 6th current mirror pair is connected with the output end of the 5th current mirror pair, output end and third current mirror pair Input terminal is connected.
2. CMOS integrated circuit according to claim 1, which is characterized in that described first, second, third, fourth, the 5th And the 6th current mirror centering channel type be the first channel metal-oxide-semiconductor current mirror to and channel type be the second channel metal-oxide-semiconductor For current mirror to being arranged alternately, the first channel is opposite with the conduction type of the second channel.
3. CMOS integrated circuit according to claim 2, which is characterized in that
The metal-oxide-semiconductor of first channel is P-channel metal-oxide-semiconductor, and the metal-oxide-semiconductor of the second channel is N-channel MOS pipe;Or
The metal-oxide-semiconductor of first channel is N-channel MOS pipe, and the metal-oxide-semiconductor of the second channel is P-channel metal-oxide-semiconductor.
4. CMOS integrated circuit according to claim 1, which is characterized in that
When the first channel be P-channel, the second channel be N-channel, first, third, the 4th and the 6th current mirror pair the first metal-oxide-semiconductor Source electrode and the source electrode of the second metal-oxide-semiconductor be connected and connect high level, second and the 5th current mirror pair the first metal-oxide-semiconductor source electrode and The source electrode of two metal-oxide-semiconductors is connected and connects low level;
When the first channel be N-channel, the second channel be P-channel, first, third, the 4th and the 6th current mirror pair the first metal-oxide-semiconductor Source electrode and the source electrode of the second metal-oxide-semiconductor be connected and connect low level, second and the 5th current mirror pair the first metal-oxide-semiconductor source electrode and The source electrode of two metal-oxide-semiconductors is connected and connects high level.
5. CMOS integrated circuit according to claim 1, which is characterized in that first current mirror is to for first order electricity It banishes big;Second current mirror is to for second level Current amplifier;Third current mirror is to for third level Current amplifier.
6. CMOS integrated circuit according to claim 1, which is characterized in that the 4th current mirror is leaked to for the first order Electric current inhibits;5th current mirror is to for second level drain current suppressing;6th current mirror is to for third level drain current suppressing.
7. including the ambient light sensor of CMOS integrated circuit of any of claims 1-6, which is characterized in that described Sensor further includes by the 7th current mirror to, the photoelectric conversion circuit that forms of photoelectric tube and hidden pipe;
7th current mirror is to the first metal-oxide-semiconductor and the second metal-oxide-semiconductor for including channel type being the first channel, the 7th current mirror pair The grid of first metal-oxide-semiconductor and the 7th current mirror are connected to the second metal-oxide-semiconductor grid and with the 7th current mirror to the first metal-oxide-semiconductor drain electrode phase Lian Bingjing photoelectric tube connects high level/low level;7th current mirror is to the drain electrode of the second metal-oxide-semiconductor as the defeated of photoelectric conversion circuit Connect high level/low level out and through hidden pipe;7th current mirror is to the source electrode of the first metal-oxide-semiconductor and the 7th current mirror to the 2nd MOS The source electrode of pipe is connected and connects high potential or low potential according to channel type selection.
8. ambient light sensor according to claim 7, which is characterized in that the photoelectric tube is for converting optical signals into Current signal;The hidden pipe is used to offset the dark current of photoelectric tube.
9. ambient light sensor according to claim 7, which is characterized in that
When the first channel is P-channel, the second channel is N-channel, the source electrode and the 2nd MOS of the first metal-oxide-semiconductor of the 7th current mirror pair The source electrode of pipe is connected and connects high level, and the anode of photoelectric tube and hidden pipe connects low level;
When the first channel is N-channel, the second channel is P-channel, the source electrode and the 2nd MOS of the first metal-oxide-semiconductor of the 7th current mirror pair The source electrode of pipe is connected and connects low level, and the cathode of photoelectric tube and hidden pipe connects high level.
CN201710012602.2A 2017-01-09 2017-01-09 It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current Active CN106783852B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710012602.2A CN106783852B (en) 2017-01-09 2017-01-09 It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710012602.2A CN106783852B (en) 2017-01-09 2017-01-09 It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current

Publications (2)

Publication Number Publication Date
CN106783852A CN106783852A (en) 2017-05-31
CN106783852B true CN106783852B (en) 2019-04-26

Family

ID=58950396

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710012602.2A Active CN106783852B (en) 2017-01-09 2017-01-09 It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current

Country Status (1)

Country Link
CN (1) CN106783852B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109951185A (en) * 2019-04-11 2019-06-28 王开 High performance linear photoisolator

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101169834A (en) * 2006-10-27 2008-04-30 株式会社东芝 Generating device of trigger signal
CN201561800U (en) * 2009-11-23 2010-08-25 比亚迪股份有限公司 Ambient light detector
CN102322875A (en) * 2011-08-01 2012-01-18 西安电子科技大学 Visible light sensor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7424266B2 (en) * 2004-11-09 2008-09-09 Kabushiki Kaisha Toshiba Rectifier circuit and RFID tag
CN206558503U (en) * 2017-01-09 2017-10-13 华润半导体(深圳)有限公司 A kind of CMOS integrated circuits, ambient light sensor for being used to suppress current mirror leakage current

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101169834A (en) * 2006-10-27 2008-04-30 株式会社东芝 Generating device of trigger signal
CN201561800U (en) * 2009-11-23 2010-08-25 比亚迪股份有限公司 Ambient light detector
CN102322875A (en) * 2011-08-01 2012-01-18 西安电子科技大学 Visible light sensor

Also Published As

Publication number Publication date
CN106783852A (en) 2017-05-31

Similar Documents

Publication Publication Date Title
CN206922420U (en) A kind of over-and under-voltage protection circuit
CN106052857B (en) A kind of photoelectric detective circuit with temperature compensation function
CN102739235B (en) Switching value acquisition insulating circuit
CN106783852B (en) It is a kind of for inhibiting the CMOS integrated circuit of current mirror leakage current
CN114567837B (en) Sensor microphone output protection circuit and sensor microphone
CN102185647B (en) Photo current monitoring device
CN201860305U (en) Overvoltage protection circuit for USB (universal serial bus) analogue switch under power up and power down conditions
CN204498098U (en) output circuit, detecting sensor
CN206558503U (en) A kind of CMOS integrated circuits, ambient light sensor for being used to suppress current mirror leakage current
CN109448621A (en) A kind of driving circuit and display device
CN107980208A (en) Signaling conversion circuit, heart rate sensor and electronic equipment
CN103217615A (en) Output short-circuit detection circuit
CN106781424A (en) Infrared receiving circuit
CN107018597B (en) The sustainable isocandela illumination integral control circuits of LED
CN209132405U (en) Switching-on and switching-off state detection circuit
JPWO2019208027A1 (en) Arc detection circuit, breaker, power conditioner, solar panel, solar panel accessory module and junction box
CN216927045U (en) Detection circuit and polarity discrimination device
CN103162821B (en) Photodetector circuit and detecting method thereof
CN109039071A (en) A kind of switching-on and switching-off state detection circuit
CN101860999A (en) Circuit for preventing reverse connection of power supply, LED lamp circuit and LED lamp
CN202026306U (en) Photoelectric current monitoring circuit
CN104283543B (en) A kind of correlation photoelectric detection switch
KR101272096B1 (en) Smart junction box for malfunction detection of photovoltaic module
CN101858784B (en) Photodetector circuit and electronic device
US20200127603A1 (en) Solar energy detection module and solar panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210428

Address after: No.180-6, Linghu Avenue, Taihu International Science and Technology Park, Xinwu District, Wuxi City, Jiangsu Province, 214135

Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd

Address before: 518040 Guangdong city in Shenzhen Province, Futian District Shennan Road, Che Kung Temple Tian An Digital City Tienhsiang building 8A

Patentee before: CHINA RESOURCES SEMICONDUCTOR (SHENZHEN) Co.,Ltd.