CN106783594A - The preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna - Google Patents
The preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna Download PDFInfo
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- CN106783594A CN106783594A CN201611183924.5A CN201611183924A CN106783594A CN 106783594 A CN106783594 A CN 106783594A CN 201611183924 A CN201611183924 A CN 201611183924A CN 106783594 A CN106783594 A CN 106783594A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 39
- 238000005516 engineering process Methods 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 238000002955 isolation Methods 0.000 claims abstract description 22
- 238000005530 etching Methods 0.000 claims abstract description 12
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 238000001459 lithography Methods 0.000 claims abstract description 10
- 239000013078 crystal Substances 0.000 claims abstract description 5
- 238000011049 filling Methods 0.000 claims abstract 2
- 239000010410 layer Substances 0.000 claims description 66
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 51
- 238000000034 method Methods 0.000 claims description 42
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 34
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 34
- 239000000377 silicon dioxide Substances 0.000 claims description 26
- 238000001259 photo etching Methods 0.000 claims description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 18
- 229920005591 polysilicon Polymers 0.000 claims description 18
- 235000012239 silicon dioxide Nutrition 0.000 claims description 13
- 239000012535 impurity Substances 0.000 claims description 12
- 239000011241 protective layer Substances 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 7
- 239000003292 glue Substances 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 230000004913 activation Effects 0.000 claims description 4
- 238000002161 passivation Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 230000010354 integration Effects 0.000 abstract 1
- 230000009191 jumping Effects 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000007787 solid Substances 0.000 description 6
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 241000790917 Dioxys <bee> Species 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000001093 holography Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
- H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q23/00—Antennas with active circuits or circuit elements integrated within them or attached to them
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q7/00—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Variable-Direction Aerials And Aerial Arrays (AREA)
Abstract
The present invention provides a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna, including step：Choose the GeOI substrates of a certain crystal orientation；Etching obtains isolation channel and forms isolated area in GeOI substrates；Etching GeOI substrates form p-type groove and N-type groove；Filling p-type groove and N-type groove, p-type active area, N-type active area, p-type contact zone and N-type contact zone are formed using ion implanting in p-type groove and in N-type groove；Lead is formed in P contact zones and N contact zones lithography fair lead, the preparation of the heterogeneous Ge base pins diode is completed.The antenna that the present invention is provided constitutes source antenna and holographic structure by making heterogeneous Ge base pins diode on the semiconductor substrate using heterogeneous Ge base pins diode, and the restructural of antenna is realized using heterogeneous being turned on or off for Ge base pins diode string.Therefore, the antenna have small volume, easy of integration, simple structure, frequency can rapid jumping the characteristics of.
Description
Technical field
The present invention relates to antenna technical field, more particularly to a kind of heterogeneous pole of Ge base pins two of restructural multilayer holographic antenna
The preparation technology of pipe.
Background technology
Antenna is the building block of wireless communication field, for radiating and receiving radio wave.With modern communicationses
The fast development of technology, has been born many new technological means in field of antenna.Holographic antenna has that section is low, be easy to conformal,
And it is capable of the propagation of guide electromagnetic waves, cause the concern and research of domestic and foreign scholars.Holographic antenna is to utilize holographic structure
Change source antenna radiation characteristic, to obtain a kind of aperture antenna of target antenna radiation characteristic.Holographic antenna can be according to difference
Applied environment selection holographic structure in different piece, realize antenna with it is integrated using background, presented loss high is being avoided
While electric structure, make overall structure relatively simple, so as to breach limitation of the structure outline to antenna applications, while having more
It is disguised.
With the rising of the load number on communication system platform, load weight is continuously increased, therefore needed for building antenna
Expense constantly rise, meanwhile, electromagnetic interference between each antenna is also very big, has a strong impact on system worked well.In order to subtract
The antenna weights of light platform loads, reduces cost, the radar scattering interface for reducing platform, realize the spies such as good electromagnetic compatibility
Property, using reconfigurable antenna technology, realize being realized with an antenna function of multiple antennas.Reconfigurable antenna can be divided into by function
Frequency reconfigurable antenna (including realize broadband and realize multiband), directional diagram reconstructable aerial, polarization reconfigurable antenna and
Many electromagnetic parameter reconfigurable antennas.Frequency, lobe pattern, the polarization mode of antenna can be made by the structure for changing reconfigurable antenna
Reconstruct is realized Deng one or more in many kinds of parameters.
Therefore, how to make a kind of holographic antenna of restructural just becomes of crucial importance.
The content of the invention
Therefore, to solve technological deficiency and deficiency that prior art is present, the present invention proposes that a kind of restructural multilayer is holographic
The preparation technology of the heterogeneous Ge base pins diode of antenna.
Specifically, the preparation technology of the heterogeneous Ge base pins diode of a kind of restructural multilayer holographic antenna proposed by the present invention,
The restructural multilayer holographic antenna includes：Semiconductor chip (11), Anneta module (13), the first holographic annulus (15) and second are complete
Breath annulus (17)；The Anneta module (13), the described first holographic annulus (15) and the second holographic annulus (17) use
Semiconductor technology is made on the semiconductor chip (11)；
Wherein, the Anneta module (13), the described first holographic annulus (15) and the second holographic annulus (17) are wrapped
Include the heterogeneous Ge base pins diode string (W1, W2, W3, W4, W5, W6, W7, W8) being sequentially connected in series；
Wherein, the preparation technology of the heterogeneous Ge base pins diode includes step：
Choose the GeOI substrates of a certain crystal orientation；
Etching obtains isolation channel and forms isolated area in the GeOI substrates；
Etch the GeOI substrates and form p-type groove and N-type groove；
The p-type groove and the N-type groove are filled, using ion implanting in the p-type groove and the N-type groove
Interior formation p-type active area, N-type active area, p-type contact zone and N-type contact zone；
Lead is formed in the P contact zones and N contact zones lithography fair lead, the heterogeneous pole of Ge base pins two is completed
The preparation of pipe.
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided,
Etching obtains isolation channel and forms isolated area in the GeOI substrates, including：
Generate silica to form the first silicon dioxide layer in the GeOI substrate surfaces；
In the first silicon dioxide layer Surface Creation silicon nitride forming the first silicon nitride layer；
The first isolated area figure is formed on first silicon nitride layer using photoetching process；
Using dry etch process the specified location of the first isolated area figure etch first protective layer and
The GeOI substrates to form isolation channel, and the isolation channel thickness of the depth more than or equal to the top layer Ge of the GeOI substrates
Degree；
The isolation channel is filled to form the isolated area of the heterogeneous Ge bases plasma pin diodes.
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided, carve
Lose the GeOI substrates and form p-type groove and N-type groove, including：
Generate silica to form the second silicon dioxide layer in the GeOI substrate surfaces；
In the second silicon dioxide layer Surface Creation silicon nitride forming the second silicon nitride layer；
The second isolated area figure is formed on second silicon nitride layer using photoetching process；
Using dry etch process the specified location of the second isolated area figure etch second protective layer and
The GeOI substrates are forming the p-type groove and the N-type groove.
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided, fill out
The p-type groove and the N-type groove are filled, p-type is formed in the p-type groove and in the N-type groove using ion implanting
Active area, N-type active area, p-type contact zone and N-type contact zone, including：
The p-type groove and the N-type groove are filled using polysilicon；
After GeOI substrates described in planarizing process, polysilicon layer is formed on the GeOI substrates；
Polysilicon layer described in photoetching, and using the method with glue ion implanting to the p-type groove and the N-type groove institute
Be injected separately into p type impurity and N-type impurity in position with formed p-type active area and N-type active area and simultaneously formed p-type contact zone and
N-type contact zone；
Removal photoresist；
The polysilicon layer beyond the p-type contact zone and the N-type contact zone is removed using wet etching.
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided,
The P contact zones and N contact zones lithography fair lead form lead, including：
Silica is generated on the GeOI substrates；
Using the impurity in annealing process activation active area；
In the p-type contact zone and N-type contact zone lithography fair lead forming lead；
Passivation Treatment and photoetching PAD are forming the heterogeneous Ge bases plasma pin diodes.
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided, institute
Stating Anneta module (13) includes the first heterogeneous Ge base pins diode antenna arm (1301), the second heterogeneous Ge base pins diode antenna
Arm (1302), coaxial feeder (1303), the first direct current biasing line (1304), the second direct current biasing line (1305), the 3rd direct current are inclined
Put line (1306), the 4th direct current biasing line (1307), the 5th direct current biasing line (1308), the 6th direct current biasing line (1309),
Seven direct current biasing lines (1310), the 8th direct current biasing line (1311)；
Wherein, the internal core wire and outer conductor of the coaxial feeder (1303) are respectively welded in the first direct current biasing line
And the second direct current biasing line (1305) (1304)；
The first direct current biasing line (1304), the second direct current biasing line (1305), the 3rd direct current biasing line
(1306) and the 4th direct current biasing line (1307) along the described first heterogeneous Ge base pins diode antenna arm (1301) length
Direction is respectively electrically connected to the described first heterogeneous Ge base pins diode antenna arm (1301)；
The 5th direct current biasing line (1308), the 6th direct current biasing line (1309), the 7th direct current biasing line
(1310) and the 8th direct current biasing line (1311) along the described second heterogeneous Ge base pins diode antenna arm (1302) length
Direction is respectively electrically connected to the described second heterogeneous Ge base pins diode antenna arm (1302).
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided, institute
Stating the first holographic annulus (15) includes multiple first annular units (1501) evenly distributed in a ring, and the first annular list
First (1501) include the 9th direct current biasing line (15011) and the 7th heterogeneous Ge base pins diode string (W7), and the 9th direct current is inclined
Put the two ends that line (15011) is electrically connected to the described 7th heterogeneous Ge base pins diode string (W7).
In a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided, institute
State the second holographic annulus bag (17) and include multiple the second annular elements (1701) evenly distributed in a ring, and second annular is single
First (1701) include the tenth direct current biasing line (17011) and the 8th heterogeneous Ge base pins diode string (W8), and the tenth direct current is inclined
Put the two ends that line (17011) is electrically connected to the described 8th heterogeneous Ge base pins diode string (W8).
From the foregoing, it will be observed that a kind of preparation work of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna that the present invention is provided
Skill, the preparation technology employs heterojunction structure by Ge base pin diodes, so as to improve carrier injection efficiency and
Electric current, therefore the performance of heterogeneous Ge base pins diode is better than homogeneity Ge base pin diodes.Additionally, heterogeneous Ge base pins should be based on
The restructural multilayer holographic antenna small volume of diode, section are low, simple structure, easy to process；Using coaxial cable as feedback
Source, without complicated feed structure；Using heterogeneous Ge base pins diode as antenna basic component units, only need to be by controlling it
It is turned on or off, you can realize the restructural of frequency；Using heterogeneous Ge base pins diode as holographic structure basic composition list
Unit, can neatly define holographic structure figure, and improve gain and the disguise of holographic antenna；All constituents exist
Semiconductor chip side, it is easy to plate-making processing.
Brief description of the drawings
In order to more clearly illustrate the technical scheme of the present invention or prior art, embodiment or prior art will be retouched below
The accompanying drawing to be used needed for stating is briefly described.It should be evident that drawings in the following description are more of the invention
Embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can also be attached according to these
Figure obtains other accompanying drawings.Below in conjunction with accompanying drawing, specific embodiment of the invention is described in detail.
Fig. 1 is a kind of preparation of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna provided in an embodiment of the present invention
Process flow diagram；
Fig. 2 is a kind of structural representation of restructural multilayer holographic antenna provided in an embodiment of the present invention；
Fig. 3 is a kind of structural representation of Anneta module provided in an embodiment of the present invention；
Fig. 4 is a kind of structural representation of first annular unit provided in an embodiment of the present invention；
Fig. 5 is a kind of structural representation of second annular element provided in an embodiment of the present invention；
Fig. 6 is a kind of heterogeneous Ge base pins diode structure schematic diagram provided in an embodiment of the present invention；
The preparation technology schematic diagram of Fig. 7 a- Fig. 7 r another heterogeneous Ge base pins diodes for the embodiment of the present invention is provided.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing of the invention, to this hair
Bright technical scheme carries out clear, complete description.Obviously, described embodiment is a part of embodiment of the invention, without
It is whole embodiments.Based on embodiments of the invention, those of ordinary skill in the art are not making creative work premise
Lower obtained every other embodiment, belongs to protection scope of the present invention.
Embodiment one
Fig. 1, Fig. 2 are referred to, Fig. 1 is a kind of heterogeneous Ge bases of restructural multilayer holographic antenna provided in an embodiment of the present invention
The preparation technology schematic flow sheet of pin diodes, Fig. 2 is a kind of restructural multilayer holographic antenna provided in an embodiment of the present invention
Structural representation.The restructural multilayer holographic antenna includes：Semiconductor chip (11), Anneta module (13), the first holographic annulus
And the second holographic annulus (17) (15)；The Anneta module (13), the described first holographic annulus (15) and the second holographic circle
Ring (17) is made on the semiconductor chip (11) using semiconductor technology.
Please also refer to Fig. 3, Fig. 3 is a kind of structural representation of Anneta module provided in an embodiment of the present invention, the day
Wire module 13, the described first holographic annulus 15 and the second holographic annulus 17 include the heterogeneous Ge base pins two being sequentially connected in series
Pole pipe string W1, W2, W3, W4, W5, W6, W7, W8.
Specifically, the preparation technology of the heterogeneous Ge base pins diode comprises the following steps：
Choose the GeOI substrates of a certain crystal orientation；
Etching obtains isolation channel and forms isolated area in the GeOI substrates；
Etch the GeOI substrates and form p-type groove and N-type groove；
The p-type groove and the N-type groove are filled, using ion implanting in the p-type groove and the N-type groove
Interior formation p-type active area, N-type active area, p-type contact zone and N-type contact zone；
Lead is formed in the P contact zones and N contact zones lithography fair lead, the heterogeneous pole of Ge base pins two is completed
The preparation of pipe.
Wherein, using GeOI substrates the reason for, is, for solid plasma antenna because the good microwave of its needs is special
Property, and solid plasma pin diodes are in order to meet this demand, it is necessary to possess good isolation characteristic and carrier i.e. solid-state
The restriction ability of plasma, and GeOI substrates can be conveniently formed pin area of isolation, dioxy because it has with isolation channel
SiClx (SiO2) also can be that solid state plasma is limited in top layer Ge by carrier, it is advantageous to solid as son using GeOI
The substrate from pin diodes such as state.Also, because Ge materials have carrier mobility high, therefore improve device performance.
Further, in the present embodiment, etching obtains isolation channel and forms isolated area in the GeOI substrates, specifically
For：
Generate silica to form the first silicon dioxide layer in the GeOI substrate surfaces；In first silica
Layer surface generates silicon nitride to form the first silicon nitride layer；This have the advantage that, using silica (SiO2) it is loose
Characteristic, by the stress isolation of silicon nitride (SiN), prevents it from conducting into top layer Ge, it is ensured that the stabilization of top layer Ge performances；It is based on
Silicon nitride (SiN) and high selectivities of the Ge in dry etching, by the use of silicon nitride (SiN) as the film of sheltering of dry etching, easily
Realized in technique.It is, of course, understood that the material of the number of plies of protective layer and protective layer is not limited herein, as long as energy
Enough form protective layer.
The first isolated area figure is formed on first silicon nitride layer using photoetching process；
Using dry etch process the specified location of the first isolated area figure etch first protective layer and
The GeOI substrates to form isolation channel, and the isolation channel thickness of the depth more than or equal to the top layer Ge of the GeOI substrates
Degree；
The isolation channel is filled to form the isolated area of the heterogeneous Ge bases plasma pin diodes.
Further, in the present embodiment, the GeOI substrates are etched and forms p-type groove and N-type groove, specially：
Generate silica to form the second silicon dioxide layer in the GeOI substrate surfaces；In second silica
Layer surface generates silicon nitride to form the second silicon nitride layer；The benefit of do so is similar to formation the first silicon dioxide layer and first
Silicon nitride layer, here is omitted.
The second isolated area figure is formed on second silicon nitride layer using photoetching process；
Using dry etch process the specified location of the second isolated area figure etch second protective layer and
The GeOI substrates are forming the p-type groove and the N-type groove.
Wherein, the depth of p-type groove and N-type groove is more than the second silicon dioxide layer and the second silicon nitride layer thickness and is less than
Second silicon dioxide layer and the second silicon nitride layer and GeOI substrate top layer Ge thickness sums.Preferably, the p-type groove and N-type ditch
Distance of the bottom of groove away from the top layer Ge bottoms of GeOI substrates is 0.5 micron~30 microns, forms the deep trouth being generally acknowledged that, so
Impurity Distribution uniform can be formed when p-type and N-type active area is formed and P, N area of high-dopant concentration and with precipitous pi with
Ni is tied, and is beneficial to raising i areas plasma density.
Further, in the present embodiment, the p-type groove and the N-type groove are filled, using ion implanting described
P-type active area, N-type active area, p-type contact zone and N-type contact zone are formed in p-type groove and in the N-type groove, specially：
The p-type groove and the N-type groove are filled using polysilicon；
After GeOI substrates described in planarizing process, polysilicon layer is formed on the GeOI substrates；
Polysilicon layer described in photoetching, and using the method with glue ion implanting to the p-type groove and the N-type groove institute
Be injected separately into p type impurity and N-type impurity in position with formed p-type active area and N-type active area and simultaneously formed p-type contact zone and
N-type contact zone；
Removal photoresist；
The polysilicon layer beyond the p-type contact zone and the N-type contact zone is removed using wet etching.
Further, in the present embodiment, lead, tool are formed in the P contact zones and N contact zones lithography fair lead
Body is：
Silica is generated on the GeOI substrates；
Using the impurity in annealing process activation active area；
In the p-type contact zone and N-type contact zone lithography fair lead forming lead；
Passivation Treatment and photoetching PAD are forming the heterogeneous Ge bases plasma pin diodes.
Further, in another embodiment of the present invention, the Anneta module (13) includes the first heterogeneous Ge base pins
Diode antenna arm (1301), the second heterogeneous Ge base pins diode antenna arm (1302), coaxial feeder (1303), the first direct current
Offset line (1304), the second direct current biasing line (1305), the 3rd direct current biasing line (1306), the 4th direct current biasing line (1307),
5th direct current biasing line (1308), the 6th direct current biasing line (1309), the 7th direct current biasing line (1310), the 8th direct current biasing line
(1311)；
Wherein, the internal core wire and outer conductor of the coaxial feeder (1303) are respectively welded in the first direct current biasing line
And the second direct current biasing line (1305) (1304)；
The first direct current biasing line (1304), the second direct current biasing line (1305), the 3rd direct current biasing line
(1306) and the 4th direct current biasing line (1307) along the described first heterogeneous Ge base pins diode antenna arm (1301) length
Direction is respectively electrically connected to the described first heterogeneous Ge base pins diode antenna arm (1301)；
The 5th direct current biasing line (1308), the 6th direct current biasing line (1309), the 7th direct current biasing line
(1310) and the 8th direct current biasing line (1311) along the described second heterogeneous Ge base pins diode antenna arm (1302) length
Direction is respectively electrically connected to the described second heterogeneous Ge base pins diode antenna arm (1302).
Further, in another embodiment of the present invention, please also refer to Fig. 4, Fig. 4 is provided for the embodiment of the present invention
A kind of first annular unit structural representation, the first holographic annulus (15) includes multiple evenly distributed in a ring the
One annular element (1501), and the first annular unit (1501) is heterogeneous including the 9th direct current biasing line (15011) and the 7th
Ge base pin diodes string (W7), the 9th direct current biasing line (15011) is electrically connected to the described 7th heterogeneous pole of Ge base pins two
The two ends of pipe string (W7).
Further, in another embodiment of the present invention, please also refer to Fig. 5, Fig. 5 is provided for the embodiment of the present invention
A kind of second annular element structural representation, second holographic annulus bag (17) includes multiple evenly distributed in a ring the
Second ring unit (1701), and second annular element (1701) is heterogeneous including the tenth direct current biasing line (17011) and the 8th
Ge base pin diodes string (W8), the tenth direct current biasing line (17011) is electrically connected to the described 8th heterogeneous pole of Ge base pins two
The two ends of pipe string (W8).
Further, Fig. 6 is a kind of heterogeneous Ge base pins diode structure schematic diagram provided in an embodiment of the present invention.Such as Fig. 6
Shown, heterogeneous Ge base pins diode is by P+Area (27), N+Area (26) and intrinsic region (22) constitute, and metal contact zone (23) are positioned at P+
Area (27) place, is connected to the positive pole of direct current biasing, and metal contact zone (24) are positioned at N+Area (26) place, is connected to the negative of direct current biasing
Pole, all heterogeneous Ge base pins diodes are in forward direction in can making whole heterogeneous Ge base pins diode string by applying DC voltage
Conducting state.
Embodiment two
Fig. 7 a- Fig. 7 r, Fig. 7 a- Fig. 7 r be refer to for another heterogeneous Ge base pins diode provided in an embodiment of the present invention
Preparation technology schematic diagram.The present embodiment on the basis of above-described embodiment, for heterogeneous Ge base pins diode of the invention
Preparation technology is described in detail.
Step 1, backing material preparation process：
(1a) as shown in Figure 7a, chooses (100) crystal orientation, and doping type is p-type, and doping concentration is 1014cm-3GeOI lining
Egative film 101, the thickness of top layer Ge is 50 μm；
(1b) as shown in Figure 7b, using chemical vapor deposition (Chemical vapor deposition, abbreviation CVD)
Method, deposits one layer of SiO of 40nm thickness on GeOI substrates2Layer 201；
(1c) deposits one layer of 2 Si of μ m thick using the method for chemical vapor deposition on substrate3N4/ SiN layer
202；
Step 2, isolates preparation process：
(2a) as shown in Figure 7 c, isolated area, wet etching isolated area is formed by photoetching process on above-mentioned protective layer
One Si3N4/ SiN layer 202, forms isolated area figure；Using dry etching, form wide 5 μm in isolated area, depth be 50 μm it is deep every
From groove 301；
(2b) as shown in figure 7d, using the method for CVD, deposits SiO2401 fill up the deep isolation trench；
(2c) as shown in figure 7e, using chemically mechanical polishing (Chemical Mechanical Polishing, referred to as
CMP) method, removes the Si of surface the3N4The SiO of/SiN layer 202 and the2Layer 201, makes GeOI substrate surfaces smooth；
Step 3, P, N area deep trouth preparation process：
(3a) as depicted in fig. 7f, using CVD method, consecutive deposition prolongs two layer materials on substrate, and ground floor is 300nm thick
2nd SiO of degree2Layer 601, the second layer is the 2nd Si of 500nm thickness3N4/ SiN layer 602；
(3b) as shown in figure 7g, photoetching P, N areas deep trouth, the Si of wet etching P, N areas the 2nd3N4The SiO2 of/SiN layer 602 and the 2nd
Layer 601, forms P, N area figure；Using dry etching, form wide 4 μm in P, N area, deep 5 μm deep trouth 701, the length of P, N area groove
Degree determines according to the applicable cases in prepared antenna；
(3c) as shown in Fig. 7 h, at 850 DEG C, high-temperature process 10 minutes, oxidation trough inwall forms oxide layer 801, so that
P, N area groove inwall are smooth；
(3d) as shown in figure 7i, the oxide layer 801 of P, N area groove inwall is removed using wet-etching technology.
Step 4, P, N contact zone preparation process：
(4a) using the method for CVD, the depositing polysilicon 1001 in P, N area groove, and groove is filled up as shown in Fig. 7 j；
(4b), using CMP, removes the Si of surface polysilicon 1001 and the 2nd as shown in Fig. 7 k3N4/ SiN layer 602, puts down surface
It is whole；
(4c) as shown in Fig. 7 l, using the method for CVD, in one layer of polysilicon 1201 of surface deposition, thickness is 200~
500nm；
(4d) as shown in Fig. 7 m, photoetching P areas active area carries out P using band glue ion injection method+Injection, makes P areas active
Area's doping concentration reaches 0.5 × 1020cm-3, photoresist is removed, form P contacts 1301；
(4e) photoetching N areas active area, N is carried out using band glue ion injection method+Injection, makes N areas active area doping concentration
It is 0.5 × 1020cm-3, photoresist is removed, form N contacts 1302；
(4f), using wet etching, etches away the polysilicon 1201 beyond P, N contact zone as shown in Fig. 7 n, forms P, N and connects
Touch area；
(4g) as shown in Fig. 7 o, using the method for CVD, in surface deposition SiO21501, thickness is 800nm；
(4h) anneals 1 minute at 1000 DEG C, makes the impurity activation of ion implanting and advances impurity in polysilicon；
Step 5, constitutes pin diode steps：
(5a) as shown in Fig. 7 p, the lithography fair lead 1601 in P, N contact zone；
(5b) as shown in Fig. 7 q, substrate surface splash-proofing sputtering metal forms metal silicide 1701, and etch in 750 DEG C of alloys
Fall the metal on surface；
(5c) substrate surface splash-proofing sputtering metal, photoetching lead；
(5d) deposits Si as shown in Fig. 7 r3N4/ SiN forms passivation layer 1801, and photoetching PAD forms pin diodes, as
Prepare solid plasma antenna material.
In the present embodiment, above-mentioned various technological parameters are for example, according to the conventional meanses of those skilled in the art
The conversion done is the protection domain of the application.
The heterogeneous Ge base pins diode for being applied to restructural multilayer holographic antenna prepared by the present invention, first, is used
Ge materials, due to its high mobility and the characteristic of big carrier lifetime, improve the solid plasma of heterogeneous Ge base pins diode
Bulk concentration；Secondly, the P areas of heterogeneous Ge base pins diode employ the polysilicon damascene work of the deep etching based on etching with N areas
Skill, the technique can provide abrupt junction pi and ni and tie, and can effectively improve pi knots, the junction depth of ni knots, make solid-state etc. from
The concentration of daughter and the controllability enhancing of distribution, are conducive to preparing high performance plasma antenna；Again, Ge materials are due to it
The treatment of the characteristic of oxide GeO heat endurances difference, P areas and the deep groove side wall planarizing of N areas can be automatically performed in hot environment, letter
The preparation method of material is changed；Finally, the heterogeneous pole of Ge base pins two for being applied to restructural multilayer holographic antenna that prepared by the present invention
Pipe employs a kind of Deep trench isolation technique based on etching, is effectively improved the breakdown voltage of device, it is suppressed that electric leakage
Flow the influence to device performance.
The restructural multilayer based on heterogeneous Ge base pins diode produced using technique provided in an embodiment of the present invention is complete
Antenna volume is small for breath, section is low, simple structure, easy to process；Using coaxial cable as feed, without complicated feed structure；Adopt
With heterogeneous Ge base pins diode as the basic component units of antenna, need to be only turned on or off by controlling it, you can realize frequency
The restructural of rate；Using heterogeneous Ge base pins diode as the basic component units of holographic structure, holography can be neatly defined
Structure graph, and improve gain and the disguise of holographic antenna；All constituents are in semiconductor chip side, it is easy to make
Version processing.
In sum, specific case used herein is set forth to the principle of the invention and implementation method, above reality
The explanation for applying example is only intended to help and understands the method for the present invention and its core concept；Simultaneously for the general technology of this area
Personnel, according to thought of the invention, will change in specific embodiments and applications, in sum, this theory
Bright book content be should not be construed as limiting the invention, and protection scope of the present invention should be defined by appended claim.
Claims (8)
1. a kind of preparation technology of the heterogeneous Ge base pins diode of restructural multilayer holographic antenna, it is characterised in that the restructural
Multilayer holographic antenna includes：Semiconductor chip (11), Anneta module (13), the first holographic annulus (15) and the second holographic annulus
(17)；The Anneta module (13), the described first holographic annulus (15) and the second holographic annulus (17) use semiconductor
Technique is made on the semiconductor chip (11)；
Wherein, the Anneta module (13), the first holographic annulus (15) and the second holographic annulus (17) include according to
The heterogeneous Ge base pins diode string of secondary concatenation；
Wherein, the preparation technology of the heterogeneous Ge base pins diode includes step：
Choose the GeOI substrates of a certain crystal orientation；
Etching obtains isolation channel and forms isolated area in the GeOI substrates；
Etch the GeOI substrates and form p-type groove and N-type groove；
The p-type groove and the N-type groove are filled, the shape in the p-type groove and in the N-type groove using ion implanting
Into p-type active area, N-type active area, p-type contact zone and N-type contact zone；
Lead is formed in the P contact zones and N contact zones lithography fair lead, the heterogeneous Ge base pins diode is completed
Prepare.
2. preparation technology as claimed in claim 1, it is characterised in that etching obtains isolation channel and formed in the GeOI substrates
Isolated area, including：
Generate silica to form the first silicon dioxide layer in the GeOI substrate surfaces；
In the first silicon dioxide layer Surface Creation silicon nitride forming the first silicon nitride layer；
The first isolated area figure is formed on first silicon nitride layer using photoetching process；
Using dry etch process first protective layer and described is etched in the specified location of the first isolated area figure
GeOI substrates to form isolation channel, and the isolation channel thickness of the depth more than or equal to the top layer Ge of the GeOI substrates；
The isolation channel is filled to form the isolated area of the heterogeneous Ge bases plasma pin diodes.
3. preparation technology as claimed in claim 1, it is characterised in that the etching GeOI substrates form p-type groove and N-type ditch
Groove, including：
Generate silica to form the second silicon dioxide layer in the GeOI substrate surfaces；
In the second silicon dioxide layer Surface Creation silicon nitride forming the second silicon nitride layer；
The second isolated area figure is formed on second silicon nitride layer using photoetching process；
Using dry etch process second protective layer and described is etched in the specified location of the second isolated area figure
GeOI substrates are forming the p-type groove and the N-type groove.
4. preparation technology as claimed in claim 1, it is characterised in that filling the p-type groove and the N-type groove, uses
Ion implanting forms p-type active area, N-type active area, p-type contact zone and N-type in the p-type groove and in the N-type groove
Contact zone, including：
The p-type groove and the N-type groove are filled using polysilicon；
After GeOI substrates described in planarizing process, polysilicon layer is formed on the GeOI substrates；
Polysilicon layer described in photoetching, and it is in place to the p-type groove and N-type groove institute using the method with glue ion implanting
Put and be injected separately into p type impurity and N-type impurity to form p-type active area and N-type active area and form p-type contact zone and N-type simultaneously
Contact zone；
Removal photoresist；
The polysilicon layer beyond the p-type contact zone and the N-type contact zone is removed using wet etching.
5. preparation technology as claimed in claim 1, it is characterised in that in the P contact zones and the N contact zones photoetching lead
Hole forms lead, including：
Silica is generated on the GeOI substrates；
Using the impurity in annealing process activation active area；
In the p-type contact zone and N-type contact zone lithography fair lead forming lead；
Passivation Treatment and photoetching PAD are forming the heterogeneous Ge bases plasma pin diodes.
6. preparation technology as claimed in claim 1, it is characterised in that the Anneta module (13) includes the first heterogeneous Ge bases
It is pin diodes antenna arm (1301), the second heterogeneous Ge base pins diode antenna arm (1302), coaxial feeder (1303), first straight
Stream offset line (1304), the second direct current biasing line (1305), the 3rd direct current biasing line (1306), the 4th direct current biasing line
(1307), the 5th direct current biasing line (1308), the 6th direct current biasing line (1309), the 7th direct current biasing line (1310), the 8th straight
Stream offset line (1311)；
Wherein, the internal core wire and outer conductor of the coaxial feeder (1303) are respectively welded in the first direct current biasing line (1304)
With the second direct current biasing line (1305)；
The first direct current biasing line (1304), the second direct current biasing line (1305), the 3rd direct current biasing line
(1306) and the 4th direct current biasing line (1307) along the described first heterogeneous Ge base pins diode antenna arm (1301) length
Direction is respectively electrically connected to the described first heterogeneous Ge base pins diode antenna arm (1301)；
The 5th direct current biasing line (1308), the 6th direct current biasing line (1309), the 7th direct current biasing line
(1310) and the 8th direct current biasing line (1311) along the described second heterogeneous Ge base pins diode antenna arm (1302) length
Direction is respectively electrically connected to the described second heterogeneous Ge base pins diode antenna arm (1302).
7. preparation technology as claimed in claim 1, it is characterised in that the described first holographic annulus (15) including it is multiple in a ring
Evenly distributed first annular unit (1501), and the first annular unit (1501) includes the 9th direct current biasing line
(15011) and the 7th heterogeneous Ge base pins diode string (W7), the 9th direct current biasing line (15011) is electrically connected to described
The two ends of seven heterogeneous Ge base pins diode strings (W7).
8. preparation technology as claimed in claim 1, it is characterised in that the described second holographic annulus bag (17) include it is multiple in a ring
Evenly distributed the second annular element (1701), and second annular element (1701) includes the tenth direct current biasing line
(17011) and the 8th heterogeneous Ge base pins diode string (W8), the tenth direct current biasing line (17011) is electrically connected to described
The two ends of eight heterogeneous Ge base pins diode strings (W8).
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102790084A (en) * | 2011-05-16 | 2012-11-21 | 中国科学院上海微系统与信息技术研究所 | Germanium and III-V mixed coplanar silicon on insulator (SOI) semi-conductor structure and preparation method thereof |
-
2016
- 2016-12-20 CN CN201611183924.5A patent/CN106783594A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102790084A (en) * | 2011-05-16 | 2012-11-21 | 中国科学院上海微系统与信息技术研究所 | Germanium and III-V mixed coplanar silicon on insulator (SOI) semi-conductor structure and preparation method thereof |
Non-Patent Citations (2)
| Title |
|---|
| DA-JIN KIM等: "《Optomization of the Intrinsic Length of a PIN Diode for a Reconfigurable Antenna》", 《2016 INTERNATIONAL CONFERENCE ON ELECTRONICS，INFORMATION，AND COMMUNICATIONS》 * |
| 莫瑞明: "《全息天线的理论和实验研究》", 《中国优秀硕士学位论文全文数据库基础科学辑》 * |
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