CN106778413A - A kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID - Google Patents
A kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID Download PDFInfo
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- CN106778413A CN106778413A CN201611106233.5A CN201611106233A CN106778413A CN 106778413 A CN106778413 A CN 106778413A CN 201611106233 A CN201611106233 A CN 201611106233A CN 106778413 A CN106778413 A CN 106778413A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
- G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
- G06K7/10019—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves resolving collision on the communication channels between simultaneously or concurrently interrogated record carriers.
- G06K7/10069—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves resolving collision on the communication channels between simultaneously or concurrently interrogated record carriers. the collision being resolved in the frequency domain, e.g. by hopping from one frequency to the other
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Abstract
The invention discloses a kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID, mainly it is made up of active phase shifter, buffer, power amplifier and power combiner, the active phase shifter is made up of multiphase filter and vector addition circuit；The buffer is made up of capacitive cross coupling buffer and source follower；The power amplifier is the power amplifier of adjustable gain；The power amplifier provides sufficiently large gain using dual-stage amplifier cascade；The signal of power amplifier output and the reception signal of receiving terminal are overlapped on power combiner, finally reach the purpose of self-interference elimination.Self-interference cancellation circuit area of the present invention is small, and low cost is operated in the bandwidth of operation of 840~960MHz, and power output change is less than 1dBm；Using controllable gain power amplifier as amplitude control module, manageable self-interference signal power is big, and maximum accessible self-interference signal power is up to 8dBm.
Description
Technical field
The integrated mould of ultrahigh frequency RFID is applied to the present invention relates to RF IC technical applications, more particularly to one kind
Intend self-interference cancellation circuit.
Background technology
Radio frequency identification (Radio Frequency Identification, RFID) is a kind of contactless automatic identification
Technology, it mainly realizes automatic identification and information transmission by Space Coupling using radiofrequency signal.Wherein hyperfrequency (Ultra
High Frequency, UHF) working frequency range of long distance radio frequency identification system is 840~960MHz, remote with identification distance,
Read or write speed is fast, and the features such as antenna size is small, in logistics management, toll management, the multiple fields such as security protection have extensively for it
Application prospect.One typical rfid system, is made up of read write line, label and the part of main frame three.In passive ultra-high frequency RFID
In, read write line will also launch continuous carrier to be carried to label while the useful signal from label is received to label
Energizing quantity.Used as a wireless transceiver system for full duplex, the carrier signal of read write line emitter can be because of circulator or orientation coupling
The isolation of clutch is limited and leak into receiver front end, this leakage signal be thus referred to as self-interference signal.It is general certainly dry
The power for disturbing signal is larger (more than+5dBm), can influence the sensitivity of receiver.And due to self-interference signal and reception signal
With frequency, the wave filter that it is difficult outside by piece is eliminated.
Existing self-interference technology for eliminating can be generally divided into active self-interference and eliminate and passive self-interference technology for eliminating.Nothing
From interference cancellation techniques self-interference signal is reduced by increasing the passive devices such as antenna, orthogonal mixer in sending and receiving end
Energy.Although these structures can well suppress self-interference signal, its integrated level is low, and effective working band is narrower, cost
It is higher.From for the angle of active self-interference technology for eliminating, set up auxiliary channel and extract self-interference signal, and it is logical with main
Road interference signal superposition, or addition impedance transformer network, filter self-interference signal in midband, or producing to offset all the way believes
Number subtracted each other with self-interference signal, the target for suppressing self-interference signal, but their treatable self-interferences letters can be reached
Number power is relatively small.Compared to passive self-interference cancellation technology, in the case where enough self-interference rejection abilities are ensured, active elimination
Technology, can reduce chip area, meet the growth requirement that modern chips tend to high integration and radio communication low cost.
The content of the invention
Circuit is eliminated come in solving ultrahigh frequency RFID reader present invention aim at a kind of integrated simulation self-interference is provided
Influence of the self-interference signal to receptivity, and existing technology for eliminating high cost, accessible self-interference signal power are small
Problem.
Self-interference cancellation circuit proposed by the present invention is main by active phase shifter, the power amplification of buffer and gain controllable
Device and power combiner are constituted.Except power combiner, all circuits are all integrated in chip the present invention, greatly reduce electricity
The area and cost on road, control offseting signal amplitude using the power amplifier of controllable gain in addition, increase accessible
The power of self-interference signal.
Active phase shifter is made up of multiphase filter and vector addition circuit.Multiphase filter is used as by the defeated of difference
Enter signal and be converted into four tunnel orthogonal signalling, multiphase filter is made up of the RC network for cascading, the orthogonalization of its phase is by RC
The low pass or high-pass filter that network is formed phase offset joint in itself realize that its area occupied is small, it is easy to integrated.Consider
To the bandwidth and Insertion Loss of work, the present invention is using two-stage multiphase filter.Vector addition circuit is mainly used to I, Q two-way is orthogonal
Signal carries out Vector modulation, and it is by Gilbert cell (M1-M8), quadrant and reference axis controlling switch (M9-M16) and electric current
Biasing DAC units (S0-S5, S0B-S5B) constitute.Orthogonal voltage input signal is converted into electric current by Gilbert cell.It is logical
Control electric current DAC units are crossed, changes the component of I, Q road electric current, by controlling the switch as control reference axis and quadrant, selection exists
Phase offset in certain quadrant, the introducing of reference axis controlling switch simplifies digital coding logic, reduces digital coding mould
The area of block, is finally synthesized I, Q electric current by load resistance, realizes the phase offset in certain quadrant.In view of what is realized
Complexity and precision, active phase shifter of the invention control digit for 6 bits, and phase accuracy is 5.625 °.
The buffer that the present invention is used is made up of capacitive cross coupling buffer and source follower, and capacitive cross coupling is slow
Device (M1-M4) is rushed as the first order, its purpose is to differential signal is converted into single-ended signal, wherein left half of circuit be for
Ensure that its differential-input capacitance is identical, balance the output loading of active phase shifter with this, it is ensured that the difference of active phase shifter output
Divide property.In order to reduce the load of active phase shifter, we reduce the pipe sizing of cross-couplings buffer, but this can increase it
Output impedance, is unfavorable for being matched with power amplifier, thus we using source follower (M5-M6) as the second level, drive
Move next stage power amplifier.
The amplitude control module of self-interference cancellation circuit is the power amplifier of adjustable gain, and its reason has at 2 points：One is
Prime active phase shifter is input into the limitation of 1dB compression points, improves 1dB compression points, will certainly increase power consumption；Two is power combiner
Or balun input impedance is relatively low (generally 50 ohm), if using source follower, its output voltage swing is difficult lifting, self-interference
The effect of counteracting is affected, and other kinds of amplifier is difficult to drive relatively low impedance.The controllable increasing of present invention design
Beneficial power amplifier is mainly made up of 3-8 decoders, 8 aisle resistance attenuation networks and power amplifier.3-8 decoders are by 3
Digital control signal is compiled into the gating signal of 8 aisle resistance attenuation networks, and is input in 8 channel attenuation networks, completes decay logical
The selection in road.8 channel attenuation networks use the resistor-type attenuator of symmetrical π types, and decay stepping is 1dB.The output of buffer
Signal is sent to power amplifier and is amplified by signal by the attenuation path of gating.Before the power amplifier to signal
Decayed, to control the power output of whole circuit.Such structure can improve whole amplitude control module gain-adjusted
The linearity.
Power amplifier of the invention provides sufficiently large gain using dual-stage amplifier cascade, it is contemplated that amplifier
Reliability and endurance issues, two-stage all use cascode structures, while cascode structures can also increase input and output it
Between isolation.Simultaneously in order to reduce the crosstalk on ground between two-stage, different ground are connect to two-stage respectively, and using depth N on domain
Trap isolates two-stage.In order that power output is linear controllable in the range of 1~8dBm, power amplifier bias are in ClassAB
One good compromise of the linearity and efficiency.Simultaneously in order to reduce Amplitude-Phase distortion, a benefit is connect in common source pipe MN3 grids
Repay PMOS, if choose PMOS sizes and bias voltage VPP, PMOS electric capacity Cggp can just compensate the grid capacitance Cgs of MN3 with
The change of input voltage.Electric capacity Cf and Rf form the feedback of second level output input, increase the stability of power amplifier.Simultaneously
In order to keep preferable gain flatness, input matching network to use T-shaped in the operating frequency range of 840~960MHz
Match somebody with somebody to obtain a suitable Q value.
Advantage is the present invention compared with prior art：
Self-interference cancellation circuit area of the present invention is small, low cost, mainly by following several respects collective effect：Phase
Control module and amplitude control module are all integrated on piece；Active phase shifter adds coordinate control unit, simplifies digital coding
Logic；Power amplifier uses single ended input Single-end output structure, reduces the use of passive device on piece.By to power amplification
The Rational choice of device matching network, in the bandwidth of operation of 840~960MHz, power output change is less than 1dBm to the present invention；Adopt
With controllable gain power amplifier as amplitude control module, manageable self-interference signal power is big, and maximum of the present invention can
The self-interference signal power for the treatment of is up to 8dBm.
Brief description of the drawings
Fig. 1 is self-interference cancellation theory diagram；
Fig. 2 is the multiphase filter structure chart that the present invention is used；
Fig. 3 is the phase and changes in amplitude figure of two-stage multiphase filter, wherein, Fig. 3 (a) is the differential signal of input, Fig. 3
B () is the output signal of the multiphase filter first order, Fig. 3 (c) is second level output signal；
Fig. 4 is vector addition circuit structure diagram；
Fig. 5 for can decrease coding in Descartes's right-angle coordinate representation；
Fig. 6 is buffer circuit configuration figure；
Fig. 7 is adjustable gain power amplifier theory diagram；
Fig. 8 is power amplifier circuit structure chart；
Fig. 9 is the self-interference cancellation performance map of bucking circuit.
Specific embodiment
Below in conjunction with the accompanying drawings and specific embodiment further illustrates the present invention.
As shown in figure 1, work(of the self-interference cancellation circuit proposed by the present invention by active phase shifter, buffer and gain controllable
Rate amplifier is constituted.By the mathematical computations of vector addition relation, in order to reach certain neutralization effect, we select 6
Active phase shifter and the controllable gain power amplifier of 3.
Active phase shifter is made up of multiphase filter and vector addition circuit, first differential input signal, by two-stage
Multiphase filter, as shown in Fig. 2 signal is by becoming four road signal V after first order RC network1i+、V1i-、V2i+、V2i-, in frequency
At rate ω=1/RC, four road signal phases are orthogonal, and amplitude is identical, four tunnel signals by after the RC network of the second level, output
Four road signal Voi+、Voi-、Voq+、Voq-Phase is still orthogonal at ω=1/RC, as shown in figure 3, but using two-stage RC network level
Connection can increase the bandwidth of operation of multiphase filter, reduce the phase mismatch in bandwidth.The positive blending output signal of multiphase filter
By photovoltaic conversion it is electric current by Gilbert cell, we bias DAC units by control electric current, change I, Q road electric current
Component, different quadrants are selected by selecting quadrant control unit M9-M12, are controlled by selecting reference axis control unit M13-M16
The selection of reference axis processed so that the use identical DAC codings in each quadrant, it is specific as shown in figure 5, final by load resistance
R synthesizes I, Q electric current, realizes the skew of signal phase.As shown in fig. 6, the differential output signal of active phase shifter be input to it is slow
The grid of the device first order (M1-M4) is rushed, M3-M4 is that M1-M2 converts differential signal in order to ensure the differential of previous stage load
The grid end of second level M6 is input to for single-ended signal, the second level is source follower, it is slow be in order to ensure its output impedance with can
Control the matching of gain power amplifier.
The four tunnel orthogonal signalling that multiphase filter output shown in Fig. 2 is produced, are input to the vector addition electricity shown in Fig. 4
Road, carries out Vector modulation, is output as the differential signal that phase occurs certain deviation, and the differential signal of output is by shown in Fig. 6
Buffer, is converted to single-ended signal, and this single-ended signal is input to the controllable gain power amplifier shown in Fig. 7, by 8 passages
Attenuation path necessarily decayed after, the input of the power amplifier being input to shown in Fig. 8 carries out power amplification, finally
All there is the offseting signal of certain deviation in output phase and amplitude.
As shown in fig. 7, a certain decay of the output signal of buffer by 8 channel attenuation networks of controllable gain amplifier
Passage, this specific attenuation path is gated via the gating signal that 3-8 decoders are compiled into by 3 outside digital control signals
, 8 channel attenuation networks use the π type attenuation networks of symmetric form here, and its input and output impedance is identical.Declined by specific
Subtract the signal after passage and be sent to power amplifier and be amplified, the circuit structure of power amplifier is as shown in figure 9, two for using
Level cascode structures, input signal is passed through by electric capacity DCB, Cm1、Cm2, inductance Lm1The input matching network of composition arrives the first order
The grid end of common source pipe MN1 carries out pre-amplification, inductance Lc1I.e. as DC reactor, the original paper of interstage matched, the first order are also served as
Output signal by inter-stage matching network Lc1、Cm3、Cm4The MN3 inputs of the second level are arrived afterwards, and PMOS transistor MP is used as compensation
The compensation transistor of MN3 gate leakage capacitances change, for improving the Amplitude-Phase distortion of power amplifier, electric capacity Cf, resistance RfWith
To ensure the stabilization of whole power amplifier, output end inductance Lr, electric capacity CrSeries resonant network is constituted, resonant frequency is
900MHz, for suppressing higher hamonic wave, the signal of last power amplifier output and the reception signal of receiving terminal are in power combing
It is overlapped on device, is finally reached the purpose of self-interference elimination.When Fig. 9 is 8dBm to consider self-interference signal power, the present invention
Self-interference rejection, be as can be seen from the figure displayed in the working band of 840~960MHz, self-interference rejection ratio is maximum
38dB is can reach, self-interference rejection ratio is more than 28dB in the 100MHz bandwidth of 840~940M.
The techniques well known being related in the present invention is not elaborated.
Claims (7)
1. a kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID, it is characterised in that：Self-interference cancellation electricity
Road is mainly made up of active phase shifter, buffer, power amplifier and power combiner；
The active phase shifter is made up of multiphase filter and vector addition circuit, and multiphase filter is used as by the defeated of difference
Enter signal and be converted into four tunnel orthogonal signalling, multiphase filter is made up of the RC network for cascading, the orthogonalization of its phase is by RC
The low pass or high-pass filter that network is formed phase offset joint in itself realize that vector addition circuit is mainly used to I, Q
Two-way orthogonal signalling carry out Vector modulation, and it is by Gilbert cell (M1-M8), quadrant and reference axis controlling switch (M9-M16)
And current offset DAC units (S0-S5, S0B-S5B) constitute, orthogonal voltage input signal is changed by Gilbert cell
Into electric current, by control electric current DAC units, change the component of I, Q road electric current, by controlling opening as control reference axis and quadrant
Close, select the phase offset in certain quadrant, the introducing of reference axis controlling switch simplifies digital coding logic, reduces
The area of digital coding module, is finally synthesized I, Q electric current by load resistance, realizes the phase offset in certain quadrant；
The buffer is made up of capacitive cross coupling buffer and source follower, capacitive cross coupling buffer (M1-M4)
As the first order, its purpose is to differential signal is converted into single-ended signal, wherein left half of circuit is to ensure that it is poor
Divide input capacitance identical, the output loading of active phase shifter is balanced with this, it is ensured that it is differential that active phase shifter is exported；
The power amplifier is the power amplifier of adjustable gain；
The power amplifier provides sufficiently large gain using dual-stage amplifier cascade；
The signal of power amplifier output and the reception signal of receiving terminal are overlapped on power combiner, finally reach certainly dry
Disturb the purpose of elimination.
2. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
Except power combiner, all circuits are all integrated in chip, the area and cost of circuit are greatly reduced, in addition using controllable
The power amplifier of gain controls offseting signal amplitude, increases the power of accessible self-interference signal.
3. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
Using two-stage multiphase filter.
4. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
In view of the complexity and precision realized, active phase shifter controls digit for 6 bits, and phase accuracy is 5.625 °.
5. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
In order to reduce the load of active phase shifter, the pipe sizing of cross-couplings buffer is reduced, but this can increase its output impedance,
It is unfavorable for being matched with power amplifier, so using source follower (M5-M6) as the second level, driving next stage power to put
Big device.
6. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
Controllable gain power amplifier is mainly made up of 3-8 decoders, 8 aisle resistance attenuation networks and power amplifier, 3-8 decoders
3 digital control signals are compiled into the gating signal of 8 aisle resistance attenuation networks, and are input in 8 channel attenuation networks, complete to decline
Subtract the selection of passage, 8 channel attenuation networks use the resistor-type attenuator of symmetrical π types, and decay stepping is 1dB, buffer
Signal is sent to power amplifier and is amplified by output signal by the attenuation path of gating, right before the power amplifier
Signal is decayed, and to control the power output of whole circuit, can improve the linear of whole amplitude control module gain-adjusted
Degree.
7. the integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID according to claim 1, it is characterised in that：
In view of the reliability and endurance issues of amplifier, two-stage all uses cascode structures, while cascode structures can be with
Increase isolation between input and output, while the crosstalk in order to reduce ground between two-stage, connect to two-stage different ground respectively, and
Two-stage is isolated using deep N-well on domain, in order that power output is linear controllable in the range of 1~8dBm, power amplifier is inclined
Put in ClassAB, be a good compromise of the linearity and efficiency, while in order to reduce Amplitude-Phase distortion, in common source pipe
MN3 grids meet a compensation PMOS, as long as choosing PMOS sizes and bias voltage VPP, PMOS electric capacity Cggp can just compensate MN3
Grid capacitance Cgs with input voltage change, electric capacity Cf and Rf formed the second level output input feedback, increase power amplification
The stability of device, while in order to keep preferable gain flatness, input matching in the operating frequency range of 840~960MHz
Network obtains a suitable Q value using T-shaped matching.
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| CN107359897A (en) * | 2017-08-09 | 2017-11-17 | 中国电子科技集团公司第三十六研究所 | A kind of broadband self-interference cancellation device |
| CN107819711A (en) * | 2017-10-27 | 2018-03-20 | 浙江大华技术股份有限公司 | A kind of self-interference signal offsets method and system |
| CN109271817A (en) * | 2018-07-13 | 2019-01-25 | 江苏金中天智能科技有限公司 | A kind of carrier wave cancellation method and electronic label read/write based on wireless radio-frequency |
| CN109617536A (en) * | 2018-12-27 | 2019-04-12 | 复旦大学 | A kind of X-band phase shifter |
| CN109951163A (en) * | 2019-03-01 | 2019-06-28 | 西安电子科技大学 | A kind of multiple feedback type wideband low noise amplifier |
| CN110334556A (en) * | 2019-07-05 | 2019-10-15 | 电子科技大学 | Coding method based on the passive frequency conversion RFID tag circuit of transistor |
| CN110581700A (en) * | 2019-08-30 | 2019-12-17 | 浙江大学 | Ultra-wideband second-order polyphase filter adopting inductance to compensate high-frequency gain |
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| CN112147480A (en) * | 2020-10-16 | 2020-12-29 | 华中科技大学 | Silicon carbide MOSFET bridge arm circuit for inhibiting crosstalk and design method |
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| CN113452345A (en) * | 2021-06-16 | 2021-09-28 | 电子科技大学 | Broadband active phase shifter based on III-V group compound semiconductor process |
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| CN107359897A (en) * | 2017-08-09 | 2017-11-17 | 中国电子科技集团公司第三十六研究所 | A kind of broadband self-interference cancellation device |
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| CN107819711A (en) * | 2017-10-27 | 2018-03-20 | 浙江大华技术股份有限公司 | A kind of self-interference signal offsets method and system |
| CN111903119A (en) * | 2018-03-12 | 2020-11-06 | 华为技术有限公司 | Full-band receiver and television tuner |
| CN111903119B (en) * | 2018-03-12 | 2022-05-24 | 华为技术有限公司 | Full-band receiver and television tuner |
| CN109271817A (en) * | 2018-07-13 | 2019-01-25 | 江苏金中天智能科技有限公司 | A kind of carrier wave cancellation method and electronic label read/write based on wireless radio-frequency |
| CN109617536A (en) * | 2018-12-27 | 2019-04-12 | 复旦大学 | A kind of X-band phase shifter |
| CN109951163A (en) * | 2019-03-01 | 2019-06-28 | 西安电子科技大学 | A kind of multiple feedback type wideband low noise amplifier |
| CN110334556B (en) * | 2019-07-05 | 2021-09-24 | 电子科技大学 | Encoding method based on transistor passive frequency conversion RFID tag circuit |
| CN110334556A (en) * | 2019-07-05 | 2019-10-15 | 电子科技大学 | Coding method based on the passive frequency conversion RFID tag circuit of transistor |
| CN110581700A (en) * | 2019-08-30 | 2019-12-17 | 浙江大学 | Ultra-wideband second-order polyphase filter adopting inductance to compensate high-frequency gain |
| CN111953361A (en) * | 2020-07-29 | 2020-11-17 | 复旦大学 | Broadband radio frequency domain self-interference elimination circuit of full-duplex receiver |
| CN112147480A (en) * | 2020-10-16 | 2020-12-29 | 华中科技大学 | Silicon carbide MOSFET bridge arm circuit for inhibiting crosstalk and design method |
| CN112417909A (en) * | 2020-11-11 | 2021-02-26 | 中国科学院微电子研究所 | RFID self-interference cancellation circuit |
| CN113452345A (en) * | 2021-06-16 | 2021-09-28 | 电子科技大学 | Broadband active phase shifter based on III-V group compound semiconductor process |
| CN113452345B (en) * | 2021-06-16 | 2022-06-03 | 电子科技大学 | Broadband active phase shifter based on III-V group compound semiconductor process |
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