CN106778413B - A kind of integrated simulation self-interference cancellation circuit applied to ultrahigh frequency RFID - Google Patents
A kind of integrated simulation self-interference cancellation circuit applied to ultrahigh frequency RFID Download PDFInfo
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- CN106778413B CN106778413B CN201611106233.5A CN201611106233A CN106778413B CN 106778413 B CN106778413 B CN 106778413B CN 201611106233 A CN201611106233 A CN 201611106233A CN 106778413 B CN106778413 B CN 106778413B
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- power amplifier
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
- G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
- G06K7/10019—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves resolving collision on the communication channels between simultaneously or concurrently interrogated record carriers.
- G06K7/10069—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves resolving collision on the communication channels between simultaneously or concurrently interrogated record carriers. the collision being resolved in the frequency domain, e.g. by hopping from one frequency to the other
Abstract
The invention discloses a kind of integrated simulation self-interference cancellation circuits applied to ultrahigh frequency RFID, are mainly made of active phase shifter, buffer, power amplifier and power combiner, the active phase shifter is made of multiphase filter and vector addition circuit；The buffer is made of capacitive cross coupling buffer and source follower；The power amplifier is the power amplifier of adjustable gain；The power amplifier provides sufficiently large gain using dual-stage amplifier cascade；The signal of power amplifier output and the reception signal of receiving end are overlapped on power combiner, finally reach the purpose of self-interference elimination.Self-interference cancellation circuit area of the present invention is small, at low cost, works in the bandwidth of operation of 840~960MHz, and output power variation is less than 1dBm；Using controllable gain power amplifier as amplitude control module, manageable self-interference signal power is big, and maximum accessible self-interference signal power is up to 8dBm.
Description
Technical field
The present invention relates to RF IC technical applications, more particularly to a kind of ultrahigh frequency RFID that is applied to integrate mould
Quasi- self-interference cancellation circuit.
Background technique
Radio frequency identification (Radio Frequency Identification, RFID) is a kind of contactless automatic identification
Technology, it mainly realizes that automatic identification and information are transmitted by Space Coupling using radiofrequency signal.Wherein hyperfrequency (Ultra
High Frequency, UHF) working frequency range of long distance radio frequency identification system is 840~960MHz, have identification distance remote,
The features such as read or write speed is fast, and antenna size is small, in logistics management, toll management, the multiple fields such as security protection have extensively
Application prospect.One typical RFID system is made of reader, label and host three parts.In passive ultra-high frequency RFID
In, reader will also emit continuous carrier to label to mention to label while receiving the useful signal from label
For energy.As the wireless transceiver system of a full duplex, the carrier signal of reader transmitter can be because of circulator or orientation coupling
The isolation of clutch is limited and leaks into receiver front end, and the signal of this leakage is thus referred to as self-interference signal.It is general certainly dry
The power for disturbing signal is larger (being greater than+5dBm), will affect the sensitivity of receiver.And due to self-interference signal and receive signal
With frequency, it is difficult the elimination of the filter outside by piece.
Existing self-interference technology for eliminating can be generally divided into active self-interference and eliminate and passive self-interference technology for eliminating.Nothing
From interference cancellation techniques by increasing the passive devices such as antenna, orthogonal mixer in sending and receiving end, to reduce self-interference signal
Energy.Although these structures can inhibit self-interference signal well, its integrated level is low, and effective working band is relatively narrow, cost
It is higher.It for the angle of active self-interference technology for eliminating, establishes auxiliary channel and extracts self-interference signal, and lead to main
The superposition of road interference signal, or addition impedance transformer network, filter out self-interference signal in midband, or generate and offset letter all the way
Number subtracted each other with self-interference signal, can reach the target for inhibiting self-interference signal, but their the self-interference letters that can handle
Number power is relatively small.Compared to passive self-interference cancellation technology, in the case where guaranteeing enough self-interference rejection abilities, active elimination
Technology can reduce chip area, meet the growth requirement that modern chips tend to high integration and wireless communication low cost.
Summary of the invention
It is an object of that present invention to provide a kind of integrated simulation self-interferences to eliminate circuit, to solve in ultrahigh frequency RFID reader
Influence and existing technology for eliminating of the self-interference signal to receptivity are at high cost, accessible self-interference signal power is small
Problem.
Self-interference cancellation circuit proposed by the present invention is mainly by active phase shifter, the power amplification of buffer and gain controllable
Device and power combiner composition.The present invention integrates in the chip in addition to power combiner, all circuits, greatly reduces electricity
The area and cost on road, in addition control offseting signal amplitude using the power amplifier of controllable gain, increase accessible
The power of self-interference signal.
Active phase shifter is made of multiphase filter and vector addition circuit.Multiphase filter is as being used to the defeated of difference
Enter signal and be converted into four tunnel orthogonal signalling, multiphase filter is made of cascade RC network, and the orthogonalization of phase is to pass through RC
What the phase offset joint for the low pass or high-pass filter itself that network is formed was realized, area occupied is small, is easily integrated.Consider
To the bandwidth and Insertion Loss of work, the present invention uses two-stage multiphase filter.Vector addition circuit is mainly used to I, Q two-way is orthogonal
Signal carries out Vector modulation, it is by Gilbert cell (M1-M8), quadrant and reference axis control switch (M9-M16) and electric current
Bias DAC unit (S0-S5, S0B-S5B it) constitutes.Orthogonal voltage input signal is converted into electric current by Gilbert cell.It is logical
Control current DAC unit is crossed, the component of the road I, Q electric current is changed, by control quadrant and reference axis control switch, is selected at some
Phase offset in quadrant, the introducing of reference axis control switch simplify digital coding logic, reduce digital coding module
Area is finally synthesized I, Q electric current by load resistance, realizes the phase offset in some quadrant.In view of the complexity of realization
Degree and precision, active phase shifter control digit of the invention is 6 bits, and phase accuracy is 5.625 °.
The buffer that the present invention uses is made of capacitive cross coupling buffer and source follower, and capacitive cross coupling is slow
Device (M17-M20) is rushed as the first order, its purpose is to which differential signal is converted to single-ended signal, wherein left one side of something circuit is
In order to guarantee that its differential-input capacitance is identical, the output loading of active phase shifter is balanced with this, guarantees active phase shifter output
It is differential.In order to reduce the load of active phase shifter, we reduce the pipe sizing of cross-coupling buffer, but this will increase
Its output impedance is unfavorable for the matching with power amplifier, so we are used as second using source follower (M21-M22)
Grade, drives next stage power amplifier.
The amplitude control module of self-interference cancellation circuit is the power amplifier of adjustable gain, and reason has two o'clock: first is that
Prime active phase shifter inputs the limitation of 1dB compression point, improves 1dB compression point, will definitely increase power consumption；Second is that power combiner
Or balun input impedance is lower (generally 50 ohm), if output voltage swing is difficult to be promoted, self-interference using source follower
The effect of counteracting is affected, and other kinds of amplifier is difficult to drive lower impedance.The controllable increasing that the present invention designs
Beneficial power amplifier is mainly made of 3-8 decoder, 8 aisle resistance attenuation networks and power amplifier.3-8 decoder is by 3
Digital control signal is compiled into the gating signal of 8 aisle resistance attenuation networks, and is input in 8 channel attenuation networks, and it is logical to complete decaying
The selection in road.8 channel attenuation networks use the resistor-type attenuator of symmetrical π type, and decaying stepping is 1dB.The output of buffer
Signal is sent to power amplifier and amplified by signal by the attenuation path of gating.Before the power amplifier to signal
Decay, to control the output power of entire circuit.Entire amplitude control module gain adjustment can be improved in such structure
The linearity.
Power amplifier of the invention provides sufficiently large gain using dual-stage amplifier cascade, it is contemplated that amplifier
Reliability and endurance issues, two-stage all use cascode structure, at the same cascode structure can also increase input and output it
Between isolation.While in order to reduce the crosstalk on ground between two-stage, different ground is connect to two-stage respectively, and depth N is used on domain
Trap is isolated by two-stage.In order to keep output power linear controllable within the scope of 1~8dBm, power amplifier bias is in ClassAB
One good compromise of the linearity and efficiency.Simultaneously in order to reduce Amplitude-Phase distortion, a benefit is connect in common source pipe MN3 grid
Repay PMOS, if choose PMOS size and bias voltage VPP, PMOS capacitor Cggp can compensate the grid capacitance Cgs of MN3 with
The variation of input voltage.Capacitor Cf and resistance Rf forms the feedback of second level output input, increases the stability of power amplifier.
Simultaneously in order to keep preferable gain flatness in the operating frequency range of 840~960MHz, input matching network uses T-type
Matching, to obtain a suitable Q value.
Advantage is the present invention compared with prior art:
Self-interference cancellation circuit area of the present invention is small, at low cost, mainly by following several respects collective effect: phase
It is integrated that control module and amplitude control module are all on piece；Active phase shifter adds coordinate control unit, simplifies digital coding
Logic；Power amplifier uses single ended input Single-end output structure, reduces the use of on piece passive device.By to power amplification
The Rational choice of device matching network, for the present invention in the bandwidth of operation of 840~960MHz, output power variation is less than 1dBm；It adopts
Use controllable gain power amplifier as amplitude control module, manageable self-interference signal power is big, and maximum of the present invention can
The self-interference signal power of processing is up to 8dBm.
Detailed description of the invention
Fig. 1 is self-interference cancellation functional block diagram；
Fig. 2 is the multiphase filter structure chart that the present invention uses；
Fig. 3 is the phase and amplitude variation diagram of two-stage multiphase filter, wherein Fig. 3 (a) is the differential signal of input, Fig. 3
It (b) is the output signal of the multiphase filter first order, Fig. 3 (c) is second level output signal；
Fig. 4 is vector addition circuit structure diagram；
Fig. 5 be can demotion coding cartesian cartesian coordinate system indicate；
Fig. 6 is buffer circuit configuration figure；
Fig. 7 is adjustable gain power amplifier functional block diagram；
Fig. 8 is power amplifier circuit structure chart；
Fig. 9 is the self-interference cancellation performance map of bucking circuit.
Specific embodiment
With reference to the accompanying drawing and specific embodiment further illustrates the present invention.
As shown in Figure 1, function of the self-interference cancellation circuit proposed by the present invention by active phase shifter, buffer and gain controllable
Rate amplifier composition.By the mathematical computations of vector addition relationship, in order to reach certain neutralization effect, we select 6
Active phase shifter and 3 controllable gain power amplifiers.
Active phase shifter is made of multiphase filter and vector addition circuit, first differential input signal, by two-stage
Multiphase filter, as shown in Fig. 2, signal is becoming four road signal V after first order RC network1i+、V1i-、V2i+、V2i-, in frequency
At rate ω=1/RC, four road signal phases are orthogonal, and amplitude is identical, four tunnel signals after the RC network of the second level, output
Four road signal Voi+、Voi-、Voq+、Voq-Phase is still orthogonal at ω=1/RC, as shown in figure 3, but using two-stage RC network grade
Connection can increase the bandwidth of operation of multiphase filter, reduce the phase mismatch in bandwidth.The positive blending output signal of multiphase filter
Electric current is converted by voltage by Gilbert cell, we change the road I, Q electric current by control current offset DAC unit
Component passes through selection reference axis control unit M13-M16 control by selecting quadrant control unit M9-M12 to select different quadrants
The selection of reference axis processed, so that being encoded using identical DAC in each quadrant, specifically as shown in figure 5, finally by load resistance
R synthesizes I, Q electric current, realizes the offset of signal phase.As shown in fig. 6, the differential output signal of active phase shifter be input to it is slow
The grid of the device first order (M17-M20) is rushed, M19-M20 is to guarantee the differential of previous stage load, and M17-M18 believes difference
Number it is converted into the grid end that single-ended signal is input to second level M6, the second level is source follower, and slow is to guarantee its output resistance
The anti-matching with controllable gain power amplifier.
The four tunnel orthogonal signalling that multiphase filter output shown in Fig. 2 generates are input to vector addition electricity shown in Fig. 4
Road carries out Vector modulation, exports the differential signal that certain deviation occurs for phase, and the differential signal of output passes through shown in fig. 6
Buffer is converted to single-ended signal, this single-ended signal is input to controllable gain power amplifier shown in Fig. 7, by 8 channels
Attenuation path carry out after centainly decaying, be input to the input terminal of power amplifier shown in Fig. 8, carry out power amplification, finally
The offseting signal of certain deviation all occurs for output phase and amplitude.
As shown in fig. 7, a certain decaying of the output signal of buffer by 8 channel attenuation networks of controllable gain amplifier
Channel, this specific attenuation path are to be gated by 3 external digital control signals via the gating signal that 3-8 decoder is compiled into
, for 8 channel attenuation networks using the π type attenuation network of symmetric form, input and output impedance is identical here.It declines by specific
Subtract the signal after channel and be sent to power amplifier and amplify, the circuit structure of power amplifier is as shown in figure 9, two used
Grade cascode structure, input signal are passed through by capacitor DCB, Cm1、Cm2, inductance Lm1The input matching network of composition arrives the first order
The grid end of common source pipe MN1 carries out pre-amplification, inductance Lc1It is used as DC reactor, also as the original part of interstage matched, the first order
Output signal pass through inter-stage matching network Lc1、Cm3、Cm4The MN3 input terminal of the second level is arrived afterwards, and PMOS transistor MP is as compensation
The compensation transistor of MN3 gate leakage capacitance variation, for improving the Amplitude-Phase distortion of power amplifier, capacitor Cf, resistance RfWith
To guarantee the stabilization of entire power amplifier, output end inductance Lr, capacitor CrSeries resonant network is formed, resonance frequency is
900MHz, for inhibiting higher hamonic wave, the signal of last power amplifier output and the reception signal of receiving end are in power combing
It is overlapped on device, is finally reached the purpose of self-interference elimination.Fig. 9 is present invention when considering that self-interference signal power is 8dBm
Self-interference rejection, be as can be seen from the figure shown in the working band of 840~960MHz, self-interference inhibits than maximum
It can reach 38dB, self-interference inhibits than being greater than 28dB in the 100MHz bandwidth of 840~940M.
The techniques well known being related in the present invention does not elaborate.
Claims (7)
1. a kind of integrated simulation self-interference cancellation circuit applied to ultrahigh frequency RFID, it is characterised in that: self-interference cancellation electricity
Road is mainly made of active phase shifter, buffer, power amplifier and power combiner；
The active phase shifter is made of multiphase filter and vector addition circuit, and multiphase filter is as being used to the defeated of difference
Enter signal and be converted into four tunnel orthogonal signalling, multiphase filter is made of cascade RC network, and the orthogonalization of phase is to pass through RC
What the phase offset joint for the low pass or high-pass filter itself that network is formed was realized, vector addition circuit is mainly used to I, Q
Two-way orthogonal signalling carry out Vector modulation, it is by Gilbert cell (M1-M8), quadrant and reference axis control switch (M9-M16)
And current offset DAC unit (S0-S5, S0B-S5B it) constitutes, orthogonal voltage input signal is converted by Gilbert cell
The component of the road I, Q electric current is changed by control current DAC unit at electric current, by controlling quadrant and reference axis control switch,
The phase offset in some quadrant is selected, the introducing of reference axis control switch simplifies digital coding logic, reduces number
The area of coding module is finally synthesized I, Q electric current by load resistance, realizes the phase offset in some quadrant；
The buffer is made of capacitive cross coupling buffer and source follower, capacitive cross coupling buffer (M17-
M20 it) is used as the first order, its purpose is to which differential signal is converted to single-ended signal, wherein left one side of something circuit is to guarantee
Its differential-input capacitance is identical, and the output loading of active phase shifter is balanced with this, guarantees the differential of active phase shifter output；
The power amplifier is the power amplifier of adjustable gain；
The power amplifier provides sufficiently large gain using dual-stage amplifier cascade；
The signal of power amplifier output and the reception signal of receiving end are overlapped on power combiner, are finally reached from dry
Disturb the purpose of elimination.
2. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
In addition to power combiner, all circuits are all integrated to greatly reduce the area and cost of circuit in the chip, in addition using controllable
The power amplifier of gain controls offseting signal amplitude, increases the power of accessible self-interference signal.
3. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
Using two-stage multiphase filter.
4. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
In view of the complexity and precision of realization, it is 6 bits that active phase shifter, which controls digit, and phase accuracy is 5.625 °.
5. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
In order to reduce the load of active phase shifter, the pipe sizing of cross-coupling buffer is reduced, but this will increase its output impedance,
It is unfavorable for the matching with power amplifier, so being used as the second level using source follower (M21-M22), drives next stage power
Amplifier.
6. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
Controllable gain power amplifier is mainly made of 3-8 decoder, 8 aisle resistance attenuation networks and power amplifier, 3-8 decoder
3 digital control signals are compiled into the gating signal of 8 aisle resistance attenuation networks, and are input in 8 channel attenuation networks, complete to decline
Subtract the selection in channel, 8 channel attenuation networks use the resistor-type attenuator of symmetrical π type, and decaying stepping is 1dB, buffer
Signal is sent to power amplifier and amplified by output signal by the attenuation path of gating, right before the power amplifier
Signal is decayed, and to control the output power of entire circuit, the linear of entire amplitude control module gain adjustment can be improved
Degree.
7. the integrated simulation self-interference cancellation circuit according to claim 1 applied to ultrahigh frequency RFID, it is characterised in that:
In view of the reliability and endurance issues of amplifier, two-stage all uses cascode structure, while cascode structure can be with
Increase isolation between input and output, while in order to reduce the crosstalk on ground between two-stage, connects to two-stage different ground respectively, and
Two-stage is isolated using deep N-well on domain, in order to keep output power linear controllable within the scope of 1~8dBm, power amplifier is inclined
It sets in ClassAB, is a good compromise of the linearity and efficiency, while in order to reduce Amplitude-Phase distortion, in common source pipe
MN3 grid meets a compensation PMOS, as long as MN3 can be compensated by choosing PMOS size and bias voltage VPP, PMOS capacitor Cggp
Grid capacitance Cgs with the variation of input voltage, capacitor Cf and resistance Rf form the feedback of second level output input, increase power
The stability of amplifier, while in order to keep preferable gain flatness in the operating frequency range of 840~960MHz, it inputs
Matching network is matched using T-type, to obtain a suitable Q value.
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| CN107359897B (en) * | 2017-08-09 | 2019-09-27 | 中国电子科技集团公司第三十六研究所 | A kind of broadband self-interference cancellation device |
| CN107819711B (en) * | 2017-10-27 | 2021-02-02 | 浙江大华技术股份有限公司 | Self-interference signal cancellation method and system |
| CN111903119B (en) * | 2018-03-12 | 2022-05-24 | 华为技术有限公司 | Full-band receiver and television tuner |
| CN109271817A (en) * | 2018-07-13 | 2019-01-25 | 江苏金中天智能科技有限公司 | A kind of carrier wave cancellation method and electronic label read/write based on wireless radio-frequency |
| CN109617536A (en) * | 2018-12-27 | 2019-04-12 | 复旦大学 | A kind of X-band phase shifter |
| CN109951163A (en) * | 2019-03-01 | 2019-06-28 | 西安电子科技大学 | A kind of multiple feedback type wideband low noise amplifier |
| CN110334556B (en) * | 2019-07-05 | 2021-09-24 | 电子科技大学 | Encoding method based on transistor passive frequency conversion RFID tag circuit |
| CN110581700B (en) * | 2019-08-30 | 2021-01-29 | 浙江大学 | Ultra-wideband second-order polyphase filter adopting inductance to compensate high-frequency gain |
| CN111953361B (en) * | 2020-07-29 | 2021-11-19 | 复旦大学 | Broadband radio frequency domain self-interference elimination circuit of full-duplex receiver |
| CN112147480B (en) * | 2020-10-16 | 2021-08-31 | 华中科技大学 | Silicon carbide MOSFET bridge arm circuit for inhibiting crosstalk and design method |
| CN113452345B (en) * | 2021-06-16 | 2022-06-03 | 电子科技大学 | Broadband active phase shifter based on III-V group compound semiconductor process |
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