CN113452345A - Broadband active phase shifter based on III-V group compound semiconductor process - Google Patents
Broadband active phase shifter based on III-V group compound semiconductor process Download PDFInfo
- Publication number
- CN113452345A CN113452345A CN202110664157.4A CN202110664157A CN113452345A CN 113452345 A CN113452345 A CN 113452345A CN 202110664157 A CN202110664157 A CN 202110664157A CN 113452345 A CN113452345 A CN 113452345A
- Authority
- CN
- China
- Prior art keywords
- current
- transistor
- unit
- bias
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/16—Networks for phase shifting
Landscapes
- Networks Using Active Elements (AREA)
Abstract
The invention provides a broadband active phase shifter based on a III-V group compound semiconductor process, and belongs to the technical field of integrated circuits. The phase shifter provides a bias operation unit to solve the problem that a III-V group compound semiconductor process cannot apply a classical phase shifter structure, namely the Gilbert bias operation unit converts two paths of I/Q currents into base voltage of a transistor through a CCVS unit, then the difference operation conversion is carried out by a VCCS unit to control the transistor to obtain the I/Q current ratio relation output by a numerical control current superposition unit, and finally the bias current control unit completes quadrant selection of an I/Q orthogonal signal synthetic vector and current control of an analog adder, so that the accurate regulation and control of tail current of the Gilbert unit are realized; and also provides active transconductance-junction capacitance polyphase filtering (g)m‑CbcPPF) structure enhances the bandwidth of the phase shifter, finally can realize the phase precision control of n bits, and has the advantages of high phase shift precision, low insertion loss, small area, large and adjustable working bandwidth and the like.
Description
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a millimeter wave broadband n-bit active phase shifter based on a III-V group compound semiconductor process.
Background
The spectrum resource of millimeter wave broadband and phased array technology are effective ways to meet the communication requirements. As a core device of a phased array system, a phase shifter provides rapid beam forming and can firmly adjust the scanning direction, and the quality of the phase shifter influences the indexes of the system, such as the working speed, the sensitivity, the power consumption and the gain. Therefore, the design of a phase shifter with high precision, low error rate, low insertion loss and certain gain has important significance for researching a phased array system. The phase shifters are mainly classified into passive phase shifters and active phase shifters, wherein the first phase shifters are basically passive phase shifters formed by some passive elements, but the passive phase shifters have high loss and narrow operating frequency band, which makes it difficult to be widely applied in phased arrays. Therefore, active phase shifters with high accuracy, low loss, large bandwidth and gain are becoming the focus of research.
Currently, all active phase shifter architectures are based on complementary metal-oxide-semiconductor (CMOS) or BiCMOS (Bipo lar-CMOS) process designs. However, when the active phase shifter works in a high-frequency band, the required volume of the device is small, the requirement on a process node is high and needs to reach dozens of nanometers, so that the production cost of the CMOS process is very high; in addition, the substrate electron mobility of the CMOS process is relatively low, and the loss is large. With the development of the technology, a III-V group compound semiconductor process appears at present, the process node is low, the electron mobility is 5-7 times of that of a CMOS process, the loss is low, and the process has good noise, linearity and gain characteristics in a millimeter wave frequency band. However, in the design process, the transistor or the field effect transistor prepared based on the technology cannot be applied to a classic phase shifter structure due to the single property.
Therefore, how to design a millimeter wave broadband n-bit active phase shifter based on a III-V group compound semiconductor process becomes a problem to be solved urgently.
Disclosure of Invention
In view of the problems of the background art, it is an object of the present invention to provide a broadband active phase shifter based on a III-V compound semiconductor process. The phase shifter provides a bias operation unit to solve the problem that the III-V group compound semiconductor process cannot be applied to the structure of the classical phase shifter, and also provides active transconductance-junction capacitance multiphase filtering (g)m-CbcPPF) structure enhances the bandwidth of the phase shifter, finally can realize the phase precision control of n bits, and has the advantages of high phase shift precision, low insertion loss, small area, large and adjustable working bandwidth and the like.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a broadband active phase shifter based on a III-V group compound semiconductor process comprises an input balun, an output balun, a quadrature signal generator, an analog adder and a Gilbert bias operation unit, wherein the input balun converts a received single-ended input signal into a differential signal and inputs the differential signal into the quadrature signal generator, the quadrature signal generator converts the differential signal into four paths of I/Q quadrature signals and inputs the four paths of I/Q quadrature signals into the analog adder, the analog adder synthesizes vectors of the four paths of I/Q quadrature signals into the differential signal and inputs the differential signal into the output balun, the output balun converts the differential signal into a single-ended output signal, the Gilbert bias operation unit comprises a bias decision unit and a numerical control current superposition unit, the numerical control current superposition unit controls the on-off state of a single-pole double-throw switch through an n-bit digital code to control the superposition of I/Q current, and obtaining I/Q current gain in a certain proportion, and inputting the I/Q current gain into a bias decision unit, wherein the bias decision unit is used for transmitting the I/Q current gain to a tail current source of the analog adder and controlling the phase and gain of the four paths of I/Q orthogonal signal vectors after vector synthesis.
Furthermore, the numerical control current superposition unit is formed by connecting n groups of current array units in parallel, each group of current array comprises two transistor arrays and a single-pole double-throw switch, one transistor array is used for superposing the current of the I path, the other transistor array is used for superposing the current of the Q path, and the switching of the single-pole double-throw switch is used for controlling the n groups of currents to synthesize the current gain of the I path or the Q path required by the synthesis.
Further, due to process limitations, each transistor array is formed by transistors with different sizes or by connecting a plurality of transistors in parallel, and the purpose is to obtain a plurality of I/Q current gains, and the proportion of the I/Q current gains is determined by the phase shifting precision.
Furthermore, the bias decision unit is formed by sequentially connecting a Current Control Voltage (CCVS) unit, a Voltage Control Current (VCCS) unit and a bias current control unit in series, the CCVS unit converts the current gain output by the numerical control current superposition unit into control voltage and inputs the control voltage to the VCCS unit, the VCCS unit converts the control voltage through difference operation to obtain a required I/Q current ratio and inputs the required I/Q current ratio to the bias current control unit, and the bias current control unit realizes quadrant selection through a switch module and controls the tail current ratio of two paths I/Q of the analog adder according to the I/Q current ratio.
Further, the CCVS unit comprises a pull-up transistor and a bias circuit, wherein the bias circuit is a resistor R0The emitter of the transistor is connected with the output current of the numerical control current superposition unit, and the collector is connected with the bias resistor R0Base output voltage, resistor R0The other end of the power supply voltage VDD; the VCCS unit is formed by connecting two transistors in series, the size and the collector bias circuit of one transistor are consistent with those of a pull-up transistor of the CCVS unit, namely the collector of the transistor is connected with a resistor R0The base electrode of the transistor is connected with the base electrode output voltage of the C CVS unit, the emitter electrode of the transistor is connected with the collector electrode of the other transistor, the other transistor and the transistor which provides the current reference in the numerical control current superposition unit have the same size, and the base electrode voltage of the other transistor is also equal, namely the base electrode of the transistor is connected with the base electrode input voltage of the transistor which is used as the current reference, and the emitter electrode of the transistor is grounded.
Further, the quadrature signal generator is an active transconductance-junction capacitor multiphaseFiltering (g)m-CbcPPF) structure, said multi-stage tunable active gm-CbcThe PPF structure consists of N stages of circuits, each stage of circuit is gm-CbcNetwork formation of said gm-CbcThe network comprises a junction capacitor CbcTransistor and transconductance gmA transistor; gm、CbcThe emitter of the transistor is connected with an emitter follower current mirror to provide proper and stable quiescent current for the emitter of the transistor, and the collector of the transistor is connected with a bias circuit which is used for controlling transconductance and junction capacitance of the transistor.
Furthermore, the transistor is adjusted to enable the collector of the transistor to be reversely biased and the emitter of the transistor to be positively biased, namely the transistor is located in an amplification region, and required transconductance is debugged in the region; the base electrode and the emitter electrode of the transistor are in short circuit and are used as diodes, and the bias network of the transistor is regulated and controlled to obtain the required junction capacitance; the junction capacitance and transconductance of each stage of circuit can determine a central frequency point, and the frequency band range of the orthogonal signal generator can be regulated and controlled by changing the junction capacitance and transconductance.
Further, all transistors are fabricated based on a group III-V compound semiconductor process, such as an InP semiconductor transistor, a GaN semiconductor transistor, and a GaAs semiconductor transistor.
Furthermore, the analog adder includes two gilbert cells, the gilbert cell is formed by cascading two differential amplifiers, and the inputs of the four differential amplifiers are quadrature differential signals V output by a quadrature differential generator of a previous stage circuitI+、VI-、VQ+、VQ-(ii) a Two paths of output current I of I/Q of VCCS unitI/QSelectively inputting the signals into a tail current source of a Gilbert unit differential amplifier under the control of a single-pole double-throw switch, controlling the quadrant of the synthesized signal, and outputting a vector synthesized differential signal Vo ut+、Vout-。
Further, the input balun and the output balun may be active baluns or passive baluns.
The mechanism of the invention is as follows:
when a phase shift control module of the traditional CMOS process is applied to a current mirror structure, a P tube is used as a current reference, and an N tube is connected below the P tube to directly copy current to an analog adder; the III-V group compound semiconductor process is a single transistor, current can be output to a pull-up circuit and converted into base voltage output only through the transistor, a tail current control transistor of the Gilbert unit is located below a module, base voltage values of two transistors are not at the same level, the tail current control transistor is in a supersaturated state when the tail current control transistor is directly used and cannot normally work, so that the bias operation unit provided by the invention completes quadrant selection of a synthetic vector and current control of an analog adder, and accurate regulation and control of tail current of the Gilbert unit are realized.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
1. the Gilbert bias operation unit converts two paths of I/Q currents into base voltage of a transistor through a Current Control Voltage (CCVS) unit, controls the transistor to perform difference operation through a Voltage Control Current (VCCS) unit, and finally completes quadrant selection of four paths of I/Q orthogonal signal synthetic vectors and current control of an analog adder through a bias current control unit, so that accurate regulation and control of tail current of the Gilbert unit are realized.
2. Conventional RC quadrature network structures for quadrature signal generators exhibit a sharp drop in phase error over a wide frequency band, resulting in a degradation of the performance of the active phase shifter, for which active transconductance-junction capacitive polyphase filtering (g) is proposedm-CbcPPF) structure solves the problem, and adopts transconductance and junction capacitance to replace capacitance and resistance in a passive RC-PPF structure, and controls transconductance g by changing bias voltagemAnd junction capacitance CbcAnd further, frequency points of all levels are controlled, the bandwidth change range is adjusted, and meanwhile, better balance is achieved between insertion loss and phase errors.
3. Compared with the traditional phase shifter, the millimeter wave broadband active phase shifter with n-bit phase shift has the advantages of small area, low cost, small insertion loss, large and adjustable working bandwidth, small phase error and relatively flat gain.
Drawings
Fig. 1 is a system block diagram of an n-bit active phase shifter of the present invention.
FIG. 2 shows the present invention gm-CbcBlock diagram of a quadrature differential signal generator of PPF architecture.
FIG. 3 shows the invention gm-CbcThe first-stage circuit structure schematic diagram of the orthogonal differential signal generator with the PPF structure is provided.
FIG. 4 shows the invention gm-CbcAnd (3) a simulation result diagram of the orthogonal differential signal generator with the PPF structure.
Figure 5 is a block diagram of a phase shift control module proposed by the prior art and the present invention,
wherein, (a) is the block diagram of the existing CMOS process amplitude control module; (b) the invention is a block diagram of a Gilbert bias operation unit.
FIG. 6 is a block diagram of a Gilbert bias decision unit according to the present invention.
FIG. 7 is a diagram of an analog adder according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the following embodiments and accompanying drawings.
A millimeter wave broadband n-bit active phase shifter based on a III-V group compound semiconductor process is shown in a system block diagram of a figure 1 and comprises an input balun, an output balun, an orthogonal signal generator, an analog adder and a Gilbert bias operation unit, wherein the input balun converts a received single-ended input signal into a differential signal and inputs the differential signal into the orthogonal signal generator, the orthogonal signal generator converts the differential signal into four paths of I/Q orthogonal signals and inputs the four paths of I/Q orthogonal signals into an analog adder, the analog adder differentially synthesizes the four paths of I/Q orthogonal signals into signals and inputs the signals to the output balun, the output balun converts the differential signal into a single-ended output signal, the Gilbert bias operation unit comprises a bias decision unit and a numerical control current superposition unit, and the numerical control current superposition unit controls the turn-off state of a single-pole double-throw switch through an n-bit digital code of a digital logic circuit And further controlling superposition of the two paths of I/Q current to obtain I/Q current gain in a certain proportion, and inputting the I/Q current gain into a bias decision unit, wherein the bias decision unit is used for inputting the I/Q current gain into a tail current source of the analog adder and controlling the phase and gain of the four paths of I/Q orthogonal signal vectors after vector synthesis.
Example 1
A6-bit active phase shifter based on an indium phosphide double heterojunction bipolar transistor (InP DHBT) process comprises an input passive balun, an output passive balun, a quadrature signal generator (a two-stage adjustable active polyphase filter), an analog adder and a Gilbert bias operation unit; the Gilbert bias operation unit comprises a numerical control current superposition unit and a bias decision unit, and the bias decision unit comprises a CCVS unit, a VCCS unit and a bias current control unit.
Inputting a passive balun to realize the function of converting a single-ended signal into a differential signal and matching impedance; differential signal is through two-stage adjustable active gm-CbcThe orthogonal differential signal generator generates four paths of I/Q orthogonal signals;
the Gilbert bias operation unit comprises a numerical control current superposition unit and a bias decision unit, wherein the numerical control current superposition unit is formed by connecting 6 groups of current array units in parallel, each group of current array comprises two transistor arrays and a single-pole double-throw switch, one transistor array is used for current superposition of an I path, and the other transistor array is used for current superposition of a Q path; the digital logic circuit converts the 6-bit control code into an analog voltage signal, and the voltage signal controls the on-off state of a single-pole double-throw switch in the numerical control current superposition unit, so that the current gain of an I path or a Q path required by the synthesis of 6 groups of currents is controlled, and a certain I/Q current ratio is achieved; the CCVS unit converts the I/Q current output by the numerical control current superposition unit into corresponding voltage through an NPN transistor, then performs difference operation conversion on the voltage through the VCCS unit to obtain required current, the bias current control unit selectively transmits the current output by the VCCS unit to a tail current source of the analog adder, and controls the gain after four paths of I/Q orthogonal signal vectors are synthesized and a synthesis quadrant thereof;
the analog adder synthesizes the four paths of I/Q orthogonal signal vectors into differential signals, inputs the differential signals to the output balun, and converts the differential signals into single-ended signals through the output passive balun for output.
The input and output balun is realized by adopting a passive balun for design convenience, and the active balun can realize the same function.
Invention gm-CbcThe orthogonal differential signal generator with the PPF structure is provided with n stages of circuits, the structural block diagram of which is shown in figure 2, the first stage of circuit is taken as an example for simple introduction, the circuit structural diagram of which is shown in figure 3, and gm-CbcA network, the input ends 1 ', 2', 3 'and 4' of which are respectively connected with the balun output quadrature signal Vin+、Vin+、Vin-、Vin-The four output ends 1 ', 2', 3 'and 4' are respectively connected with four groups of inputs of the second-stage circuit; the second stage circuit is connected with the first stage circuit in a mode of outputting four paths of I/Q orthogonal signals.
Said g ism-CbcThe network comprises a junction capacitor CbcTransistor and transconductance gmA transistor; the emitter follower current source provides proper and stable quiescent current for the emitter of the transistor, and the bias circuit is connected with the collector of the transistor and is used for controlling the transconductance and the junction capacitance of the transistor; junction capacitor C of each stage circuitbcAnd transconductance gmA central frequency point can be determined, and the regulation and control of the frequency band range of the orthogonal signal generator can be realized by changing the junction capacitance and the transconductance.
Debugging required junction capacitance C in InP DHBT model basebcThe bias voltage of (g) is equal to 148fF, the bias voltage is 0.5V, and the transconductance of each stage is differentm1＝21mS、gm227mS, according to the formula
Determine the center frequency point w of its two stagescTherefore, the specific bandwidth of the 6-bit active phase shifter based on the indium phosphide double heterojunction bipolar transistor (InP DHBT) process is 20-30 GHz.
For gm-CbcThe simulation of the orthogonal differential signal generator with the PPF structure is shown in fig. 4. In 20 ^ eWithin the frequency range of 30GHz, the phase error of the quadrature signal output by the quadrature signal generator is within plus or minus 1 degree, and the amplitude error is within plus or minus 0.1 dB. The slight difference in amplitude is due to gmAnd CbcThere is some fluctuation in the value of (c), and the effect on the subsequent circuit is negligible. Thus, gm-CbcThe orthogonal differential signal generator with the PPF structure has the advantages of small phase error fluctuation range and good orthogonal effect.
FIG. 5 is a block diagram of a phase shift control module according to the prior art and the present invention, wherein (a) is a block diagram of an amplitude control module according to the prior CMOS process, the phase shift control module is designed based on a complementary metal-oxide-semiconductor transistor (CMOS) or a BiCMOS (Bipolar-CMOS) process, a current mirror uses a P-type transistor as a current reference, and a lower N-type transistor directly copies the current to an analog adder; (b) because transistors in the components of the invention all adopt III-V group compound semiconductor technology and are single transistors, current can be output to a pull-up circuit through the transistors and converted into base voltage output, meanwhile, a tail current control transistor of the Gilbert unit is positioned below the module, and the base voltage values of the two transistors are not at the same level and cannot be directly used, the invention innovatively provides the Gilbert bias operation unit to replace the function of a phase shift control module in the prior art, and the operation unit comprises a numerical control current superposition unit and a bias decision unit.
Taking an InP DHBT process 6-bit active phase shifter as an example, a numerical control current superposition unit is introduced. It is composed of 12 DHBT transistor arrays and 6 single-pole double-throw switches. The method specifically comprises the following steps: the two transistor arrays are 1 group, one transistor array is responsible for superposition of I-path current, and the other transistor array is responsible for superposition of Q-path current. Each group shares a single-pole double-throw switch, so that only I-path or Q-path current can be selected to be superposed and synthesized at each time. The 6 groups of transistor arrays and the DHBT tube as a current reference form a current mirror. Each transistor array is either kept different in transistor size or is formed by connecting several transistors in parallel to satisfy the requirement of reproducing the reference current in proportion. Meanwhile, in order to reduce the phase shift gain error, the voltage gain of the analog adder must be ensured to be constant, namely the sum of I + Q is keptAnd is not changed. The current superposition of the I/Q two-way transistor arrays is controlled by controlling the conducting states of the 6 switches, so that the tangent values of Q and I reach corresponding degrees in a quadrant, and 16 phase-shifting states are generated. Four quadrants are 2664 phase shift states are generated, namely the phase shift is stepped by 360 degrees/64 degrees to 5.625 degrees, and the phase shift precision of the phase shifter reaches 6 bits.
The block diagram of the bias decision unit is shown in fig. 6, and the bias decision unit is formed by sequentially connecting a CCVS unit, a VCCS unit, and a bias current control unit. The CCVS unit is used for transmitting the I/Q two-path current to bias voltage, the VCCS unit is used for transmitting the I/Q two-path voltage to current, and the bias current control unit is used for realizing amplitude control and quadrant selection of the current on the Gilbert unit. Because the transistors In the InP DHBT model base are all NPN transistors, the transistors cannot be directly copied to the analog adder In a current mirror structure through the complementary tube pull-down circuit. The invention provides a current transfer method, which comprises the following specific processes:
the CCVS unit is connected with a pull-up transistor above two paths of I/Q outputs of the numerical control current superposition unit respectively, and is provided with a resistor R0The emitter of the pull-up transistor is connected with the output current I of the numerical control current superposition unit for the collector bias circuit of the transistorbiasI、IbiasQCollector connecting resistor R0Base output voltage, resistor R0The other end of the power supply voltage VDD; I/Q two-path superposed current IbiasI、IbiasQControlling the base voltage V of two transistorsCCVSI、VCCVSQAnd using the voltage signal as a CCVS unit output signal; two paths of I/Q of the VCCS unit are connected in series by two transistors, the size and the collector bias circuit of one transistor are consistent with those of a pull-up transistor of the CCVS unit, and the base of the VCCS unit outputs a voltage V from the CCVS unitCCVSI、VCCVSQProviding, emitter current is respectively IceI、IceQRepresents; the other transistor is the same size as the transistor providing the current reference in the digitally controlled current superposition unit, and the base voltage is also the same, with the current being constant and represented by C. Two transistors are controlled by base voltage to make differential outputOutput I/Q current signal IVCCSI、IVCCSQ。
Taking the I-path signal as an example, the transmission relationship is described as follows:
the CCVS cell is represented by a transfer function: vCCVSI＝VDD-IbiasI×R0；
The VCCS cell is represented by a transfer function:
IVCCSI＝IceI-C，IVCCSIthe value range of (A) is 6-180 muA.
The bias current control unit controls the current I through a single-pole double-throw switchVCCSI、IVCCSQSelecting the positive and negative values of I/Q to determine the synthesis quadrant; the tail current source of the gilbert cell is controlled by a common emitter current source.
The block diagram of the analog adder is shown in fig. 7. The analog adder includes two Gilbert units, and its basic structure is formed from cascade-connected differential amplifiers formed from DHBT tubes, and the inputs of four differential amplifiers of the analog adder are quadrature differential signals V outputted by quadrature differential generator of previous stage circuitI+、VI-、VQ+、VQ-(ii) a Two paths of output current I of I/Q of VCCS unitI/QSelectively inputting the signals into a tail current source of a Gilbert unit differential amplifier under the control of a single-pole double-throw switch, controlling the quadrant of the synthesized signal, and outputting a vector synthesized differential signal Vout+、Vout-。
The method specifically comprises the following steps: two paths of differential amplifying circuits control signals of an I path, the other two paths of differential amplifying circuits control signals of a Q path, and then output currents generated by the I path and the Q path are synthesized into required output signals. By controlling the conducting state of the two single-pole double-throw switches, four different output states can be realized, namely the selection of four quadrants is realized. The Gilbert bias operation unit provides tail current, controls two paths of gains of the I/Q through the tail current, and finally outputs the voltage gain after I/Q vector synthesis.
While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.
Claims (10)
1. A broadband active phase shifter based on a III-V group compound semiconductor process comprises an input balun, an output balun, a quadrature signal generator, an analog adder and a Gilbert bias operation unit, wherein the input balun converts a received single-ended input signal into a differential signal and inputs the differential signal into the quadrature signal generator, the quadrature signal generator converts the differential signal into four paths of I/Q quadrature signals and inputs the four paths of I/Q quadrature signals into the analog adder, the analog adder synthesizes vectors of the four paths of I/Q quadrature signals into the differential signal and inputs the differential signal into the output balun, the output balun converts the differential signal into a single-ended output signal, the Gilbert bias operation unit comprises a bias decision unit and a numerical control current superposition unit, the numerical control current superposition unit controls the on-off state of a single-pole double-throw switch through an n-bit digital code to control the superposition of I/Q current, and obtaining I/Q current gain in a certain proportion, and inputting the I/Q current gain into a bias decision unit, wherein the bias decision unit is used for transmitting the I/Q current gain to a tail current source of the analog adder and controlling the phase and gain of the four paths of I/Q orthogonal signal vectors after vector synthesis.
2. The wideband active phase shifter as claimed in claim 1, wherein the digitally controlled current superposition unit is formed by connecting n sets of current matrix units in parallel, each set of current matrix includes two transistor arrays and a single-pole double-throw switch, one transistor array is used for current superposition of I-path and the other is used for current superposition of Q-path, and switching of the single-pole double-throw switch controls current gain of I-path or Q-path required by current composition of n sets.
3. The wideband active phase shifter of claim 2, wherein the transistor array is formed of transistors of different sizes or multiple transistors in parallel.
4. The wideband active phase shifter of claim 1, wherein the bias decision unit is formed by connecting a current control voltage unit, a voltage control current unit and a bias current control unit in series in sequence, the current control voltage unit converts a current gain output by the numerical control current superposition unit into a control voltage and inputs the control voltage to the voltage control current unit, the voltage control current unit converts the control voltage through difference operation to obtain a required I/Q current ratio and inputs the required I/Q current ratio to the bias current control unit, and the bias current control unit realizes quadrant selection through the switch module and controls tail current ratios of two paths I/Q of the analog adder according to the I/Q current ratio.
5. The wideband active phase shifter of claim 4, wherein the current control voltage unit comprises a pull-up transistor and a bias circuit, the bias circuit being a resistor R0The emitter of the pull-up transistor is connected with the output current of the numerical control current superposition unit, and the collector is connected with the bias resistor R0Base output voltage, resistor R0The other end of the power supply voltage VDD; the voltage control current unit is obtained by connecting two transistors in series, the size and the collector bias circuit of one transistor are consistent with those of a pull-up transistor of the current control voltage unit, namely the collector connecting resistor R of the transistor0The base electrode of the transistor is connected with the base electrode output voltage of the current control voltage unit, the emitter electrode of the transistor is connected with the collector electrode of the other transistor, the other transistor and the transistor which provides the current reference in the numerical control current superposition unit have the same size, and the base electrode voltage of the other transistor is also equal, namely the base electrode of the transistor is connected with the base electrode input voltage of the transistor which is used as the current reference, and the emitter electrode of the transistor is grounded.
6. The wideband active phase shifter of claim 4, wherein the quadrature signal generator is a multi-stage active transconductance-junction capacitive polyphase filter structure, the multi-stage havingThe source transconductance-junction capacitor multiphase filter structure consists of N stages of circuits, wherein each stage of circuit consists of gm-CbcNetwork formation of said gm-CbcThe network comprises a junction capacitor CbcTransistor and transconductance gmA transistor; gmTransistor, CbcThe emitter of the transistor is connected with an emitter follower current mirror to provide proper and stable quiescent current for the emitter of the transistor, and the collector of the transistor is connected with a bias circuit which is used for controlling transconductance and junction capacitance of the transistor.
7. The wideband active phase shifter of claim 6, wherein the transistor is tuned to have its collector reverse biased and emitter forward biased in the amplification region, where the desired transconductance is tuned; the base electrode and the emitting electrode of the transistor are in short circuit to form a diode, and the bias network of the diode is regulated to obtain the required junction capacitance; and the junction capacitor and the transconductance of each stage of circuit determine a central frequency point, and the junction capacitor and the transconductance are changed to realize the regulation and control of the frequency band range of the orthogonal signal generator.
8. The wideband active phase shifter as claimed in any one of claims 1 to 6, wherein all transistors are fabricated based on III-V compound semiconductor processes.
9. The wideband active phase shifter of claim 1, wherein the analog summer comprises two gilbert cells, the gilbert cell being formed by two differential amplifiers cascaded, and the inputs of the four differential amplifiers being quadrature differential signals V output from a quadrature differential generator of a previous stage circuitI+、VI-、VQ+、VQ-(ii) a Two paths of output currents I of voltage control current unit I/QI/QSelectively inputting the signals into a tail current source of a Gilbert unit differential amplifier under the control of a single-pole double-throw switch, controlling the quadrant of the synthesized signal, and outputting a vector synthesized differential signal Vout+、Vout-。
10. The wideband active phase shifter of claim 1, wherein the input balun and the output balun are active baluns or passive baluns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110664157.4A CN113452345B (en) | 2021-06-16 | 2021-06-16 | Broadband active phase shifter based on III-V group compound semiconductor process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110664157.4A CN113452345B (en) | 2021-06-16 | 2021-06-16 | Broadband active phase shifter based on III-V group compound semiconductor process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113452345A true CN113452345A (en) | 2021-09-28 |
| CN113452345B CN113452345B (en) | 2022-06-03 |
Family
ID=77811418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110664157.4A Active CN113452345B (en) | 2021-06-16 | 2021-06-16 | Broadband active phase shifter based on III-V group compound semiconductor process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113452345B (en) |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003273652A (en) * | 2002-03-14 | 2003-09-26 | Matsushita Electric Ind Co Ltd | Image rejection mixer apparatus |
| US20040196084A1 (en) * | 2003-01-21 | 2004-10-07 | Csem, Centre Suisse D'electronique Et De Microtechnique Sa | In phase quadrature and slaved working frequency signal generator |
| US20070241835A1 (en) * | 2006-03-30 | 2007-10-18 | National Sun Yat-Sen University | Active 90-degree phase shifter with LC-type emitter degeneration and quadrature modulator IC using the same |
| US7424281B1 (en) * | 2002-10-11 | 2008-09-09 | Maxim Integrated Products, Inc. | Image-rejection mixers having high linearity and high gain and RF circuits using the same |
| US20100327940A1 (en) * | 2009-06-26 | 2010-12-30 | William Richard Eisenstadt | Embedded phase noise measurement system |
| CN104767501A (en) * | 2015-05-06 | 2015-07-08 | 中国科学技术大学 | Six-bit 360-degree active phase shifter based on ultrahigh frequency RFID application |
| CN106778413A (en) * | 2016-12-05 | 2017-05-31 | 中国科学技术大学 | A kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID |
| CN107707217A (en) * | 2017-11-17 | 2018-02-16 | 西安电子科技大学 | The broadband of high dB gains becomes six active phase shifters of mutual conductance |
| WO2020135612A1 (en) * | 2018-12-26 | 2020-07-02 | 深圳市中兴微电子技术有限公司 | Vector synthesis phase shifter and vector synthesis phase shifting method |
| CN111726096A (en) * | 2020-05-29 | 2020-09-29 | 合肥工业大学 | Vector modulation phase shifter for reconfigurable antenna array beam forming |
| CN112104338A (en) * | 2020-07-22 | 2020-12-18 | 西安交通大学 | 7-bit high-precision broadband active phase shifter for radio frequency/millimeter wave frequency band and application |
-
2021
- 2021-06-16 CN CN202110664157.4A patent/CN113452345B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003273652A (en) * | 2002-03-14 | 2003-09-26 | Matsushita Electric Ind Co Ltd | Image rejection mixer apparatus |
| US7424281B1 (en) * | 2002-10-11 | 2008-09-09 | Maxim Integrated Products, Inc. | Image-rejection mixers having high linearity and high gain and RF circuits using the same |
| US20040196084A1 (en) * | 2003-01-21 | 2004-10-07 | Csem, Centre Suisse D'electronique Et De Microtechnique Sa | In phase quadrature and slaved working frequency signal generator |
| US20070241835A1 (en) * | 2006-03-30 | 2007-10-18 | National Sun Yat-Sen University | Active 90-degree phase shifter with LC-type emitter degeneration and quadrature modulator IC using the same |
| US20100327940A1 (en) * | 2009-06-26 | 2010-12-30 | William Richard Eisenstadt | Embedded phase noise measurement system |
| CN104767501A (en) * | 2015-05-06 | 2015-07-08 | 中国科学技术大学 | Six-bit 360-degree active phase shifter based on ultrahigh frequency RFID application |
| CN106778413A (en) * | 2016-12-05 | 2017-05-31 | 中国科学技术大学 | A kind of integrated simulation self-interference cancellation circuit for being applied to ultrahigh frequency RFID |
| CN107707217A (en) * | 2017-11-17 | 2018-02-16 | 西安电子科技大学 | The broadband of high dB gains becomes six active phase shifters of mutual conductance |
| WO2020135612A1 (en) * | 2018-12-26 | 2020-07-02 | 深圳市中兴微电子技术有限公司 | Vector synthesis phase shifter and vector synthesis phase shifting method |
| CN111371430A (en) * | 2018-12-26 | 2020-07-03 | 深圳市中兴微电子技术有限公司 | Vector synthesis phase shifter and vector synthesis phase shifting method |
| CN111726096A (en) * | 2020-05-29 | 2020-09-29 | 合肥工业大学 | Vector modulation phase shifter for reconfigurable antenna array beam forming |
| CN112104338A (en) * | 2020-07-22 | 2020-12-18 | 西安交通大学 | 7-bit high-precision broadband active phase shifter for radio frequency/millimeter wave frequency band and application |
Non-Patent Citations (6)
| Title |
|---|
| S. WANG: "A K-Band Variable-Gain Phase Shifter Based on Gilbert-Cell Vector Synthesizer With RC–RL Poly-Phase Filter", 《IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS》 * |
| S. WANG: "A K-Band Variable-Gain Phase Shifter Based on Gilbert-Cell Vector Synthesizer With RC–RL Poly-Phase Filter", 《IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS》, vol. 31, no. 4, 15 February 2021 (2021-02-15), pages 393 - 396, XP011848314, DOI: 10.1109/LMWC.2021.3056881 * |
| 袁刚: "一种基于0.13μm SiGe BiCMOS工艺的Ka波段宽带有源移相器", 《微电子学》 * |
| 袁刚: "一种基于0.13μm SiGe BiCMOS工艺的Ka波段宽带有源移相器", 《微电子学》, vol. 50, no. 5, 20 October 2020 (2020-10-20), pages 615 - 620 * |
| 陈昌铭: "一种新型X波段5bit本振移相器设计", 《复旦学报(自然科学版)》 * |
| 陈昌铭: "一种新型X波段5bit本振移相器设计", 《复旦学报(自然科学版)》, vol. 54, no. 2, 15 April 2015 (2015-04-15), pages 156 - 167 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113452345B (en) | 2022-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107707217B (en) | high-dB-gain broadband variable-transconductance six-bit active phase shifter | |
| CN107863949B (en) | X-band 5-phase shifter based on combination of active phase shifter and passive phase shifter | |
| US8724739B2 (en) | Variable phase shifter-attenuator | |
| US8116717B2 (en) | Self-calibrating direct conversion transmitter with converting/steering device | |
| CN110212887B (en) | Radio frequency active phase shifter structure | |
| CN112104338B (en) | 7-bit high-precision broadband active phase shifter for radio frequency/millimeter wave frequency band and application | |
| CN109687839B (en) | Active and passive mixed microwave phase shifter | |
| US9020457B2 (en) | Phased-array receiver for mm-wave applications | |
| CN111384902A (en) | Broadband receiver circuit with adjustable impedance matching frequency | |
| CN107749745B (en) | Variable gain amplifier | |
| CN112332806B (en) | High-gain low-noise radio frequency phase shifter | |
| US4461042A (en) | Transistor balanced mixer | |
| Karakuzulu et al. | Full D-band transmit–receive module for phased array systems in 130-nm SiGe BiCMOS | |
| CN111726096A (en) | Vector modulation phase shifter for reconfigurable antenna array beam forming | |
| Li et al. | An X-band 5-bit active phase shifter based on a novel vector-sum technique in 0.18μm SiGe BiCMOS | |
| CN112039493A (en) | Apparatus and method for vector modulator phase shifter | |
| WO2020135612A1 (en) | Vector synthesis phase shifter and vector synthesis phase shifting method | |
| Yao et al. | A 6-bit active phase shifter for Ku-band phased arrays | |
| CN114172467A (en) | Reconfigurable ultra-wideband high-precision variable gain amplifier core circuit | |
| CN113452345B (en) | Broadband active phase shifter based on III-V group compound semiconductor process | |
| WO2023116291A1 (en) | Vector synthesis structure for phase shifter | |
| Duan et al. | A 6-bit CMOS phase shifter with active balun and three-stage poly-phase filter for phased arrays | |
| CN110391795B (en) | On-chip analog multi-beam phase-shifting synthesizer | |
| US5410744A (en) | HF mixer stage having a common base circuit | |
| CN112787628A (en) | Ultra-wideband reconfigurable active phase shifter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |