CN106684100B - 一种阵列基板及其制作方法、显示装置 - Google Patents

一种阵列基板及其制作方法、显示装置 Download PDF

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CN106684100B
CN106684100B CN201710044594.XA CN201710044594A CN106684100B CN 106684100 B CN106684100 B CN 106684100B CN 201710044594 A CN201710044594 A CN 201710044594A CN 106684100 B CN106684100 B CN 106684100B
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array substrate
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metallic diaphragm
public electrode
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CN106684100A (zh
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袁剑峰
李东熙
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BOE Technology Group Co Ltd
Fuzhou BOE Optoelectronics Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1296Multistep manufacturing methods adapted to increase the uniformity of device parameters

Abstract

本发明公开了一种阵列基板及其制作方法、显示装置,涉及显示技术领域,解决了阵列基板远离背光源一面的非显示区涂覆的黑色油墨不能完全覆盖阵列基板靠近背光源一侧的公共电极走线区,使得公共电极走线区的栅极金属层裸露,出现环境光反射的情况,进而导致使用该阵列基板的无边框液晶显示器的周边外观效果较差的技术问题。该阵列基板包括衬底基板,衬底基板的非显示区设置有公共电极走线区,公共电极走线区包括金属膜层和非金属膜层,金属膜层为镂空结构。本发明中的阵列基板应用于无边框液晶显示器。

Description

一种阵列基板及其制作方法、显示装置
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法、显示装置。
背景技术
液晶显示器为一种平面薄型的显示设备,液晶显示器由于其具有机身薄、功耗低、辐射低和画面柔和等特点而得到快速的发展与普及。其中,为了实现液晶显示器的显示面积最大化,无边框液晶显示器的设计成为液晶显示器设计的未来发展方向。
如图1所示,在现有的无边框液晶显示器中,阵列基板1与彩膜基板2相对设置,阵列基板1设置在远离背光源的一侧,彩膜基板2设置在靠近背光源的一侧;其中,由于阵列基板1面向用户,因此需要在阵列基板1远离背光源一面的非显示区A涂覆有黑色油墨11以遮挡阵列基板上靠近背光源一面的多个功能区域,然而,在涂覆黑色油墨11时,会出现涂覆的偏差,导致涂覆的黑色油墨11不能完全覆盖阵列基板靠近背光源一面的公共电极走线区12(即Vcom走线区)。而现有的公共电极走线区一般包括层叠设置的栅极金属层、栅极绝缘层、有源层和源漏极金属层,其中,栅极金属层设置在阵列基板的衬底基板上,栅极绝缘层设置在栅极金属层上,有源层设置在栅极绝缘层上,源漏极金属层设置在有源层上,当涂覆的黑色油墨不能完全覆盖公共电极走线区时,就会使得公共电极走线区的栅极金属层裸露,出现环境光反射的情况,进而导致无边框液晶显示器的周边外观效果较差。
发明内容
本发明的目的在于提供一种阵列基板及其制作方法、显示装置,用于减小阵列基板上的环境光反射,提高无边框液晶显示器的周边外观效果。
为达到上述目的,本发明提供一种阵列基板,采用如下技术方案:
该阵列基板包括衬底基板,所述衬底基板的非显示区设置有公共电极走线区,所述公共电极走线区包括金属膜层和非金属膜层,所述金属膜层为镂空结构。
与现有技术相比,本发明提供的阵列基板具有以下有益效果:
在本发明提供的阵列基板中,衬底基板的非显示区设置有公共电极走线区,且公共电极走线区包括的金属膜层和非金属膜层中,金属膜层为镂空结构,这就使得将这种阵列基板应用于无边框液晶显示器,且阵列基板面向用户时,即使衬底基板的非显示区所涂覆的黑色油墨不能完全覆盖公共电极走线区,导致公共电极走线区的金属膜层出现裸露时,也能够通过镂空结构的金属膜层减小金属膜层上的环境光反射,从而提高了无边框液晶显示器的周边外观效果。
本发明还提供了一种阵列基板制作方法,采用如下技术方案:
该阵列基板制作方法包括:
提供一衬底基板;
在所述衬底基板的非显示区形成公共电极走线区,所述公共电极走线区包括金属膜层和非金属膜层;
通过构图工艺,使所述金属膜层为镂空结构。
与现有技术相比,本发明提供的阵列基板制作方法的有益效果与上述阵列基板的有益效果相同,故此处不再进行赘述。
本发明还提供了一种显示装置,该显示装置包括上述阵列基板。
与现有技术相比,本发明提供的显示装置的有益效果与上述阵列基板的有益效果相同,故此处不再进行赘述。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有的无边框液晶显示器的结构示意图;
图2为本发明实施例提供的阵列基板的结构示意图;
图3为本发明实施例提供的阵列基板的剖面结构示意图;
图4为本发明实施例提供的阵列基板具有公共电极走线区部分的剖面示意图;
图5为本发明实施例提供的阵列基板制作方法流程图。
附图标记说明:
1—阵列基板, 2—彩膜基板, A—非显示区,
11—黑色油墨, 12—公共电极走线区, 3—衬底基板,
121—金属膜层, 122—非金属膜层, 1221—绝缘层,
1222—半导体有源层。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
实施例一
本发明实施例提供一种阵列基板,具体地,如图2、图3和图4所示,该阵列基板包括衬底基板3,衬底基板3的非显示区A设置有公共电极走线区12,公共电极走线区12包括金属膜层121和非金属膜层122,金属膜层121为镂空结构。
在本发明实施例提供的阵列基板中,衬底基板3的非显示区A设置有公共电极走线区12,且公共电极走线区12包括的金属膜层121和非金属膜层122中,金属膜层121为镂空结构,这就使得将这种阵列基板应用于无边框液晶显示器,且阵列基板面向用户时,即使衬底基板3的非显示区A所涂覆的黑色油墨11不能完全覆盖公共电极走线区12,导致公共电极走线区12的金属膜层121出现裸露时,也能够通过镂空结构的金属膜层121减小金属膜层121上的环境光反射,从而提高了无边框液晶显示器的周边外观效果。
示例性地,如图4所示,非金属膜层122可设在衬底基板3的表面,而金属膜层121则设在非金属膜层122的表面,通过将非金属膜层122设置在金属膜层121与衬底基板3之间,非金属膜层122可以在一定程度上起到遮挡金属膜层121的作用,进而可以减少金属膜层121上的环境光反射,进一步提高该无边框液晶显示器的周边外观效果。
示例性地,如图4所示,金属膜层121为源漏极金属层,非金属膜层122包括绝缘层1221,以及用于遮挡源漏极金属层21的半导体有源层1222,绝缘层1221、半导体有源层1222、源漏极金属层21层叠设置;其中,绝缘层1221设在衬底基板3的表面,半导体有源层1222位于绝缘层21与源漏极金属层之间。
在本发明提供的阵列基板中,公共电极走线区12的金属膜层121为源漏极金属层,与现有技术相比,去掉了位于绝缘层1221与衬底基板3之间的栅极金属层,避免了金属膜层121直接裸露的情况发生,大大减少了公共电极走线区12中的金属膜层121上的环境光反射,从而进一步提高了使用该阵列基板的无边框液晶显示器的周边外观效果。
需要说明的是,原本位于栅极金属层上的公共电极走线,均可通过源漏极金属层实现,因此,去掉位于绝缘层1221与衬底基板3之间的栅极金属层并不会影响公共电极走线区功能的实现。
优选地,上述半导体有源层1222为非晶硅膜层,当半导体有源层1222为非晶硅膜层时,其所表现出的颜色一般为暗红色或者暗褐红色,从而使得使用非晶硅膜层的半导体有源层与现有的透明的半导体有源层相比,对金属膜层121的遮挡作用更强,从而进一步减少了金属膜层121上的环境光反射,减小了反射光的强度。
此外,本发明实施例中,优选半导体有源层的面积大于或等于源漏极金属层的面积,从而使得半导体有源层可以完全的遮挡源漏极金属层,以达到最好的遮挡效果,减少源漏极金属层上的环境光反射。
本发明实施例还提供一种显示装置,包括上述阵列基板。其中,显示装置包括的其他结构与现有技术相同,本领域技术人员可以基于现有技术进行设置,此处不再进行赘述。
可选地,上述显示装置可以为:无边框液晶显示器、液晶面板、电子纸、液晶电视、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。由于该显示装置包括上述阵列基板,因此,上述显示装置的有益效果与上述阵列基板的有益效果相同,故此处不再进行赘述。
实施例二
本发明实施例提供一种阵列基板制作方法,用于制作本发明实施例一种提供的阵列基板,具体地,如图5所示,该阵列基板制作方法包括:
步骤S1、提供一衬底基板。
示例性地,可提供一透明玻璃基板作为衬底基板。
步骤S2、在衬底基板的非显示区形成公共电极走线区,公共电极走线区包括金属膜层和非金属膜层。
示例性地,可在衬底基板的非显示区通过溅射、沉积等工艺形成包括金属膜层和非金属膜层的公共电极走线区。
步骤S3、通过构图工艺,使金属膜层为镂空结构。
示例性地,可通过刻蚀等构图工艺,使上述金属膜层为镂空结构。
在本实施例提供的阵列基板制作方法中,在衬底基板的非显示区形成包括金属膜层和非金属膜层的公共电极走线区之后,还通过构图工艺,时该金属膜层为镂空结构,这就使得将使用上述制作方法制成的阵列基板应用于无边框液晶显示器,且阵列基板面向用户时,即使衬底基板的非显示区所涂覆的黑色油墨不能完全覆盖公共电极走线区,导致公共电极走线区的金属膜层出现裸露时,也能够通过镂空结构的金属膜层减小金属膜层上的环境光反射,从而提高了无边框液晶显示器的周边外观效果。
示例性地,上述步骤S2中,在衬底基板的非显示区形成公共电极走线区包括:
在衬底基板的非显示区形成非金属膜层。
在非金属膜层的表面形成金属膜层。
示例性地,可在衬底基板的非显示区通过溅射、沉积等工艺依次形成非金属膜层和金属膜层。
通过先在衬底基板的非显示区形成非金属膜层,再在非金属膜层的表面形成金属膜层,可以使非金属膜层可以在一定程度上起到遮挡金属膜层的作用,进而减少金属膜层上的环境光反射。
示例性地,上述金属膜层可以为源漏极金属层,非金属膜层可包括绝缘层和半导体有源层,此时,上述步骤S2中,在衬底基板的非显示区形成公共电极走线区包括:
在衬底基板的非显示区形成绝缘层。
在绝缘层上形成半导体有源层。
在半导体有源层上形成源漏极金属层;其中,半导体有源层的面积大于或等于源漏极金属层的面积。
示例性地,可在衬底基板的非显示区通过溅射、沉积等工艺依次形成绝缘层、半导体有源层和源漏极金属层。
示例性地,上述半导体有源层为非晶硅膜层,当半导体有源层为非晶硅膜层时,其所表现出的颜色一般为暗红色或者暗褐红色,从而使得使用非晶硅膜层的半导体有源层与现有的透明的半导体有源层相比,对金属膜层的遮挡作用更强,从而进一步减少了金属膜层上的环境光反射,减小了反射光的强度。
与现有技术相比,本发明实施例中,在形成金属膜层时,只形成了源漏极金属层,未形成位于绝缘层与衬底基板之间的栅极金属层,这就避免了制成的阵列基板的金属膜层直接裸露的情况发生,大大减少了公共电极走线区中的金属膜层上的环境光反射,从而进一步提高了使用该制成的阵列基板的无边框液晶显示器的周边外观效果。
此外,当半导体有源层的面积大于或等于源漏极金属层的面积时,半导体有源层可以完全的遮挡源漏极金属层,从而可以达到最好的遮挡效果,减少了源漏极金属层上的环境光反射。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。

Claims (8)

1.一种阵列基板,包括衬底基板,其特征在于,所述衬底基板的非显示区设置有公共电极走线区,所述公共电极走线区包括金属膜层和非金属膜层,所述金属膜层为镂空结构;
所述金属膜层为源漏极金属层,所述非金属膜层包括绝缘层,以及用于遮挡所述源漏极金属层的半导体有源层,所述绝缘层、所述半导体有源层、所述源漏极金属层层叠设置;其中,所述绝缘层设在所述衬底基板的表面,所述半导体有源层位于所述绝缘层与所述源漏极金属层之间。
2.根据权利要求1所述的阵列基板,其特征在于,所述非金属膜层设在所述衬底基板的表面,所述金属膜层设在所述非金属膜层的表面。
3.根据权利要求1所述的阵列基板,其特征在于,所述半导体有源层为非晶硅膜层。
4.根据权利要求1所述的阵列基板,其特征在于,所述半导体有源层的面积大于或等于所述源漏极金属层的面积。
5.一种阵列基板制作方法,其特征在于,包括:
提供一衬底基板;
在所述衬底基板的非显示区形成公共电极走线区,所述公共电极走线区包括金属膜层和非金属膜层;
通过构图工艺,使所述金属膜层为镂空结构;
所述金属膜层为源漏极金属层,所述非金属膜层包括绝缘层和半导体有源层;
在所述衬底基板的非显示区形成公共电极走线区包括:
在所述衬底基板的非显示区形成所述绝缘层;
在所述绝缘层上形成所述半导体有源层;
在所述半导体有源层上形成所述源漏极金属层;其中,所述半导体有源层的面积大于或等于所述源漏极金属层的面积。
6.根据权利要求5所述的阵列基板制作方法,其特征在于,在所述衬底基板的非显示区形成公共电极走线区包括:
在所述衬底基板的非显示区形成非金属膜层;
在所述非金属膜层的表面形成金属膜层。
7.根据权利要求5所述的阵列基板制作方法,其特征在于,所述半导体有源层为非晶硅膜层。
8.一种显示装置,其特征在于,包括:如权利要求1~3任一项所述的阵列基板。
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