CN106653589A - 高压低热预算高k后退火工艺 - Google Patents

高压低热预算高k后退火工艺 Download PDF

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CN106653589A
CN106653589A CN201611167792.7A CN201611167792A CN106653589A CN 106653589 A CN106653589 A CN 106653589A CN 201611167792 A CN201611167792 A CN 201611167792A CN 106653589 A CN106653589 A CN 106653589A
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annealing process
substrate
insulating barrier
pressure
layer
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温振平
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Priority to CN201611167792.7A priority Critical patent/CN106653589A/zh
Priority to US15/429,191 priority patent/US10002766B1/en
Priority to US15/429,194 priority patent/US10084086B2/en
Publication of CN106653589A publication Critical patent/CN106653589A/zh
Priority to US16/057,829 priority patent/US10727341B2/en
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Abstract

提供了一种通过加入增强型退火工艺来制造高k/金属栅极半导体器件的方法。根据本公开内容的增强型退火工艺可在相对较低的温度和高压下进行，由此可改善k值并修复HK层的上述缺陷。在根据本公开内容的增强型退火工艺下，H+由于高压而能够从氨气中扩散并修复断裂键，同时又由于低温而避免了不利地影响NiSi以及HK层中注入的离子。根据本公开内容的增强型退火工艺在一些实施例中可在300℃到500℃之间在15‑20个大气压的压力下执行15到50分钟。

Description

高压低热预算高K后退火工艺
技术领域
本发明涉及半导体工艺与器件。
背景技术
自从早年德州仪器的Jack Kilby博士发明了集成电路之时起，科学家们和工程师们已经在半导体器件和工艺方面作出了众多发明和改进。近50年来，半导体尺寸已经有了明显的降低，这转化成不断增长的处理速度和不断降低的功耗。迄今为止，半导体的发展大致遵循着摩尔定律，摩尔定律大致是说密集集成电路中晶体管的数量约每两年翻倍。现在，半导体工艺正在朝着20nm以下发展，其中一些公司正在着手14nm工艺。这里仅提供一个参考，一个硅原子约为0.2nm，这意味着通过20nm工艺制造出的两个独立组件之间的距离仅仅约为一百个硅原子。
半导体器件制造因此变得越来越具有挑战性，并且朝着物理上可能的极限推进。华力微电子有限公司TM是致力于半导体器件和工艺研发的领先的半导体制造公司之一。
在制造典型栅极尺寸小于50nm的晶体管时，所谓的“高k/金属栅极”(HKMG)技术已经普及。根据HKMG制造工艺流程，包括在栅电极中的绝缘层由高k材料构成。这与常规的氧化物/多晶硅(poly/SiON)方法相反，在常规的氧化物/多晶硅方法中，栅电极绝缘层通常由氧化物构成，在基于硅的器件情况下优选二氧化硅或氮氧化硅。典型的HKMG叠层结构可包含基于氧化硅的界面层(IL)、高k(HK)电介质、继之以金属栅电极。基于铪的电介质(特别是HfO2)是当前CMOS技术中最广泛使用的高k电介质，且通常沉积在IL的顶端，IL的主要作用是为与Si的界面提供良好电气质量。一般采用亚纳米的化学氧化物(SiOx)或氮氧化物(SiON)层作为IL。
目前，有两种不同的方法在半导体制造工艺流程中实现HKMG。第一种方法称为栅极-首先，制造工艺流程类似于传统poly/SiON方法过程中采取的流程。首先形成栅电极，包括高k电介质膜和功函数金属膜，继之以后续的晶体管制造阶段，例如，源极区域和漏极区域的限定、部分衬底表面的硅化、金属化等等。另一方面，根据也称之为栅极-最后或替代栅极的第二种方案，在存在牺牲虚栅极的情况下执行各个制造阶段，诸如掺杂剂离子注入、源极区域和漏极区域形成以及衬底硅化。该虚栅极在高温源极/漏极成型以及所有硅化物退火周期都已执行之后由真实的栅极替代。
发明内容
以下给出一个或多个方面的简要概述以提供对这些方面的基本理解。此概述不是所有构想到的方面的详尽综览，并且既非旨在指认出所有方面的关键性或决定性要素亦非试图界定任何或所有方面的范围。其唯一的目的是要以简化形式给出一个或多个方面的一些概念以为稍后给出的更加详细的描述之序。
根据本发明的一方面，提供了一种用于制造半导体器件的方法，该方法包括：形成衬底，所述衬底包括硅材料；使用氢化合物清洁所述衬底的上表面；在所述衬底上形成绝缘层，所述绝缘层包括形成于所述衬底的上表面上的界面层，以及形成于所述界面层上的高k介电层，所述高k介电层包括氧化铪HfO2；以及在形成所述绝缘层之后用氮气对所述绝缘层执行退火工艺，其中所述退火工艺是在300℃至500℃之间的温度及高于15个大气压的压力下执行的。
附图说明
图1示出了含有根据本公开的增强型退火工艺的制造工艺可以在衬底顶部上形成高k绝缘层来开始。
图2示出了包含在该制造工艺中的增强型退火工艺的示例。
图3示出了由于根据本公开的退火工艺的相对较高压力所导致的H+扩散效果。
参照以下附图，可实现对各个实施例的本质和优点的进一步理解。在附图中，类似组件或特征可具有相同的附图标记。此外，相同类型的各个组件可通过在附图标记后跟随破折号以及在类似组件间进行区分的副标记来区分。如果在说明书中仅使用第一附图标记，则该描述适用于具有相同第一附图标记的任何一个类似组件而不管副附图标记。
具体实施方式
本公开内容涉及用于半导体的高k/金属栅极(HKMG)叠层的制造，尤其涉及降低该HKMG叠层形成之后O2向IL中的扩散。
给出以下描述以使得本领域技术人员能够实施和使用本发明并将其结合到具体应用背景中。各种变型、以及在不同应用中的各种使用对于本领域技术人员将是容易显见的，并且本文定义的一般性原理可适用于较宽范围的实施例。由此，本发明并不限于本文中给出的实施例，而是应被授予与本文中公开的原理和新颖性特征相一致的最广义的范围。
在以下详细描述中，阐述了许多特定细节以提供对本发明的更透彻理解。然而，对于本领域技术人员显而易见的是，本发明的实践可不必局限于这些具体细节。换言之，公知的结构和器件以框图形式示出而没有详细显示，以避免模糊本发明。
请读者注意与本说明书同时提交的且对公众查阅本说明书开放的所有文件及文献，且所有这样的文件及文献的内容以参考方式并入本文。除非另有明确说明，否则本说明书(包含任何所附权利要求、摘要和附图)中所揭示的所有特征皆可由用于达到相同、等效或类似目的的可替代特征来替换。因此，除非另有明确说明，否则所公开的每一个特征仅是一系列常规等效或类似特征的一个示例。
而且，权利要求中未明确表示用于执行特定功能的装置、或用于执行特定功能的步骤的任意组件皆不应被理解为如35USC第112章节第6段中所规定的装置或步骤条款。特别地，在本文的权利要求中使用“….的步骤”或“….的动作”并不表示涉及35USC第112章第6段的规定。
注意，在使用到的情况下，标志左、右、前、后、顶、底、正、反、顺时针和逆时针仅仅是出于方便的目的所使用的，而并不暗示任何具体的固定方向。事实上，它们被用于反映对象的各个部分之间的相对位置和/或方向。
由于高k栅极介电层(HK层)主要包括没有固定的原子配位的金属离子氧化物(例如，HfO2)，所以HK层往往具有断裂悬空键。这会影响HK层的稳定性，进而影响k值。通常，高k栅极叠层的可靠性可使用约1000°C高温下的掺杂剂活化退火来改善。这可以通过在超过1000℃的温度下用氨穿透栅极氧化物的氮化氧化物工艺来实现。
氨退火是一种流行的后续高k退火工艺，因为氨气(NH3)中的N离子在高温下能够扩散到HK层中以修复断裂键或缺失键，使得HK层的结构能够成为Hf-O-N结构而得到改善。以此方式，氨退火使得HK层中的HfO2更加稳定并且也提高了k值。
然而，一旦已经开始高温反应，就难以控制加入到HK层中的氮的浓度。在高温退火过程中，高温可能不利地影响NiSi以及HK层中注入的离子。这是因为高温可能导致NiSi低电阻转变为NiSi高电阻。此效应进而可能导致接触电阻升高。而且，高温可能导致注入的离子扩散并从而导致漏电。
本公开内容致力于解决上述提到的目前的高温退火问题。本公开内容的一方面是一种通过加入增强型退火工艺来制造高k/金属栅极半导体器件的方法。根据本公开内容的增强型退火工艺可在相对较低的温度和高压下进行，由此可改善k值并修复HK层的上述缺陷。在根据本公开内容的增强型退火工艺下，H+由于高压而能够从氨气中扩散并修复断裂键，同时又由于低温而避免了不利地影响NiSi以及HK层中注入的离子。根据本公开内容的增强型退火工艺因此能够得到优异的电气器件性能、机械稳定性和高可靠性。
本公开内容的附加的方面以及其他特征将在以下说明书中陈述，且在本领域普通技术人员分析了以下内容后将部分地变得显而易见，或可从本公开内容的实施中获知。本公开内容的优点可特别如在所附权利要求中所指出地那样实现和获得。
根据本公开内容，一些技术效果可部分地通过一种制造半导体器件的方法来达成，该方法包括：通过在衬底上形成绝缘层来形成高k/金属栅极叠层，以及执行相对(相比于现有技术)高压和低温退火工艺来改善该绝缘层。在一个实施例中，该绝缘层可包括诸如HfO2之类的高k介电材料。
图1-3示出了用于制造具有超薄电容器介电层的电容器的工艺的一些方面，该工艺加入了根据本公开内容的增强型退火工艺。这些示图是半图解形式的，并且不成比例，特别是一些尺寸为了呈现清楚而在图中被放大显示。类似地，尽管示图中的视角为了描述方便一般表示近似的方向，但示图中的这种描绘方式是任意的。一般而言，集成电路可以在任何方向上操作。集成电路的设计和构成中的许多步骤是众所周知的，所以为了简洁起见，许多常规步骤在本文中将仅是简略地提及或者将完全省略而不提供这些众所周知的工艺细节。此外注意，集成电路包括不同数目的组件，图中所示的单个组件可以代表多个组件。
现在转到图1，图1示出了加入了根据本公开内容的增强型退火工艺的制造工艺可以在衬底102的顶部上形成高k绝缘层104来开始。衬底102可以是例如半导体工业中常用的硅材料，例如相对较纯的硅以及混合了诸如锗、碳等其他元素的硅。替换地，该半导体材料可以是锗、砷化镓等。该半导体材料可以被提供为块半导体衬底，或者可以被提供在绝缘体上硅(SOI)衬底上，SOI衬底包括支撑衬底、该支撑衬底上的绝缘体层、以及该绝缘体层上的硅材料层。此外，衬底102可以是绝缘体上硅(SOI)。在一些示例中，衬底102可包括掺杂外延(epi)层。在其他示例中，衬底102可包括多层化合物半导体结构。
在各种实施例中，衬底102可取决于设计要求包括各种掺杂区域(例如，p型阱或n型阱)。这些掺杂区域可以掺杂有p型掺杂剂，诸如硼或BF2，和/或n型掺杂剂，诸如磷或砷。这些掺杂区域可以P阱结构、以N阱结构、以双阱结构、或者使用凸起结构直接形成在衬底102上。该半导体衬底102还可包括各种有源区域，诸如配置用于N型金属氧化物半导体晶体管器件(称为NMOS)的区域和配置用于P型金属氧化物半导体晶体管器件(称为PMOS)的区域。例如，衬底102可具有形成用于限定源极区域和漏极区域的掺杂区域和外延层。
如图所示，绝缘层104可形成在衬底102的顶部上。层104可包括氧化硅、氮氧化硅、氮化硅、原位蒸气玻璃(ISSG)、旋涂玻璃(SOG)、氟硅玻璃(FSG)、掺碳氧化硅、BLACK(来自加利福尼亚圣克拉拉的应用材料公司)、Xerogel、Aerogel、无定形氟化碳、Parlyene、BCB(bis-benzocyclobutenes)、SILKTM(来自密歇根州米德兰的陶氏化学公司)、聚酰亚胺、其他合适的介电材料、或其组合。在一些实施例中，层104可包括高k材料，诸如HfOx。在这些实施例中，为了在层104中生长高k材料，可使用通过熔炉的快速热氧化工艺。层104的厚度范围可以介于0.8和2.0nm之间或者任何其他所期望的范围。层104在一些实施例中可能被表征为“超薄”，但这并不一定是唯一的情形
在一些示例中，如图1中的层104的放大视图所示，层104可包括在衬底102的上表面顶部上的SiOx层或界面层(IL)108以及在IL 108的顶部上的HK层106。IL 108可包括诸如氮化硅之类的材料，或其他合适的材料，例如氮氧化硅。在一些实现中，IL 108可通过氧化通常含有Si的衬底102以获得SiOx来生长。在各种实施例中，IL 108可通过任何合适的工艺来形成，诸如化学气相沉积(CVD)、原子层沉积(ALD)、低压CVD(PCVD)、热氧化、或者本领域已知的用于形成IL 108的任何其他合适的工艺。在一些实现中，可例如使用H2SO4与H2O2的混合物对衬底102执行清洁工艺以移除衬底102的上表面上的有机物。
在一些实施例中，可使用上述的热氧化工艺来生长HK层106。HK层106中的高k材料可包括介电常数“k”高于10的材料。各种实施例中使用的高k材料的示例可包括氧化钽(Ta2O5)、氧化锶钛(SrTiO3)、氧化铪(HfO2)、氧化铪硅(HfSiO)、氧化锆(ZrO2)等。
在形成绝缘层104之后，该制造工艺可行进至将层104中的高k材料退火。图2示出了包含在该制造工艺中的增强型退火工艺的示例。如图所示，在形成绝缘层104之后，绝缘层104可通过根据本公开内容的增强型退火工艺暴露于氮气202。氮气202的成份可包括75％的氦和25％的氮。气体202的等离子体氮浓度可在10％至25％之间变化，通过氦提供平衡。在一些实现中，可将氮源引入到等离子体中以形成含氮等离子体。在这些实现中，氮源可包括从由N2,NH3,NO,N2O及其混合物组成的组中选出的材料。根据本公开内容的增强型退火工艺在一些实施例中可在300℃到500℃之间在15-20个大气压的压力下执行15到50分钟。
图3示出了由于根据本公开的退火工艺的相对较高压力所导致的H+扩散效果。如图所示，在根据本公开内容的退火工艺的相对高压下，例如相比于通常在环境大气下操作的常规退火工艺，在大于15个大气压下，来自气体202的H+302可迅速扩散到绝缘层104中的HK层106与IL 108之间的界面、以及IL 108与衬底102之间的界面中。H+302的这种扩散可有助于修复IL 108(例如SiO2且超薄)中的断裂键，有效地降低IL 108的密度并由此改善NBTI。另一方面，在相对较低的温度下，例如相比于在700-750℃下操作的常规退火工艺，在例如300-500℃下，根据本公开内容的增强型退火工艺不会不利地影响NiSi生长和/或层104中注入的离子。
在一些实现中，根据本公开内容的增强型退火工艺可包括两个分开的步骤。在这些实现中，第一步可包括在相对较低的温度下，例如在300-500°C下对高k材料进行氨退火。第二步可包括在相对较低的温度下，例如在300-500℃下对该高k材料进行氢(例如，H2)烘焙。在一些实现中，氨退火可包括在高压下(例如，15至20个大气压之间)通过激光的快速热退火(RTA)、或者常规RTA与激光RTA的组合。在一个实施例中，该增强型退火工艺在15至20个大气压之间的压力下在400℃
如贯穿本申请的各个部分所解释的，本发明的实施例相比于现有技术和方法可提供许多优点。应领会，本发明的各实施例与现有系统和工艺相兼容。例如，根据本发明的实施例所描述的成型腔可使用现有装备来制造。根据本发明的实施例的成型腔可易于用来制造诸如CMOS、PMOS、NMOS等各种类型的器件。
尽管上文是对特定实施例的全面描述，但是也可使用各种变型、替换构造和等效方案。除了上述内容之外，还存在其他的实施例。因此，上述描述和说明不应当被解释为限制由所附权利要求限定的本发明的范围。

Claims (9)

1.一种用于制造半导体器件的方法，所述方法包括：
形成衬底，所述衬底包括硅材料；
使用氢化合物清洁所述衬底的上表面；
在所述衬底上形成绝缘层，所述绝缘层包括：
形成于所述衬底的上表面上的界面层，以及
形成于所述界面层上的高k介电层，所述高k介电层包括氧化铪HfO2；以及
在形成所述绝缘层之后用氮气对所述绝缘层执行退火工艺，其中所述退火工艺是在300℃至500℃之间的温度及高于15个大气压的压力下执行的。
2.如权利要求1所述的方法，其特征在于，所述退火工艺中使用的所述氮气包括氨NH3。
3.如权利要求1所述的方法，其特征在于，所述退火工艺操作达10至50分钟的时间段。
4.如权利要求1所述的方法，其特征在于，所述退火工艺在15至20个大气压之间的压力下操作。
5.如权利要求1所述的方法，其特征在于，所述退火工艺在400℃的温度下操作30分钟。
6.如权利要求1所述的方法，其特征在于，还包括在300℃至500℃之间的温度下烘焙所述绝缘层。
7.如权利要求1所述的方法，其特征在于，所述退火工艺包括通过激光的快速热退火RTA。
8.如权利要求1所述的方法，其特征在于，所述退火工艺包括常规RTA与激光RTA的组合。
9.如权利要求1所述的方法，其特征在于，所述氢化合物包括H2SO4和H2O2。
CN201611167792.7A 2016-12-16 2016-12-16 高压低热预算高k后退火工艺 Pending CN106653589A (zh)

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