CN106653585A - Triode one-side N+ diffusion layer diffusion process - Google Patents
Triode one-side N+ diffusion layer diffusion process Download PDFInfo
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- CN106653585A CN106653585A CN201610957522.XA CN201610957522A CN106653585A CN 106653585 A CN106653585 A CN 106653585A CN 201610957522 A CN201610957522 A CN 201610957522A CN 106653585 A CN106653585 A CN 106653585A
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 83
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 61
- 239000010703 silicon Substances 0.000 claims abstract description 61
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 61
- 238000000034 method Methods 0.000 claims abstract description 27
- 230000000873 masking effect Effects 0.000 claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 239000012535 impurity Substances 0.000 claims abstract description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 21
- 239000001301 oxygen Substances 0.000 claims description 21
- 229910052760 oxygen Inorganic materials 0.000 claims description 21
- 238000001035 drying Methods 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 14
- 230000003647 oxidation Effects 0.000 claims description 12
- 238000007254 oxidation reaction Methods 0.000 claims description 12
- 238000012360 testing method Methods 0.000 claims description 12
- 238000005260 corrosion Methods 0.000 claims description 10
- 230000007797 corrosion Effects 0.000 claims description 10
- 239000007788 liquid Substances 0.000 claims description 8
- 238000004140 cleaning Methods 0.000 claims description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 5
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- 239000003292 glue Substances 0.000 claims description 5
- 229910000838 Al alloy Inorganic materials 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 238000001704 evaporation Methods 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 claims description 4
- 238000003892 spreading Methods 0.000 claims description 3
- 238000010792 warming Methods 0.000 claims description 3
- 230000003628 erosive effect Effects 0.000 claims 1
- 238000007689 inspection Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 9
- 239000002994 raw material Substances 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 239000010453 quartz Substances 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- 239000013078 crystal Substances 0.000 description 6
- 238000004528 spin coating Methods 0.000 description 6
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 4
- 238000007654 immersion Methods 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 4
- 238000011161 development Methods 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910019213 POCl3 Inorganic materials 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000003708 ampul Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000002242 deionisation method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000011068 loading method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 235000011149 sulphuric acid Nutrition 0.000 description 2
- 239000001117 sulphuric acid Substances 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention belongs to the technical field of a semiconductor and especially relates to a triode one-side N+ diffusion layer diffusion process. The process comprises the following steps: 1, forming a double-side oxide layer by oxidizing a silicon wafer through steam; 2, corroding the oxide layer in a one-side mode; 3, performing pre-diffusion on a diffusion impurity source so as to form a pre-diffusion layer; and 4, performing re-diffusion, and carrying out junction depth advancing for certain time at a certain temperature so as to obtain a product. According to the triode one-side N+ diffusion layer diffusion process, a masking layer preventing diffusion is formed at one side of the silicon wafer, substrate diffusion is performed only at the other side of the silicon wafer, in terms of the thickness of a raw material, a quite thin silicon wafer can also be selected, and thus the production and manufacturing cost is reduced.
Description
Technical field
The invention belongs to technical field of semiconductors, more particularly to a kind of audion one side N+The technique side of diffusion layer diffusion
Method.
Background technology
Need to spread through substrate in operation manufacture before triode chip at present, section is formed for N+-N--N+Structure
Layer.And audion makes, one side N of chip is only needed+Layer, another side N+Layer need to remove, and typically by thinning, polishing, remove one side
N+Layer, so as to realize N+-N-Making.In the method manufacture, silicon wafer is typically thicker 450-550 μm, causes the increasing of cost
Plus.
The content of the invention
The present invention technical purpose be for need in above-mentioned substrate processing it is thinning, polish away one side N+The problem of layer,
A kind of problem for causing cost to increase, there is provided audion one side N+The process of diffusion layer diffusion.
The technical scheme for realizing the object of the invention is：
A kind of audion one side N+The process of diffusion layer diffusion, the process include：
Step one, steam oxidation silicon chip form two sides oxide layer；
Step 2, single-sided corrosion oxide layer；
Step 3, prediffusion, diffusion impurity source form prediffusion layer；
Step 4, then spread, junction depth propulsion certain hour is carried out at a certain temperature, obtains product.
Specifically, the two sides oxide layer that the steam oxidation silicon chip is formed, is simultaneously protected using photoresist, is removed by corrosion
The oxide layer of another side is gone, oxide layer simultaneously is used as the masking layer for preventing diffusion.
Further, the thickness of the silicon chip is 200-300 μm.
Specifically, the steam oxidation silicon chip of the step one, carries out Chemical cleaning including by silicon chip to be oxidized, dries,
Drying；Silicon chip after drying is warming up to after uniform temperature under pure dry oxygen atmosphere, wet oxygen certain hour is passed through, dry oxygen is certain
Time, cooling check oxidated layer thickness.
Preferably, oxidated layer thickness d >=1.2 μm.
Further, the single-sided corrosion oxide layer of the step 2 is that, by silicon chip one side glue, front baking, exposure, development are hard
Film, and corrode in being put into corrosive liquid.
Preferably, the corrosive liquid is ammonium fluoride: Fluohydric acid.: the solution of deionized water=1.5g: 1ml: 3.5ml.
Specifically, the uniform temperature for spreading again of the step 4 is 1250 ± 20 DEG C, and junction depth propulsion certain hour is 150
±10h。
Present invention additionally comprises a kind of manufacture method of chip, using above-mentioned audion one side N+The technique of diffusion layer diffusion
Method, and base diffusion is carried out, launch site photoetching, phosphorus diffusion, mesa recess photoetching, mesa etch, mesa passivation, fairlead light
Carve, middle test, evaporation of aluminum, photoetching are anti-carved, aluminium alloy, back face metalization, back side alloy, and carry out die testing.
The invention has the beneficial effects as follows：The pole pipe one side N of the present invention+The process of diffusion layer diffusion, the one of silicon chip
Face forms the masking layer for preventing diffusion, substrate diffusion is only carried out in the another side of silicon chip, and masking layer thickness of thin is easily removed, made
The optional relatively thin silicon wafer of material stock thickness is obtained, so as to reduce manufacturing cost.
Description of the drawings
Fig. 1 is N-type single-chip；
Fig. 2 is N in prior art+-N--N+Sectional structure chart；
Fig. 3 is N in the present invention+-N-Sectional structure chart.
Wherein, 1- masking layers.
Specific embodiment
The present invention is further illustrated below by way of specific example.
Embodiment 1
A kind of audion one side N+The process of diffusion layer diffusion, the process include：
Step one, steam oxidation silicon chip form two sides oxide layer；
Step 2, single-sided corrosion oxide layer；
Step 3, prediffusion, diffusion impurity source form prediffusion layer；
Step 4, then spread, junction depth propulsion certain hour is carried out at a certain temperature, obtains product.
It is the core content of the present invention above, the masking layer for preventing diffusion is formed in the one side of silicon chip, substrate is only spread
Carry out in the another side of silicon chip.As shown in figure 3, for the present invention audion one side N+Diffusion layer sectional structure chart, can from figure
To find out, masking layer 1 is defined in the one side of silicon chip, another side forms N+Diffusion layer, material stock thickness also optional relatively thin silicon
Chip, so as to reduce manufacturing cost.As shown in Fig. 2 audion forms N in prior art+Diffusion layer structural representation,
As can be seen from the figure form two-layer diffusion layer.
Specifically, the two sides oxide layer that the steam oxidation silicon chip is formed, is simultaneously protected using photoresist, is removed by corrosion
The oxide layer of another side is gone, oxide layer simultaneously is used as the masking layer for preventing diffusion.
Further, the thickness of the silicon chip is 200-300 μm.
Specifically, the steam oxidation silicon chip of the step one, carries out Chemical cleaning including by silicon chip to be oxidized, dries,
Drying；Silicon chip after drying is warming up to after uniform temperature under pure dry oxygen atmosphere, wet oxygen certain hour is passed through, dry oxygen is certain
Time, cooling check oxidated layer thickness.
Preferably, oxidated layer thickness d >=1.2 μm.
Preferably, the single-sided corrosion oxide layer of the step 2 is, silicon chip one side glue, front baking, exposure are developed,
Post bake, and corrode in being put into corrosive liquid.
Preferably, the corrosive liquid is ammonium fluoride: Fluohydric acid.: the solution of deionized water=1.5g: 1ml: 3.5ml.
Used as preferential, the uniform temperature for spreading again of the step 4 is 1250 ± 20 DEG C, and junction depth propulsion certain hour is
150±10h。
Embodiment 2
A kind of audion one side N+The process of diffusion layer diffusion,
Raw material：As shown in figure 1, N-type single-chip, ρ：40～45 Ω cm, piece are thick：255～265 μm；
Step one, oxidation：
Silicon chip to be oxidized is carried out Chemical cleaning by a, is dried, drying.
B is inserted in the silicon chip after drying on quartz boat, and quartz boat is pushed in the flat-temperature zone of diffusion furnace, leads in diffusion furnace
Enter the pure dry oxygen of 4L/min.
C opens diffusion furnace, is heated up, was raised to T=1150 ± 20 DEG C with 5 hours.
D when temperature reach T and it is constant after, dry oxygen is changed to into wet oxygen, flow 2L/min, and calculate logical wet oxygen time, t=4
±0.5h.After then, then the pure dry oxygen that wet oxygen is changed to 4L/min.Time t=2 ± 0.5h
E then starts cooling afterwards, drops to less than 600 DEG C with 6 ± 1h, and the quartz boat that will be equipped with silicon single crystal flake is pulled out, by silicon
Single-chip removes lower loading horse, to be tested.
F checks oxidated layer thickness：Require d >=1.2 μm.
Step 2, the protection of front masking layer, remove backside oxide layer.
A fronts spin coating (ultraviolet negative photoresist), rotating speed 5000rpm, spin coating time 40sec.
B front bakings：The silicon chip of even good glue is sent into into 100 DEG C of baking ovens, and 30 ± 5min of timing, is then taken out afterwards, it is to be exposed.
C exposes：The front of spin coating is sent into litho machine carries out uv-exposure, time of exposure 10-20sec.
D develops：To be developed in silicon chip immersion negative photo developer solution after exposure.10 ± 2min of immersion, after taking-up
Dry.
E post bakes：Silicon chip after development is put into into 30-40min in 140 ± 5 DEG C of baking ovens.
F corrodes：Silicon chip after post bake is put into into ammonium fluoride: hydrogen fluorine:：The solution of deionized water=1.5g: 1ml: 3.5ml
In, abbreviation BOE.Remove backside oxide layer, 8 ± 2min of time.
Silicon chip after corrosion is put into sulphuric acid by g：Hydrogen peroxide=1: stripping photoresist in 4.After by silicon chip extracting, deionization is used
Water is rinsed more than 15 times.
Step 3, backing substrate prediffusion
The silicon chip of step 3 is carried out Chemical cleaning by a, is loaded in quartz boat, is carried out substrate prediffusion, lead to after drying, drying
Enter the pure nitrogen of 4L/min.
B opens diffusion furnace, is heated up, and constant temperature T=1150 ± 20 DEG C, time t=3 ± 0.5h.
C is by diffusion impurity source (generally liquid POCl3) be carried along in diffusion furnace quartz ampoule by low discharge nitrogen,
Silicon chip back side forms prediffusion layer
After d time t are arrived, less than 600 DEG C are cooled to, the quartz boat that will be equipped with silicon single crystal flake is pulled out, and silicon single crystal flake is gone down
Load horse, it is to be tested.
E detects Rs=0.23-0.25.
Step 4, spread again
Spread again, in temperature T=1250 ± 20 DEG C or so, junction depth advances certain hour t=150 ± 10h, formation
Product is as shown in Figure 3.
Detection junction depth：It is required that depth is 180-190 μm.
Embodiment 3
Present invention additionally comprises a kind of manufacture method of chip, using above-mentioned audion one side N+The technique of diffusion layer diffusion
Method, and base diffusion is carried out, launch site photoetching, phosphorus diffusion, mesa recess photoetching, mesa etch, mesa passivation, fairlead light
Carve, middle test, evaporation of aluminum, photoetching are anti-carved, aluminium alloy, back face metalization, back side alloy, and carry out die testing.
It is below 13003 chip manufacturings, early stage audion one side N+The process and 2 phase of embodiment of diffusion layer diffusion
Together, i.e. raw material：As shown in figure 1, N-type single-chip, ρ：40～45 Ω cm, piece are thick：255～265 μm；Step one, oxidation：
Silicon chip to be oxidized is carried out Chemical cleaning by a, is dried, drying.
B is inserted in the silicon chip after drying on quartz boat, and quartz boat is pushed in the flat-temperature zone of diffusion furnace, leads in diffusion furnace
Enter the pure dry oxygen of 4L/min.
C opens diffusion furnace, is heated up, was raised to T=1150 ± 20 DEG C with 5 hours.
D when temperature reach T and it is constant after, dry oxygen is changed to into wet oxygen, flow 2L/min, and calculate logical wet oxygen time, t=4
±0.5h.After then, then the pure dry oxygen that wet oxygen is changed to 4L/min.Time t=2 ± 0.5h.
E then starts cooling afterwards, drops to less than 600 DEG C with 6 ± 1h, and the quartz boat that will be equipped with silicon single crystal flake is pulled out, by silicon
Single-chip removes lower loading horse, to be tested.
F checks oxidated layer thickness：Require d >=1.2 μm.
Step 2, the protection of front masking layer, remove backside oxide layer.
A fronts spin coating (ultraviolet negative photoresist), rotating speed 5000rpm, spin coating time 40sec.
B front bakings：The silicon chip of even good glue is sent into into 100 DEG C of baking ovens, and 30 ± 5min of timing, is then taken out afterwards, it is to be exposed.
C exposes：The front of spin coating is sent into litho machine carries out uv-exposure, time of exposure 10-20sec.
D develops：To be developed in silicon chip immersion negative photo developer solution after exposure.10 ± 2min of immersion, after taking-up
Dry.
E post bakes：Silicon chip after development is put into into 30-40min in 140 ± 5 DEG C of baking ovens.
F corrodes：Silicon chip after post bake is put into into ammonium fluoride: Fluohydric acid.: the solution of deionized water=1.5g: 1ml: 3.5ml
In, abbreviation BOE.Remove backside oxide layer, 8 ± 2min of time.
Silicon chip after corrosion is put into sulphuric acid: hydrogen peroxide=1: stripping photoresist in 4 by g.After by silicon chip extracting, deionization is used
Water is rinsed more than 15 times.
Step 3, backing substrate prediffusion
The silicon chip of step 3 is carried out Chemical cleaning by a, is loaded in quartz boat, is carried out substrate prediffusion, lead to after drying, drying
Enter the pure nitrogen of 4L/min.
B opens diffusion furnace, is heated up, and constant temperature T=1150 ± 20 DEG C, time t=3 ± 0.5h.
C is by diffusion impurity source (generally liquid POCl3) be carried along in diffusion furnace quartz ampoule by low discharge nitrogen,
Silicon chip back side forms prediffusion layer
After d time t are arrived, less than 600 DEG C are cooled to, the quartz boat that will be equipped with silicon single crystal flake is pulled out, and silicon single crystal flake is gone down
Load horse, it is to be tested.
E detects Rs=0.23-0.25.
Step 4, spread again
Spread again, in temperature T=1250 ± 20 DEG C or so, junction depth propulsion certain hour t=150 ± 10h.
Detection junction depth：It is required that depth is 180-190 μm.
Step 5, base diffusion
A. boron pre-deposition
Condition：T=970 DEG C of t=60min is required：R=28-32 Ω/
B. boron spreads again
Condition：T=1250 DEG C of t=11h is required：R=48～58 Ω/, xj=26～27 μm
Step 6, launch site photoetching
Step 7, phosphorus diffusion
A phosphorus pre-deposited
T=1050 DEG C, t=80min (TongYuan), it is desirable to R=1.36～1.38 Ω/
B phosphorus spreads again
Condition：T=1195 DEG C, t=90 ± 90min requirement β：18～50 (I=0.2A)
Step 8, mesa recess photoetching
Step 9, mesa etch, mesa passivation
Require：Table top groove depth δ=60～65 μm, VCBO >=700V, VCEO >=400V
Step 10, fairlead photoetching
Step 11, middle test, it is desirable to VCBO >=700V, VCEO >=400V
Step 12, evaporation of aluminum, it is desirable to：Aluminum layer thickness δ >=4 ± 0.5 μm
Step 13, photoetching are anti-carved
Step 14, aluminium alloy, it is desirable to：VBE≤1.3V (test conditions：I=1.2A)
Step 15, back face metalization, back side alloy, it is desirable to conventional.
Step 10 six, die testing
(die-size is surveyed entirely automatically using microcomputer：1.68×1.68mm2)
1.ICBO≤20 μ A (test conditions：VCB=710V)
2.IEBO≤20 μ A (test conditions：VEB=10V)
3.BVCEO >=410V (test conditions：IC=5mA)
4.hFE=15～50 (test condition：IC=0.2A, VCE=10V)
Embodiment described above has been described in detail to technical scheme and beneficial effect, it should be understood that
The specific embodiment of the present invention is the foregoing is only, the present invention is not limited to, it is all to be done in the spirit of the present invention
Any modification and improvement etc., should be included within the scope of the present invention.
Claims (9)
1. a kind of audion one side N+The process of diffusion layer diffusion, it is characterised in that the process includes：
Step one, steam oxidation silicon chip form two sides oxide layer；
Step 2, single-sided corrosion oxide layer；
Step 3, prediffusion, diffusion impurity source form prediffusion layer；
Step 4, then spread, junction depth propulsion certain hour is carried out at a certain temperature, obtains product.
2. a kind of audion one side N according to claim 1+The process of diffusion layer diffusion, it is characterised in that described
Steam oxidation silicon chip formed two sides oxide layer, simultaneously using photoresist protect, by corrode remove another side oxide layer, one
The oxide layer in face is used as the masking layer for preventing diffusion.
3. a kind of audion one side N according to claim 1+The process of diffusion layer diffusion, it is characterised in that described
The thickness of silicon chip is 200-300 μm.
4. a kind of audion one side N according to claim 1+The process of diffusion layer diffusion, it is characterised in that described
The steam oxidation silicon chip of step one, carries out Chemical cleaning including by silicon chip to be oxidized, dries, drying；By the silicon chip after drying
After uniform temperature is warming up under pure dry oxygen atmosphere, wet oxygen certain hour, dry oxygen certain hour, cooling, inspection oxidation are passed through
Thickness degree.
5. a kind of audion one side N according to claim 1 or 4+The process of diffusion layer diffusion, it is characterised in that institute
State oxidated layer thickness d >=1.2 μm.
6. a kind of audion one side N according to claim 1+The process of diffusion layer diffusion, it is characterised in that described
The single-sided corrosion oxide layer of step 2 is that, by silicon chip one side glue, front baking, exposure are developed, post bake, and are put into corruption in corrosive liquid
Erosion.
7. a kind of audion one side N according to claim 6+The process of diffusion layer diffusion, it is characterised in that described
Corrosive liquid is ammonium fluoride: Fluohydric acid.: the solution of deionized water=1.5g: 1ml: 3.5ml.
8. a kind of audion one side N according to claim 1+The process of diffusion layer diffusion, it is characterised in that described
The uniform temperature for spreading again of step 4 is 1250 ± 20 DEG C, and junction depth propulsion certain hour is 150 ± 10h.
9. a kind of manufacture method of chip, it is characterised in that usage right requires any one audion one side N described in 1-8+
The process of diffusion layer diffusion, and base diffusion is carried out, launch site photoetching, phosphorus diffusion, mesa recess photoetching, mesa etch, platform
Face is passivated, fairlead photoetching, and middle test, evaporation of aluminum, photoetching are anti-carved, aluminium alloy, back face metalization, back side alloy, and are managed
Core is tested.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107170664A (en) * | 2017-05-16 | 2017-09-15 | 扬州晶新微电子有限公司 | A kind of manufacturing process of substrate diffusion sheet |
| CN107256828A (en) * | 2017-05-16 | 2017-10-17 | 扬州晶新微电子有限公司 | A kind of phosphorosilicate glass annealing process for improving triode K values |
| CN111341650A (en) * | 2020-03-13 | 2020-06-26 | 天水天光半导体有限责任公司 | Bubble-emitting phosphorus diffusion process method for reducing triode reverse amplification factor |
| CN113053736A (en) * | 2021-03-11 | 2021-06-29 | 捷捷半导体有限公司 | Semiconductor device manufacturing method |
| CN114999914A (en) * | 2022-07-01 | 2022-09-02 | 锦州辽晶电子科技有限公司 | Manufacturing method of power transistor for improving secondary breakdown resistance tolerance |
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| CN102789980A (en) * | 2012-07-18 | 2012-11-21 | 启东吉莱电子有限公司 | Production process of short base region structure for improving voltage |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107170664A (en) * | 2017-05-16 | 2017-09-15 | 扬州晶新微电子有限公司 | A kind of manufacturing process of substrate diffusion sheet |
| CN107256828A (en) * | 2017-05-16 | 2017-10-17 | 扬州晶新微电子有限公司 | A kind of phosphorosilicate glass annealing process for improving triode K values |
| CN111341650A (en) * | 2020-03-13 | 2020-06-26 | 天水天光半导体有限责任公司 | Bubble-emitting phosphorus diffusion process method for reducing triode reverse amplification factor |
| CN111341650B (en) * | 2020-03-13 | 2023-03-31 | 天水天光半导体有限责任公司 | Bubble-emitting phosphorus diffusion process method for reducing triode reverse amplification factor |
| CN113053736A (en) * | 2021-03-11 | 2021-06-29 | 捷捷半导体有限公司 | Semiconductor device manufacturing method |
| CN113053736B (en) * | 2021-03-11 | 2024-05-03 | 捷捷半导体有限公司 | Manufacturing method of semiconductor device |
| CN114999914A (en) * | 2022-07-01 | 2022-09-02 | 锦州辽晶电子科技有限公司 | Manufacturing method of power transistor for improving secondary breakdown resistance tolerance |
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