CN107170664A - A kind of manufacturing process of substrate diffusion sheet - Google Patents
A kind of manufacturing process of substrate diffusion sheet Download PDFInfo
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- CN107170664A CN107170664A CN201710346868.0A CN201710346868A CN107170664A CN 107170664 A CN107170664 A CN 107170664A CN 201710346868 A CN201710346868 A CN 201710346868A CN 107170664 A CN107170664 A CN 107170664A
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- chip
- substrate
- diffusion sheet
- phosphorus
- manufacturing process
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- 239000000758 substrate Substances 0.000 title claims abstract description 47
- 238000009792 diffusion process Methods 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 30
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 28
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 28
- 239000011574 phosphorus Substances 0.000 claims abstract description 28
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 16
- 230000003647 oxidation Effects 0.000 claims abstract description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000001301 oxygen Substances 0.000 claims abstract description 10
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 10
- 238000004140 cleaning Methods 0.000 claims abstract description 5
- 238000007667 floating Methods 0.000 claims abstract description 5
- 239000001257 hydrogen Substances 0.000 claims abstract description 5
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 5
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims abstract description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 5
- 238000004528 spin coating Methods 0.000 claims abstract description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims 1
- 229910001882 dioxygen Inorganic materials 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 238000005498 polishing Methods 0.000 description 8
- 239000000126 substance Substances 0.000 description 6
- 230000007423 decrease Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 238000010923 batch production Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000007521 mechanical polishing technique Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010865 sewage Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 239000002351 wastewater Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P80/00—Climate change mitigation technologies for sector-wide applications
- Y02P80/30—Reducing waste in manufacturing processes; Calculations of released waste quantities
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
The present invention discloses a kind of manufacturing process of substrate diffusion sheet, comprises the following steps：S1：Single-chip is chosen, number is engraved to each single-chip, to facilitate the retrospective of subsequent process；S2：Single-chip after quarter number is placed in hydrogen, oxygen atmosphere and carries out liner oxidation；S3：Spin coating, front baking and post bake are carried out on the non-quarter face of single-chip；S4：Single-chip is positioned in pure hydrofluoric acid solution, removing oxide layer is removed；S5：Single-chip is taken out from pure hydrofluoric acid solution, the photoresist in the non-quarter face of single-chip is removed, substrate phosphorus is carried out after cleaning treatment pre- scattered；S6：Single-chip is subjected to second of oxidation of substrate；S7：Single-chip is subjected to second of phosphorus diffusion of substrate；S8：Single-chip is positioned over progress drift light in pure hydrofluoric acid solution；S9：The high resistant face for floating single-chip after light is thinned and polished, required product is finally obtained, the present invention solves base material in the prior art and the big, technical problem of silicon wafer thickness lack of homogeneity is lost.
Description
Technical field
The present invention relates to semiconductor devices base material technical field, more particularly to a kind of manufacturing process of substrate diffusion sheet.
Background technology
The manufacture craft process of conventional substrate diffusion sheet is：Select piece thickness in 525 microns, N-type impurity, resistivity exists
(specific electrical resistivity range can be carried out the ohmcm scope of 10 ohmcms~60 according to the required voltage for being manufactured into product
Selection) single crystal wafer be used as base material.Using the technique of two-sided expansion phosphorus, junction depth is in 200 microns, then using reduction process,
By one side, N+ layers are ground off, and N- layers are stayed the voltage of thickness manufacture product needed for be selected, in order to meet making product
Requirement, N- faces must be thrown into by minute surface using the method for chemical polishing or mechanical polishing after being thinned.Due to mechanical polishing into
This is higher, and generally chemical polishing is used in batch production process.Three 40 microns of the spread sheet N- thickness finally made~
80 microns, and N+ thickness is 200 microns, but there is problems with existing manufacture craft：(1) for the wave of base material single-chip
Take larger, material piece thickness is at 525 microns, and the final piece completed for preparing is thick at 240 microns~280 microns, and base material loss is close
50%；(2) larger due to removal amount is thinned, the consumption to water, electricity, thinned machine bistrique is also higher, while quantity of wastewater effluent is thinned
Also it is larger；(3) surface with chemical polishing technology used after being thinned, due to the defect of technique itself, after the completion of chemical polishing, silicon wafer thickness
Uniformity can decline (N- layers of thickness evenness can decline), the voltage uniformity of product manufactured by such triple spread sheets,
Saturation voltage drop uniformity can all have the decline of different depths, cause the competitiveness of product in market to decline.
The content of the invention
It is an object of the invention to provide a kind of manufacturing process of substrate diffusion sheet, base material loss in the prior art is solved
Greatly, the technical problem of silicon wafer thickness lack of homogeneity.
A kind of manufacturing process of substrate diffusion sheet, is to expand phosphorus technique to manufacture using one side, comprises the following steps：
S1：Single-chip is chosen, number is engraved to each single-chip, the retrospective for subsequent process step provides condition；
S2：Single-chip after quarter number is placed in hydrogen, oxygen atmosphere and carries out liner oxidation；
S3：Spin coating, front baking and post bake are carried out on the non-quarter face of single-chip；
S4：Single-chip is positioned in pure hydrofluoric acid solution, the oxide layer in monocrystalline a moment face is removed；
S5：Single-chip is taken out from pure hydrofluoric acid solution, the photoresist in the non-quarter face of single-chip is removed, at cleaning
Substrate phosphorus is carried out after reason pre- scattered；
S6：The pre- scattered single-chip of substrate phosphorus will be completed and carry out second of oxidation of substrate；
S7：Single-chip is subjected to second of phosphorus diffusion of substrate；
S8：Single-chip is positioned over progress drift light in pure hydrofluoric acid solution；
S9：The high resistant face for floating single-chip after light is thinned and polished, required product is finally obtained.
On the basis of above-mentioned technical proposal, the present invention can also do following improvement：
Further, the thickness of single-chip is 300 microns -350 microns in the step S1.
Further, the oxidization time in the step S2 is 15h-24h, and the temperature of oxidation is 1200 DEG C -1250 DEG C, oxygen
The thickness for changing layer is not less than 3 microns.
Further, the pre- scattered temperature of substrate phosphorus is 1180 DEG C in the step S5, and the time is 200min.
Further, the condition aoxidized in the step S6 is that temperature is 1150 DEG C, and oxidization time is 8h-12h.
Further, the technological temperature of second of phosphorus diffusion of substrate is 1280 DEG C, time 180h- in the step S7
250h, the gas flow being passed through is nitrogen：4L/min, oxygen：4L/min.
Further, bistrique described in the step S9 is more than 6000 mesh.
Beneficial effects of the present invention：
The present invention is a kind of substrate diffusion sheet manufacture craft, and the single-chip thickness of selection is thin compared with prior art, so subtracts
The loss of few base material, while the present invention, which uses one side, expands phosphorus technique, so reduces base material consumption, reduces energy consumption and blowdown,
Lift the uniformity of product electrical parameter；Present invention silicon chip surface after being thinned, close to minute surface, saves chemical polishing or mechanical polishing
Technique；The voltage of product produced by the present invention, the uniformity of saturation voltage drop are all greatly increased, and in production process
The discharge that water, electricity, bistrique were lost and were thinned sewage has obvious reduction.
Brief description of the drawings
, below will be to specific in order to illustrate more clearly of the specific embodiment of the invention or technical scheme of the prior art
The accompanying drawing used required in embodiment or description of the prior art is briefly described, it should be apparent that, in describing below
Accompanying drawing is some embodiments of the present invention, for those of ordinary skill in the art, before creative work is not paid
Put, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of flow process figure of substrate diffusion sheet manufacture craft described in the specific embodiment of the invention；
Embodiment
Technical scheme is clearly and completely described below in conjunction with accompanying drawing, it is clear that described implementation
Example is a part of embodiment of the invention, rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill
The every other embodiment that personnel are obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
Embodiment 1：
A kind of manufacturing process of substrate diffusion sheet, is to expand phosphorus technique to manufacture using one side, comprises the following steps：
S1：Single-chip is chosen, number is engraved to each single-chip, the retrospective for subsequent process step provides condition；
S2：Single-chip after quarter number is placed in hydrogen, oxygen atmosphere and carries out liner oxidation；
S3：Spin coating, front baking and post bake are carried out on the non-quarter face of single-chip；
S4：Single-chip is positioned in pure hydrofluoric acid solution, the oxide layer in monocrystalline a moment face is removed；
S5：Single-chip is taken out from pure hydrofluoric acid solution, the photoresist in the non-quarter face of single-chip is removed, at cleaning
Substrate phosphorus is carried out after reason pre- scattered；
S6：The pre- scattered single-chip of substrate phosphorus will be completed and carry out second of oxidation of substrate；
S7：Single-chip is subjected to second of phosphorus diffusion of substrate；
S8：Single-chip is positioned over progress drift light in pure hydrofluoric acid solution；
S9：The high resistant face (i.e. non-quarter face) for floating single-chip after light is thinned and polished, required product is finally obtained.
Wherein, the thickness of single-chip is 300 microns in the step S1, and generally materials are 525 microns of left sides in the prior art
The right side, can so reduce the waste of base material.
Wherein, the oxidization time in the step S2 is 15h, and the temperature of oxidation is 1200 DEG C, and the thickness of oxide layer is not small
In 3 microns, the thickness of oxide layer is detected by film thickness instrument.
Wherein, the pre- scattered temperature of substrate phosphorus is 1180 DEG C in the step S5, and the time is 200min.
Wherein, the condition aoxidized in the step S6 is that temperature is 1150 DEG C, and oxidization time is 8h.
Wherein, the technological temperature of second of phosphorus diffusion of substrate is 1280 DEG C, time 180h, the gas being passed through in the step S7
Body flow is nitrogen：4L/min, oxygen：4L/min.
Wherein, bistrique described in the step S9 is more than 6000 mesh.
The present invention is a kind of new substrate diffusion sheet manufacture craft, in selection, the single-chip that selection thickness is told somebody what one's real intentions are, then
Phosphorus is expanded using one side, the back side uses back sealing process, so reduce base material consumption, reduce energy consumption and blowdown, it is ensured that junction depth still exists
200um or so, using ultra-fine bistrique, is thinned removal amount between 40um~80um, silicon chip surface is saved close to minute surface after being thinned
Chemical polishing or mechanical polishing process.The loss of the base material of the present invention drops to 20% or so.
Embodiment 2：
A kind of manufacturing process of substrate diffusion sheet, comprises the following steps：
S1：Single-chip is chosen, number is engraved to each single-chip, the retrospective for subsequent process step provides condition；
S2：Single-chip after quarter number is placed in hydrogen, oxygen atmosphere and carries out liner oxidation；
S3：Spin coating, front baking and post bake are carried out on the non-quarter face of single-chip；
S4：Single-chip is positioned in pure hydrofluoric acid solution, the oxide layer in monocrystalline a moment face is removed；
S5：Single-chip is taken out from pure hydrofluoric acid solution, the photoresist in the non-quarter face of single-chip is removed, at cleaning
Substrate phosphorus is carried out after reason pre- scattered；
S6：The pre- scattered single-chip of substrate phosphorus will be completed and carry out second of oxidation of substrate；
S7：Single-chip is subjected to second of phosphorus diffusion of substrate；
S8：Single-chip is positioned over progress drift light in pure hydrofluoric acid solution；
S9：The high resistant face for floating single-chip after light is thinned and polished, required product is finally obtained.
Wherein, the thickness of single-chip is 350 microns in the step S1.
Wherein, the oxidization time in the step S2 is 24h, and the temperature of oxidation is 1250 DEG C, and the thickness of oxide layer is not small
In 3 microns.
Wherein, the pre- scattered temperature of substrate phosphorus is 1180 DEG C in the step S5, and the time is 200min.
Wherein, the condition aoxidized in the step S6 is that temperature is 1150 DEG C, and oxidization time is 12h.
Wherein, the technological temperature of second of phosphorus diffusion of substrate is 1280 DEG C, time 250h, the gas being passed through in the step S7
Body flow is nitrogen：4L/min, oxygen：4L/min.
Wherein, bistrique described in the step S9 is more than 6000 mesh.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
The present invention is described in detail with reference to foregoing embodiments for pipe, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, or which part or all technical characteristic are entered
Row equivalent substitution；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (7)
1. a kind of manufacturing process of substrate diffusion sheet, it is characterised in that be to expand phosphorus technique to manufacture using one side, including following step
Suddenly：
Step S1：Single-chip is chosen, number is engraved to each single-chip, the retrospective for subsequent process step provides condition；
Step S2：Single-chip after quarter number is placed in hydrogen, oxygen atmosphere and carries out liner oxidation；
Step S3：Spin coating, front baking and post bake are carried out on the non-quarter face of single-chip；
Step S4：Single-chip is positioned in pure hydrofluoric acid solution, the oxide layer in monocrystalline a moment face is removed；
Step S5：Single-chip is taken out from pure hydrofluoric acid solution, the photoresist in the non-quarter face of single-chip is removed, at cleaning
Substrate phosphorus is carried out after reason pre- scattered；
Step S6：The pre- scattered single-chip of substrate phosphorus will be completed and carry out second of oxidation of substrate；
Step S7：Single-chip is subjected to second of phosphorus diffusion of substrate；
Step S8：Single-chip is positioned over progress drift light in pure hydrofluoric acid solution；
Step S9：The high resistant face for floating single-chip after light is thinned and polished, substrate diffusion sheet needed for finally obtaining.
2. a kind of manufacturing process of substrate diffusion sheet according to claim 1, it is characterised in that monocrystalline in the step S1
The thickness of piece is 300 microns -350 microns.
3. a kind of manufacturing process of substrate diffusion sheet according to claim 2, it is characterised in that the oxygen in the step S2
The change time is 15-24h, and the temperature of oxidation is 1200 DEG C -1250 DEG C, and the thickness of oxide layer is not less than 3 microns.
4. a kind of manufacturing process of substrate diffusion sheet according to claim 3, it is characterised in that substrate in the step S5
The pre- scattered temperature of phosphorus is 1180 DEG C, and the time is 200min.
5. the manufacturing process of a kind of substrate diffusion sheet according to claim 4, it is characterised in that aoxidized in the step S6
Condition be temperature be 1150 DEG C, oxidization time is 8h-12h.
6. a kind of manufacturing process of substrate diffusion sheet according to claim 5, it is characterised in that substrate in the step S7
The technological temperature of second of phosphorus diffusion is 1280 DEG C, time 180h-250h, and the gas flow being passed through is nitrogen：4L/min, oxygen
Gas：4L/min.
7. the manufacturing process of a kind of substrate diffusion sheet according to claim 6, it is characterised in that described in the step S9
Bistrique is more than 6000 mesh.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710346868.0A CN107170664A (en) | 2017-05-16 | 2017-05-16 | A kind of manufacturing process of substrate diffusion sheet |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710346868.0A CN107170664A (en) | 2017-05-16 | 2017-05-16 | A kind of manufacturing process of substrate diffusion sheet |
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| CN107170664A true CN107170664A (en) | 2017-09-15 |
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ID=59815805
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| CN201710346868.0A Pending CN107170664A (en) | 2017-05-16 | 2017-05-16 | A kind of manufacturing process of substrate diffusion sheet |
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|---|---|---|---|---|
| CN101030529A (en) * | 2007-01-26 | 2007-09-05 | 吉林华微电子股份有限公司 | Production of polishing sheet single-sided main diffusion |
| CN101150067A (en) * | 2007-11-09 | 2008-03-26 | 吉林华微电子股份有限公司 | A phosphor adulterated and impurity absorption method |
| CN101373717A (en) * | 2008-10-23 | 2009-02-25 | 杭州杭鑫电子工业有限公司 | Method for manufacturing transistor by thinning silicon monocrystal thin sheet prediffusion single face |
| CN101383284A (en) * | 2008-10-23 | 2009-03-11 | 杭州杭鑫电子工业有限公司 | Method for transistor manufacturing by silicon monocrystal flake oxidized prediffusion |
| CN101840860A (en) * | 2009-03-19 | 2010-09-22 | 武洪建 | Method for manufacturing silicon substrate of insulated gate bipolar transistor (IGBT) |
| CN103730358A (en) * | 2014-01-17 | 2014-04-16 | 上海超硅半导体有限公司 | Method for producing transistor through silicon single crystal sheets |
| CN105374668A (en) * | 2015-11-02 | 2016-03-02 | 吉林华微电子股份有限公司 | Heavily doped silicon substrate high quality shielding type diffusion method |
| CN106653585A (en) * | 2016-10-27 | 2017-05-10 | 安徽富芯微电子有限公司 | Triode one-side N+ diffusion layer diffusion process |
-
2017
- 2017-05-16 CN CN201710346868.0A patent/CN107170664A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101030529A (en) * | 2007-01-26 | 2007-09-05 | 吉林华微电子股份有限公司 | Production of polishing sheet single-sided main diffusion |
| CN101150067A (en) * | 2007-11-09 | 2008-03-26 | 吉林华微电子股份有限公司 | A phosphor adulterated and impurity absorption method |
| CN101373717A (en) * | 2008-10-23 | 2009-02-25 | 杭州杭鑫电子工业有限公司 | Method for manufacturing transistor by thinning silicon monocrystal thin sheet prediffusion single face |
| CN101383284A (en) * | 2008-10-23 | 2009-03-11 | 杭州杭鑫电子工业有限公司 | Method for transistor manufacturing by silicon monocrystal flake oxidized prediffusion |
| CN101840860A (en) * | 2009-03-19 | 2010-09-22 | 武洪建 | Method for manufacturing silicon substrate of insulated gate bipolar transistor (IGBT) |
| CN103730358A (en) * | 2014-01-17 | 2014-04-16 | 上海超硅半导体有限公司 | Method for producing transistor through silicon single crystal sheets |
| CN105374668A (en) * | 2015-11-02 | 2016-03-02 | 吉林华微电子股份有限公司 | Heavily doped silicon substrate high quality shielding type diffusion method |
| CN106653585A (en) * | 2016-10-27 | 2017-05-10 | 安徽富芯微电子有限公司 | Triode one-side N+ diffusion layer diffusion process |
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Application publication date: 20170915 |