CN106652967A - Display panel, display device and driving method applied to display panel - Google Patents
Display panel, display device and driving method applied to display panel Download PDFInfo
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- CN106652967A CN106652967A CN201710169215.XA CN201710169215A CN106652967A CN 106652967 A CN106652967 A CN 106652967A CN 201710169215 A CN201710169215 A CN 201710169215A CN 106652967 A CN106652967 A CN 106652967A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
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- Engineering & Computer Science (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display panel, a display device and a driving method applied to the display panel. The display panel comprises a plurality of data signal lines, a display pixel array and a control unit, wherein the display pixel array comprises a plurality of sub-pixels; the data signal lines are each connected to one line of sub-pixels in the display pixel array, and the data signal lines are used for transmitting data signals to the various sub-pixels; the control unit is connected to at least one data signal line in the data signal line group; and the control unit is used for transmitting a first signal to the various data signal lines in a display intermission between adjacent frames, wherein in the adjacent frames, the data signals applied to the same data signal line are opposite in polarity. According to the implementation mode, the data signal lines can achieve charge balance when polarity is reversed in a same frame, so that a display effect of the display panel is enhanced.
Description
Technical field
The application is related to display technology field, and in particular to display floater, display device and be applied to the drive of display floater
Dynamic method.
Background technology
With the lifting of Display Technique, in order to meet the market demand, display floater is gradually to frivolous, narrow frame and high score
The direction of resolution is developed.
In display panels, if data wire only transmits a kind of voltage signal of polarity, liquid crystal molecule is for a long time to same
One direction deflects, and polarization is susceptible to, so as to gradually lose revolving property.In order to avoid liquid crystal molecule is chronically at same direction
Bias under and polarize, generally can to data wire provide two kinds of opposed polarities signal, one kind is higher than public electrode
The positive signal of voltage, a kind of is the minus polarity signal less than public electrode voltages.In existing technology, the polarity of data wire
What is converted has four kinds of modes, i.e., overturn mode frame by frame, mode is overturn line by line, mode is overturn by column and pointwise upset mode.
Under upset mode by column, in same frame picture, the pole of the sub-pixel being connected with same data signal line
Property is identical.When display picture switches in interframe, the voltage signal on data signal line is another by a kind of dipole inversion before
A kind of outer polarity, needs in this process the opposite polarity target of data-signal that data wire is charged to into former frame display picture
Current potential, therefore the change amount signal of interframe switching data signal line when showing compared with frame according to the change amount signal of holding wire is more
Greatly so that data signal line is difficult to charge balance in polarity upset.It is mutual due to existing between data wire and public electrode
Electric capacity, becomes apparent from, so as to cause according to the above-mentioned signal intensity on line in interframe switching to the disturbance that public electrode is caused
Display picture flashes, and reduces the display effect of display floater.
The content of the invention
In view of drawbacks described above of the prior art, the embodiment of the present application is there is provided display floater, display device and display surface
The driving method of plate is solving the technical problem that background section above is mentioned.
To achieve these goals, the one side of the embodiment of the present application provides a kind of display floater, including data letter
Number line；Display pixel array, display pixel array includes multiple sub-pixels, in a data signal line and display pixel array
Row sub-pixel connects, and data signal line is used for each sub-pixel transmission data signal；Control unit, control unit and data-signal
At least one data signal line connection in line group；The display intermittent phase that control unit is used between consecutive frame believes to each data
Number line transmits the first signal, wherein, in consecutive frame, the data-signal applied on same data signal line has contrary pole
Property.
The another aspect of the embodiment of the present application provides a kind of driving method for above-mentioned display floater.
The another aspect of the embodiment of the present application provides a kind of display device, including display floater as above.
Display floater that the embodiment of the present application is provided, display device and be applied to the driving method of display floater, by
The control unit being connected with data signal line is set on display floater, on a display panel the display intermittent phase between consecutive frame
The first signal is provided to data signal line so that in same frame, data signal line realizes charge balance in polarity upset, so as to
Improve the display effect of display floater.
In certain embodiments, by the way that the display detector unit on display floater is multiplexed with into control unit come to data letter
Number line provides the first signal, so as to save the area of viewing area around display floater, improves the utilization rate of each unit, has
Beneficial to the design for realizing narrow frame.
Description of the drawings
By reading non-limiting example is described in detail with reference to what the following drawings was made, other features,
Objects and advantages will become more apparent upon：
Fig. 1 shows the planar structure schematic diagram of the one embodiment for the display floater that the embodiment of the present application is provided；
Fig. 2 a- Fig. 2 b show another planar structure schematic diagram for the display floater that the embodiment of the present application is provided.
Fig. 3 a- Fig. 3 b show another planar structure schematic diagram for the display floater that the embodiment of the present application is provided.
Fig. 4 a- Fig. 4 b show another planar structure schematic diagram for the display floater that the embodiment of the present application is provided.
Fig. 5 shows a structural representation of the multichannel assignment control that the embodiment of the present application is provided；
Fig. 6 shows the control unit being applied to shown in Fig. 4 b and multichannel assignment control of the embodiment of the present application offer
Working timing figure；
Fig. 7 shows the display device schematic diagram that the embodiment of the present application is provided.
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention, rather than the restriction to the invention.It also should be noted that, in order to
Be easy to description, illustrate only in accompanying drawing to about the related part of invention.
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the application can phase
Mutually combination.Below with reference to the accompanying drawings and in conjunction with the embodiments describing the application in detail.
Fig. 1 is refer to, the planar structure of one embodiment of its exemplary display floater for showing the application is illustrated
Figure.
As shown in figure 1, display floater 100 includes array base palte 10, a plurality of data-signal being arranged on array base palte 10
Line 11.Be additionally provided with the scan signal line 12 arranged in a crossed manner with data signal line 11 on array base palte 10, data signal line 11 with
The intersection of scan signal line 12 limits display pixel array.Display pixel array includes multiple sub-pixels 13, and the sub-pixel 13 is wrapped
Include the pixel of redness, green and blue three kinds of first colors.The data signal of each row sub-pixel 13 and in display pixel array
Line 11 connects.During showing, per a line sub-pixel 13, data signal line 11 is by data voltage for the Time share scanning of scan signal line 12
Signal time sharing transmissions are to each row sub-pixel 13.
Display floater 100 also includes control unit 14, and wherein control unit 14 is connected with least one data signal line 11,
Fig. 1 it is exemplary show a case that control unit 14 is all connected with each data holding wire 11.
In this example it is shown that panel 100 is provided with viewing area AA and the non-display area around viewing area.Its
In, pel array is arranged at viewing area AA, and control unit is arranged at non-display area.
In this example it is shown that panel 100 during showing using row upset in the form of, in other words, in same frame
In, signal polarity on two adjacent data lines 11 is conversely, the polarity of electrode of adjacent two row sub-pixels 13 is conversely, can also
Say, in consecutive frame, the data voltage signal applied on same data signal line 11 has contrary polarity.Control unit 14
For the display tempus intercalare between consecutive frame, the first signal is transmitted to each data signal line 11, wherein, the electricity of the first signal
Pressure value is between the maxima and minima of data voltage signal.
In some optional implementations of the present embodiment, above-mentioned first signal can be the ginseng on display floater 100
Examine ground potential signal, or public voltage signal.
In the present embodiment, because display floater 100 is using row upset, between consecutive frame on same data signal line
Signal when carrying out dipole inversion, display intermittent phase of the control unit 14 between consecutive frame is to the transmission of data signal line 11 first
Signal, can reduce excursion of the data voltage signal on data signal line 11 during polarity upset, so as to drop
The low disturbance caused to public electrode, improves the display effect of display floater.
With continued reference to Fig. 2 a- Fig. 2 b, it schematically illustrates the flat of another embodiment of the display floater of the application
Face structural representation.
In display floater 200 as shown in Figure 2 a, display floater 200 equally includes a plurality of data signal line 21, shows
Pel array, each display pixel array includes multiple sub-pixels 22, and control unit 23.
From unlike the embodiment shown in Fig. 1, further the structure of control unit 23 carried out in the present embodiment
Specific description.
In this fact Example, control unit 23 also includes the first test signal line 231 and switch element 232.Wherein, switch
Unit 232 includes multiple switch k1, k2, k3 ... kn, each switch in the first test signal line 231 and switch element 232
K1, k2, k3 ... kn is electrically connected, and the other end for respectively switching k1, k2, k3 ... kn is respectively connecting to pieces of data holding wire 21.Aobvious
Show the display tempus intercalare in stage, the first test signal line 231 is used for the first signal transmission that will be received to each data-signal
Line 21.
In some optional implementations of the present embodiment, above-mentioned switch element 23 include multiple transistor M1, M2,
M3…Mn.As shown in Figure 2 b.Here, transistor M1, M2, M3 ... Mn can be nmos pass transistor, or PMOS crystal
Pipe.Display floater 200 also includes switch controlling signal line 233.The grid of each transistor is connected in switch element 232
Switch controlling signal line 233, the first pole of each transistor is connected to the first test signal line 231, second pole point of each transistor
It is not connected with each data signal line 21.Above-mentioned each transistor M1, M2, M3 ... Mn leads under the control of switch controlling signal line 233
Lead to or turn off to control the electrical connection between the first test signal line 231 and pieces of data holding wire 21.When each transistor M1,
When M2, M3 ... Mn is turned on, the first test signal line 231 is believed the first signal transmission to data by transistor M1, M2, M3 ... Mn
Number line 21.
With continued reference to Fig. 3 a- Fig. 3 b, it schematically illustrates the flat of another embodiment of the display floater of the application
Face structural representation.
In display floater 300 as shown in Figure 3, display floater 300 equally includes a plurality of data signal line 31, shows picture
Pixel array, each display pixel array includes multiple sub-pixels 32, and control unit 33.Display pixel array is arranged at display
Area AA, control unit 33 is arranged at non-display area.
In the present embodiment, control unit 33 includes that the first test signal line 331, switch element 332 and second are tested
Holding wire 333.Wherein, switch element 332 includes multiple switch k1, k2, k3 ... kn, and the first test signal line 331 is single with switch
Odd number switch k1, k3, k5 ... electrical connection in unit 332, the other end for respectively switching k1, k3, k5 ... is respectively connecting to odd number
Data holding wire 31.Second test signal line 333 is electrically connected with even number switch k2, k4, k6 ... in switch element, is respectively opened
The other end for closing k2, k4, k6 ... is respectively connecting to even-numbered data signal line 31.
In the present embodiment, above-mentioned control unit 33 is used in display test phase, provides aobvious to each data signal line 311
Show test signal, in the display intermittent phase in the stage of display, to each data signal line the first signal is provided.
During test is shown, when carrying out same frame picture and showing test, the first test signal line 331 is to odd-numbered
Data signal line transmits the first data voltage signal, and the second test signal line 333 is to even-numbered data signal line transmission second
Data voltage signal, wherein, the first data voltage signal is opposite polarity signal with the second data voltage signal.Survey showing
After examination is finished, the first test signal line 331 can be electrically connected with the second test signal line 333, and be connected to public
Current potential or ground potential.Intermittent phase during showing, the first test signal line 331 can connect with the second test signal line 333
The first signal is received, and by the first signal transmission for receiving to each data signal line.
As can be seen that from unlike the embodiment shown in Fig. 2, in the present embodiment, control unit 33 also includes second
Test signal line 333.So, control unit 33 can be multiplexed by the test cell that test signal is provided on display floater,
Both need not increase extra operation to form control unit 33 during display floater is made, while also a saving display
The area of panel non-display area, is conducive to the design of display floater narrow frame.
In some optional implementations of the present embodiment, above-mentioned switch element 332 include multiple transistor M1, M2,
M3、M4、M5、M6…Mn.As shown in Figure 3 b.Display floater 300 also includes switch controlling signal line 334.It is every in switch element 332
The grid of one transistor is connected to switch controlling signal line 334.Odd number transistor M1 in switch element 332, M3,
First pole of M5 ... is connected to the first test signal line 331, the of even number transistor M2, M4, M6 ... in switch element 34
One pole is connected to the second test signal line 333.The second pole difference of odd number transistor M1, M3, M5 ... in switch element 332
Connection corresponding with odd-numbered data signal line 311, second pole of even number transistor M2, M4, M6 ... in switch element 332
Connection corresponding with even-numbered data signal line 311 respectively.Above-mentioned each transistor M3, M4, M5, M6 ... Mn is in switch controlling signal
On or off is believed with controlling the first test signal line 331, the second test signal line 333 with pieces of data under the control of line 334
Electrical connection between number line 31.
With continued reference to Fig. 4 a- Fig. 4 b, the structural representation of another display floater of the embodiment of the present application offer is it illustrates
Figure.
As shown in fig. 4 a, in the display floater shown in Fig. 4 a, display floater 400 includes multiple data line groups 41, each
Data line group includes m datas holding wire 411, and m is positive integer, and m >=6, in the present embodiment, shows each data line group
41 situations for including 6 data holding wires.Display floater 400 also includes the n row scanning letter arranged in a crossed manner with data signal line 411
Number line 48 and control unit 43, wherein n is positive integer.Scan signal line 48 limits display pixel with data signal line 411
Array, display pixel array includes multiple sub-pixels 42.Display pixel array is arranged at viewing area AA, and control unit 43 is arranged at
Non-display area.Control unit 43 includes the first test signal line 431 and switch element 432.
Display floater 400 also includes multiple multichannel assignment controls 44, and a plurality of data signal transmission wire 45.Each
Multichannel assignment control 44 includes multiple signal input parts and multiple signal output parts.In the present embodiment, each is more
The output end of road assignment control 44 connects one to one respectively with each data signal line 411 in a data line group 41,
The input of each multichannel assignment control 44 is connected with least one data signal transmission wire 45.Fig. 4 a show each
The situation that individual multichannel assignment control 44 is connected with a data signal transmssion line 45.Data signal transmission wire 45 is by switch
Unit 432 is electrically connected to the first test signal line 431.
In this example it is shown that panel 400 also includes flexible PCB 46.Flexible PCB 46 is arranged at non-display area
Domain.Above-mentioned test signal line 431 is connected to flexible PCB 46, and is connected to public voltage signal line by flexible PCB 46
Or common ground potential.
In this example it is shown that panel 400 also includes integrated circuit 47.Integrated circuit 47 is arranged at non-display area.
After display floater completes, integrated circuit 47 can be bundled on display floater 400.Above-mentioned each multichannel distribution control
The signal output part of unit 44 is connected to integrated circuit 47 by least one data signal transmission wire 45.It is many during showing
Road assignment control 44 receive integrated circuit 47 send data voltage signal, and by data voltage signal time sharing transmissions to
Each data signal line 411 of its electrical connection；The display intermittent phase between consecutive frame, first under the control of switch element 432
Test signal line 431 is electrically connected with data signal transmission wire 45, and multichannel assignment control 44 receives flexible PCB 46 and transmits
The first signal, and by the first signal transmission to each data signal line 411 being connected electrically.So, integrated circuit 47
Data can be reduced by a data signal transmssion line 45 to the transmission data voltage signal of at least 6 data holding wire 411
The quantity of signal transmssion line, while the data of the port of the integrated circuit that data signal line takes are reduced, so as to reduce display
The frame size of panel.
In some optional implementations of the present embodiment, display floater 400 can also include detection pad, and first surveys
Trial signal line 431 is electrically connected by detection pad with flexible PCB 46；Detection pad is used to receive flexible PCB 46
The first signal transmission to each data signal line 411.
In some optional embodiments, as shown in Figure 4 b, and unlike the embodiment shown in Fig. 4 a, in fig. 4b,
Control unit 43 also includes the second test signal line 433, switch controlling signal line 434, and switch element 432 includes multiple crystal
Pipe, multichannel assignment control 44 is electrically connected with two data signal transmssion lines 45.Wherein, the grid of each transistor is connected to out
Control signal wire 434 is closed, first pole of odd number transistor is connected to the first test signal line 431 in switch element 432, the
Two poles are connected to the wherein data signal transmssion line 45 being connected with multichannel assignment control.In switch element 432
First pole of even number transistor is connected to the second test signal line 432, and the second pole is connected to and multichannel assignment control phase
The other data signal transmssion line 45 of connection.Each multichannel assignment control 44 is passed by 2 data signals simultaneously
Defeated line is connected with integrated circuit 47.
With continued reference to Fig. 5, the structural representation of a multichannel assignment control of the embodiment of the present application offer is it illustrates
Figure.
As shown in figure 5, in the present embodiment, show each multichannel assignment control (as shown in Fig. 4 a or Fig. 4 b
Multichannel assignment control 44) situation about being connected with two data signal transmssion lines 45.Data signal transmission wire 45 (can be with
Data signal transmission wire shown in Fig. 4 a or Fig. 4 b) include that the first data signal transmission wire data1 and the second data-signal are passed
Defeated line data2, multichannel assignment control 44 (can be the multichannel assignment control 44 shown in Fig. 4 a or Fig. 4 b) is including m
Input, m output end, m control end and clock control signal line group C, wherein m is even number, and m >=6, with m=in Fig. 5
Illustrate as a example by 6.Clock control signal line group C includes 3 clock control signals line CKH1, CKH2 and CKH3.
In the present embodiment, the odd number input in m input is electrically connected with the first data signal transmission wire data1
Connect, even number input is electrically connected with the second data signal transmission wire data2.M output end out51, out52, out53,
Out54, out55 and out56 are electrically connected respectively with data signal line.The first data signal transmission wire data1 is controlled with output
3 control ends and clock control signal line CKH1, CKH3, CKH2 of end out1, out3 and out5 conducting connect one to one,
Control 3 control ends and clock that the second data signal transmission wire data2 is turned on output end out52, out54 and out55
Control signal wire CKH2, CKH1, CKH3 connect one to one.
Specifically, multichannel distribution control end unit 500 can include m transistor, and in the diagram, m transistor is respectively
N51、N52、N53、N54、N55、N56.Wherein, the grid of transistor N51, N54 is electrically connected with clock control signal line CKH1, brilliant
The grid of body pipe N52, N55 is electrically connected with clock control signal line CKH2, the grid and clock control signal of transistor N53, N56
Line CKH3 is electrically connected.First pole of transistor N51, N53, N55 electrically connects respectively with the first data signal transmission wire data1, brilliant
First pole of body pipe N52, N54, N56 electrically connects respectively with the second data signal transmission wire data2, transistor N51, N52, N53,
Second pole of N54, N55, N56 is respectively connecting to each output end out51, out52, out53, out54, out55 and out56.
In comprising the display floater of multichannel assignment control shown in Fig. 5, each data line group includes at least 6 datas
Holding wire, the data signal line group passes through two data signal transmssion line data1 and data2 receiving data voltage signals.Thus,
Adjacent two datas holding wire can be by different data signal transmission wire receiving data voltage signals, then two data signal
Transmission line can respectively transmit the data-signal of positive polarity and the data-signal of negative polarity, so that adjacent data line and public electrode
Between coupled capacitor opposite polarity such that it is able to cancel out each other, so lifted touch-control display panel display effect.
Continuing with reference to Fig. 6, it illustrates the embodiment of the present application offer be applied to display floater as shown in Figure 1 when
Sequence figure.
With reference to Fig. 4 b, Fig. 5, the operation principle of control unit and multichannel assignment control is further retouched
State.As shown in fig. 6, S1, S2, S3 ... Sn-2, Sn-1, Sn are respectively the first row of the display floater shown in Fig. 4 b and sweep to line n
The scanning signal on holding wire 48 is retouched, SW is the signal on the control signal wire 434 shown in Fig. 4 b, and CK1, CK2, CK3 are respectively
Signal on clock control signal line CKH1, CKH2 and CKH3 of multichannel assignment control 44 as shown in Figure 5, d1, d2
Signal in display floater respectively as shown in Figure 4 b on first row data signal line 411 and secondary series data signal line 411.
Each transistor N51-N56 with each transistor in switch element 432 as nmos pass transistor, in multichannel assignment control 44 is
It is illustrated as a example by nmos pass transistor.
From fig. 6 it can be seen that the display for completing a frame picture can divide three phases, the electricity before starting respectively is scanned
The charging neutrality phase in lotus and after phase, sweep time and the end of scan.First stage is the charging neutrality phase, during this period, scanning
The all low level signals of signal on holding wire 48.Switch controlling signal line 434 provides high level signal, multichannel distribution control
Signal on clock control signal line CKH1, CKH2 and CKH3 of unit 44 is high level signal.It is each in switch element 432
Transistor opening, the first test signal line 431 and the second test signal line 433 are by the first signal for receiving through switch element
432 are provided to data signal transmission wire 45, the now each transistor N51-N56 conductings in multichannel assignment control 44, data
Signal transmssion line 45 provides the first signal to pieces of data holding wire 411 through multichannel assignment control 500.Such as Fig. 6 institutes
Show, before a frame picture starts, the polarity of the data voltage signal of first row data signal line and secondary series data signal line with
Data voltage signal opposite polarity in present frame on data signal line, and in charging neutrality phase, data voltage signal d1 and number
The first signal is according to voltage signal d2, first signal for example can be that public voltage signal COM shown in Fig. 6 can also be
Common ground potential signal, now data signal line 411 complete charging neutrality.
Second stage is sweep time.During this period, switch controlling signal line 434 provides low level signal, switch element 432
Each transistor close, each timesharing of line scan signals line 48 provides high level signal and is progressively scanned, clock control signal
Line CKH1, CKH2 and CKH3 timesharing provides high level signal, and data voltage signal is provided to each data signal line with timesharing.This
When data voltage signal d1 and d2 respectively between the signal of same polarity change.
Phase III is the charging neutrality phase after the completion of scanning.During this period, the signal on scan signal line 48 is all
Low level signal.Now data signal line 411 receives the first level signal (i.e. common electrical in Fig. 6 of control unit offer
Pressure signal COM), data signal line 411 completes the charging neutrality after the end of scan.
From fig. 6 it can be seen that by arranging the first signal, can in advance buffer the letter on data signal line 411
Number, data voltage signal is set to target potential, signal variation at short notice is reduced on data signal line, from
And reduce the disturbance to public electrode.
In some optional implementations of the present embodiment, the display for completing a frame picture can divide in two stages
Charging neutrality phase and sweep time before starting Wei not scanned；Or for the charging neutrality phase after sweep time and the end of scan.
The embodiment of the present application additionally provides the driving method for being applied to the display floater that above-mentioned any embodiment is provided, its
In, display floater also includes integrated circuit, and integrated circuit is connected to each multichannel distribution control by a plurality of data signal transmission wire
The input of unit, the above-mentioned driving method for being applied to display floater includes：
Display tempus intercalare between consecutive frame, control unit to data signal line transmits the first signal.Wherein, in phase
In adjacent frame, the data-signal applied on same data signal line has contrary polarity.
In some optional implementations of the present embodiment, control unit also includes that test signal line and switch are single
Unit, each test signal line is connected by switch element with data signal line, and above-mentioned driving method also includes：
During test is shown, to data signal line transmission test signal is shown；Showing tempus intercalare, test signal line
By the first signal transmission for receiving to each data signal line.
In some optional implementations of the present embodiment, the first signal can be ground reference signal, it is also possible to
For public voltage signal.
In this some optional implementation implemented, the above-mentioned display tempus intercalare between consecutive frame, control is single
The first signal is transmitted to each data signal line in unit also to be included：Before present frame starts, control unit to each data are believed
Number line transmits the first signal.Or, after current frame end, control unit to each data signal line transmits the first signal.
Or, before present frame starts and after current frame end, control unit to each data signal line transmits the first signal.
The present embodiment provides a kind of display device 700, as shown in Figure 7.Display device of the present embodiment 700 can be used
In various dresses such as such as smart phone, tablet terminal, mobile telephone, the personal computer of notebook type, game stations
Put.Specifically, the display device includes the display floater mentioned in aforementioned any embodiment.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.People in the art
Member should be appreciated that invention scope involved in the application, however it is not limited to the technology of the particular combination of above-mentioned technical characteristic
Scheme, while also should cover in the case of without departing from the inventive concept, is carried out by above-mentioned technical characteristic or its equivalent feature
Other technical schemes for being combined and being formed.Such as features described above has similar work(with (but not limited to) disclosed herein
The technical scheme that the technical characteristic of energy is replaced mutually and formed.
Claims (18)
1. a kind of display floater, it is characterised in that include：
A plurality of data signal line；
Display pixel array, the display pixel array includes multiple sub-pixels, data signal line described in one and the display picture
The row sub-pixel connection in pixel array, the data signal line is used for each sub-pixel transmission data signal；
Control unit, described control unit is connected with least one data signal line in the data signal line group；
The display intermittent phase that described control unit is used between consecutive frame to each data signal line transmits the first signal, its
In, in consecutive frame, the data-signal applied on same data signal line has contrary polarity.
2. display floater according to claim 1, it is characterised in that described control unit include the first test signal line with
And switch element；
Each first test signal line is electrically connected by the switch element with each data signal line；Between the display
Off period, the first test signal line is by first signal transmission for receiving to each data signal line.
3. according to power require 1 described in display floater, it is characterised in that described control unit also include the second test signal line；
Wherein,
Each first test signal line is electrically connected by the switch element with the odd-numbered data signal line, each described
Second test signal line is electrically connected by the switch element with the even-numbered data signal line；During test is shown,
The first test signal line shows test signal to each data signal line transmission respectively with the second test signal line,
In the display tempus intercalare, the first test signal line believes first signal transmission for receiving to each data
Number line.
4. display floater according to claim 1, it is characterised in that first signal be ground reference signal or
Public voltage signal.
5. display floater according to claim 2, it is characterised in that the switch element includes multiple transistors；It is described
Display floater also includes switch controlling signal line, wherein,
The grid of each transistor is connected to the switch controlling signal line, and the first pole of each transistor is connected to described
First test signal line, the second pole of each transistor is connected to the data signal line.
6. display floater according to claim 3, it is characterised in that the switch element includes multiple transistors and opens
Close control signal wire；Wherein,
The grid of each transistor is connected to the switch controlling signal line, the first pole connection of transistor described in odd number
To the first test signal line, the first pole of transistor described in even number is connected to the second test signal line, and the strange
Second pole of several transistors electrically connects with data signal line described in odd number, the second of transistor described in even number
Pole electrically connects with data signal line described in even number.
7. display floater according to claim 5, it is characterised in that the display floater also includes flexible PCB, institute
State the first test signal line and be connected to the flexible PCB.
8. display floater according to claim 7, it is characterised in that the second test signal line is connected to the flexibility
Circuit board.
9. display floater according to claim 8, it is characterised in that the display floater also includes detection pad, described
First test signal line, the second test signal line are connected by the detection pad with the flexible PCB；The inspection
Surveying pad is used for first signal transmission for receiving the flexible PCB to each data signal line.
10. display floater according to claim 2, it is characterised in that the display floater also distributes including multiple multichannels
Control unit and a plurality of data signal transmission wire；
The a plurality of data signal line is divided into multiple data signal line groups, wherein, each data signal line group includes m bar numbers
According to holding wire, m is positive integer；
The multichannel assignment control includes multiple signal input parts, and each multichannel assignment control passes through at least one
Data signal transmission wire is connected with the switch element, and each first test signal line is by the switch element and the number
Electrically connect according to signal transmssion line；
The gating control cells also include multiple signal output parts, each signal output part and one of data wire
Every data holding wire in group connects one to one.
11. display floaters according to claim 10, it is characterised in that the display floater also includes integrated circuit, institute
State the input that integrated circuit is connected to each multichannel assignment control by a plurality of data signal transmission wire；
Each multichannel assignment control is used to receive what the integrated circuit sent by each data signal transmission wire
Data voltage signal, and by the data voltage signal time sharing transmissions to each described data signal line being connected electrically.
12. display floaters according to claim 10, it is characterised in that the display floater also include multiple transistors with
And switch controlling signal line；Wherein,
The grid of each transistor is connected to the switch controlling signal line, and the first pole of each transistor is connected to described
First test signal line, the second pole of each transistor is connected to the data signal transmission wire.
13. display floaters according to claim 10, it is characterised in that the switch element include multiple transistors and
Switch controlling signal line；Wherein,
The grid of each transistor is connected to the switch controlling signal line, the first pole connection of transistor described in odd number
To the first test signal line, the first pole of transistor described in even number is connected to the second test signal line, and the strange
The wherein data signal transmssion line that second pole of several transistors is connected with each multichannel assignment control
Electrical connection, the other data that the second pole of transistor described in even number is connected with each multichannel assignment control
Signal transmssion line is electrically connected.
A kind of 14. driving methods, the display floater being applied to as described in any one of claim 1-13, it is characterised in that described
Driving method includes：
Display tempus intercalare between consecutive frame, described control unit to each data signal line transmits the first signal, its
In, in consecutive frame, the data-signal applied on same data wire has contrary polarity.
15. methods according to claim 14, it is characterised in that described control unit also includes test signal line and opens
Unit is closed, each test signal line is connected by the switch element with each data signal line；Methods described also includes：
During test is shown, to each data signal line transmission test signal is shown；
In the display tempus intercalare, the test signal line believes first signal transmission for receiving to each data
Number line.
16. methods according to claim 14, it is characterised in that first signal is ground reference signal or public affairs
Common voltage signal.
17. methods according to claim 15, it is characterised in that the display tempus intercalare between consecutive frame, institute
State control unit includes to the first signal of each data signal line transmission：
Before present frame starts, described control unit to each data signal line transmits the first signal；Or,
After current frame end, described control unit to each data signal line transmits the first signal；Or,
Before present frame starts and after current frame end, described control unit to each data signal line transmission first is believed
Number.
18. a kind of display devices, it is characterised in that the display device includes the display surface as described in one of claim 1-13
Plate.
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