CN106652958A - Gate drive circuit and control method - Google Patents

Gate drive circuit and control method Download PDF

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Publication number
CN106652958A
CN106652958A CN201710029223.4A CN201710029223A CN106652958A CN 106652958 A CN106652958 A CN 106652958A CN 201710029223 A CN201710029223 A CN 201710029223A CN 106652958 A CN106652958 A CN 106652958A
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Prior art keywords
transistor
grid
module
drive element
driver circuit
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CN201710029223.4A
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CN106652958B (en
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乔艳冰
李海波
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InfoVision Optoelectronics Kunshan Co Ltd
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InfoVision Optoelectronics Kunshan Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a gate drive circuit and a control method. The gate drive circuit comprises multiple stages of gate drive units, wherein each stage of gate drive unit comprises a pre-charging module, a stabilizing module, an output module, and further comprises a resetting module; the pre-charging module is used for pre-charging a first node in accordance with a previous stage of gate drive signal; the stabilizing module is used for changing voltage of a second node in accordance with a later stage of gate drive signal; the output module is used for generating a current stage of gate drive signal in accordance with voltage of the first node, the voltage of the second node and an output clock signal; and the resetting module, under the control of a switching signal, is used for changing a level state of the second node so as to compensate a threshold voltage of a selected transistor. According to the gate drive circuit and the control method of the embodiment, by adding the resetting module, the threshold voltage of the selected transistor is compensated under a standby mode, so that the service life of the selected transistor is prolonged, and moreover, circuit power consumption is reduced.

Description

Gate driver circuit and control method
Technical field
The present invention relates to display technology field, more particularly to gate driver circuit and control method.
Background technology
It is many excellent that liquid crystal indicator (Liquid Crystal Display, LCD) possesses frivolous, energy-conservation, radiationless etc. Point, therefore gradually replaced traditional cathode-ray tube (CRT) display.
At present liquid crystal display is widely used in HD digital TV, desktop computer, personal digital assistant (PDA), in the electronic equipment such as notebook computer, mobile phone, digital camera.
Liquid crystal indicator mainly includes display floater and drive circuit.Wherein, display floater include multi-strip scanning line with A plurality of data lines, and every scan line intersects to form a pixel cell with every data line.Each pixel cell at least includes One thin film transistor (TFT) (Thin-film Transistor, TFT).Drive circuit mainly includes:Gate driver circuit (Gate ) and source electrode drive circuit (Source Driver) Driver.With the producer cost degradation of liquid crystal indicator is pursued with And the raising of manufacturing process, the glass that the drive circuit integrated chip beyond display floater is arranged at display floater is arranged at originally Become possibility on glass substrate.For example, integrated raster data model (Gate Driver InArray, GIA) technology exactly drives grid Dynamic circuit is integrated on display floater and makes display panels realize the simplification of narrow frame and manufacture process, while can Reduce production cost.
Display floater is with the basic functional principle of drive circuit:Gate driver circuit with scan line by being electrically connected with Pull up transistor and send gate drive signal to gate line, sequentially open the TFT of every a line, it is then same by source electrode drive circuit When the pixel cell of one full line is charged to each needed for voltage, to show different GTGs.I.e. first by the grid of the first row Pole drive circuit is pulled up transistor by it and opens the thin film transistor (TFT) of the first row, then by source electrode drive circuit to the first row Pixel cell be charged.When the pixel cell of the first row is charged, gate driver circuit just closes the row thin film transistor (TFT) Close, then the gate driver circuit of the second row is pulled up transistor by it and opens the thin film transistor (TFT) of the second row, then by source electrode Drive circuit carries out discharge and recharge to the pixel cell of the second row.So sequentially go down, when the pixel cell to last column is completed During charging, just start to charge up from the first row again.
Gate driver circuit generally includes multiple switch element, and it utilizes the control signals such as clock signal to multiple switch unit The grid of part applies positive voltage or negative voltage, to control the conducting and shut-off of multiple switch element, so as to export preferable grid Drive signal.When the grid of each switch element is applied in the overlong time of positive voltage, its threshold voltage will increase, and cause The power consumption increase of switch element and switching characteristic variation.Due to the partial switch element in gate driver circuit in current technology Grid be constantly in high level state, when the working time of these switch elements is long, the degeneration of switch performance can be caused, Power consumption is not only increased, can also shorten the service life of these switch elements.Simultaneously as the threshold voltage of these switch elements There occurs positive excursion, the function of gate driver circuit may entanglement, so as to affect the normal work of gate driver circuit.
At present, prior art generally solves above-mentioned technical problem using following three kinds of methods:1st, by the adjustment to processing procedure Improve the threshold voltage shift degree of thin film transistor (TFT), however, this method with certain operation difficulty, and can not be complete Complete solution is determined the threshold voltage shift problem of thin film transistor (TFT);2nd, using AC signal control gate drive circuit, though this method So can to a certain extent reduce the drift of threshold voltage, but the threshold voltage drift of thin film transistor (TFT) can not be fully solved Shifting problem;3rd, the stable module of two groups of Time-sharing controls is designed in gate driver circuit, with long switch of lengthening working hours In the life-span of element, in this approach, because two groups of stable modules increase chip area, it is unfavorable for realizing liquid crystal indicator Narrow frame.
Therefore, it is necessary to provide a kind of new technical scheme to overcome above technical problem present in prior art.
The content of the invention
The main technical problem to be solved in the present invention is to provide a kind of raster data model electricity that can realize threshold voltage compensation Road and control method.
According to an aspect of the present invention, there is provided a kind of gate driver circuit, including multistage drive element of the grid, per grade of institute Stating drive element of the grid includes:Pre-charge module, for entering line precharge to first node according to prime gate drive signal;Surely Cover half block, for changing the voltage of Section Point according to rear class gate drive signal;Output module, with the precharge mould First input end that the output end of block is connected at the first node and with the output end of the stable module described the The second input being connected at two nodes, the output module is used for voltage, the Section Point according to the first node Voltage and output clock signal produce this grade of gate drive signal, wherein, per grade of drive element of the grid also includes weight Module is put, the level state that the replacement module is used to change under the control of switching signal the Section Point is selected to compensate The threshold voltage of transistor.
Preferably, in per grade of drive element of the grid, the replacement module includes the first transistor, and described first is brilliant The grid of body pipe receives the switching signal, source electrode reception power at very low levels voltage, drain is connected with the Section Point.
Preferably, in per grade of drive element of the grid, the magnitude of voltage of the power at very low levels voltage is 0 or negative value.
Preferably, in per grade of drive element of the grid, the output module includes third transistor, the 4th transistor And the 5th transistor, the drain electrode of the 5th transistor described in the 4th transistor AND gate is connected and exports described level raster data model The source ground of signal, the third transistor and the 5th transistor, the drain electrode of the third transistor and the described 4th The grid of transistor is connected in the first node, and the grid of the third transistor is connected with the grid of the 5th transistor In the Section Point, the source electrode of the 4th transistor receives the output clock signal.
Preferably, in per grade of drive element of the grid, the selected transistor is the third transistor and described 5th transistor.
Preferably, in per grade of drive element of the grid, the prime gate drive signal is by this grade of raster data model list The front x levels drive element of the grid output of unit, the rear class gate drive signal is driven by the rear x levels grid of this grade of drive element of the grid Moving cell is exported, and x is non-zero natural number.
Preferably, in per grade of drive element of the grid, the pre-charge module include transistor seconds, described second The grid of transistor receives the prime gate drive signal, source electrode and receives high level supply voltage or input clock signal or institute State prime gate drive signal, drain electrode to be connected with the first node.
Preferably, the transistor in drive element of the grid at different levels is realized by the thin film transistor (TFT) of n-type doping.
According to a further aspect in the invention, a kind of control method for gate driver circuit is also provided, including:There is provided and use In switching display pattern and the switching signal of standby mode;When the switching signal is invalid, the gate driver circuit enters Enter the display pattern, the gate driver circuit exports gate drive signal;When the switching signal is effective, the grid Pole drive circuit enters the standby mode, and the gate driver circuit changes the level state for selecting transistor gate to compensate The threshold voltage of the selected transistor.
Preferably, the gate driver circuit includes multistage drive element of the grid, and per grade of drive element of the grid includes Pre-charge module, output module and stable module, the selected transistor is located in the output module, the selected crystal The grid of pipe is connected with the output end of the stable module, and the switching signal drags down the output end voltage of the stable module To change the level state of the grid voltage of the selected transistor.
Gate driver circuit according to embodiments of the present invention and control method, by adding weight in gate driver circuit Put module so that gate driver circuit is chronically in display mode the threshold voltage of the thin film transistor (TFT) of conducting state and is treating Be compensated under machine pattern, so as to recover gate driver circuit in be chronically in display mode conducting state film it is brilliant The threshold voltage of body pipe, not only extends the life-span of thin film transistor (TFT), while also reducing the power consumption of gate driver circuit, reducing The error rate of gate driver circuit output.
Description of the drawings
By referring to the drawings to the description of the embodiment of the present invention, the above-mentioned and other purposes of the present invention, feature and Advantage will be apparent from.
Fig. 1 illustrates the structural representation of the display device of first embodiment of the invention.
Fig. 2 illustrates the electrical block diagram of i-stage drive element of the grid in the display device of first embodiment of the invention.
Fig. 3 illustrates the basic time diagram of the drive element of the grid of first embodiment of the invention.
Fig. 4 illustrates the part schematic flow sheet of the control method of the gate driver circuit of second embodiment of the invention.
Specific embodiment
The present invention is more fully described hereinafter with reference to accompanying drawing.In various figures, identical element is attached using what is be similar to Icon is remembered to represent.For the sake of clarity, the various pieces in accompanying drawing are not necessarily to scale.Additionally, may not show in figure Go out some known parts.
Describe hereinafter many specific details of the present invention, the structure of such as device, material, size, place's science and engineering Skill and technology, to be more clearly understood that the present invention.But just as the skilled person will understand, can not press The present invention is realized according to these specific details.
Fig. 1 illustrates the structural representation of the display device of first embodiment of the invention.
As shown in figure 1, the display device 100 of first embodiment of the invention includes display floater 110, is integrated in display floater On gate driver circuit and source electrode drive circuit 130.
Display floater 110 include lining up the m × n pixel cell 111 of m n array, n bar scan lines G [1] to G [n] with And m data line D [1] to D [m], m and n are respectively non-zero natural number.In each pixel cell 111 comprising pixel electrode and For the transistor of the on or off pixel electrode, the transistor is, for example, thin film transistor (TFT).In display floater 110, The grid phase of each transistor in the pixel cell of same a line (horizontal direction of " OK " for example shown in corresponding diagram) Even and to the fringe region of display floater draw a scan line, side of the n rows pixel cell to the one or both sides of display floater 110 Alternately draw scan line G [1] to G [n] in edge region;Positioned at same row (longitudinal direction of " row " for example shown in corresponding diagram) Pixel cell in the source electrode of each transistor be connected and draw a data line, m row pixel cell draws respectively data wire D [1] to D [m];In each pixel cell, the drain electrode of transistor is connected with pixel electrode.
Source electrode drive circuit 130 is that data wire D [1] to D [m] offer data-signals cause each pixel cell receiving data Voltage.
Gate driver circuit includes multistage drive element of the grid 120, and every grade of drive element of the grid is exported respectively for driving The gate drive signal of corresponding scan line G [1] to G [n] on display floater, for controlling the choosing of each row pixel cell Logical and shut-off.
Fig. 2 illustrates the electrical block diagram of i-stage drive element of the grid in the display device of first embodiment of the invention. Wherein i is the natural number more than 1 and less than n.
As shown in Fig. 2 i-stage drive element of the grid 120 includes pre-charge module 121, output module 122, stable module 123 and reset module 124.Pre-charge module 121 is used for the prime raster data model exported according to prime drive element of the grid Signal completes the precharge of first node Q, and output module 122 is used to provide this grade of grid according to first node Q and Section Point QB This grade of gate drive signal VG [i] of pole driver element output.Stable module 123 is used for defeated according to rear class drive element of the grid institute Rear class gate drive signal VG [i+x] for going out changes the voltage of Section Point QB.Wherein, rear class gate drive signal can be by rear The gate drive signal that one or more levels drive element of the grid is exported, i.e. x are non-zero natural number.
Pre-charge module can be realized by one or more transistors.Pre-charge module 121 for example shown in Fig. 2 includes crystalline substance The grid of body pipe M4, transistor M4 receives prime gate drive signal VG [i-x], the source electrode that prime drive element of the grid is exported Receives input clock signal clk_in either high level supply voltage Vdd or prime gate drive signal VG [i-x], drain electrode with First node Q is connected.Wherein, the grid that prime gate drive signal can be exported by previous stage or multistage drive element of the grid Drive signal, i.e. x are non-zero natural number.
Output module can be realized by multiple transistors.Such as output module 122 described in Fig. 2 includes transistor M1 extremely M3, the wherein drain electrode of transistor M1 are connected for the raster data model letter for exporting this grade of drive element of the grid with the drain electrode of transistor M3 Number VG [i], the grid of transistor M2 and the grid of transistor M3 are connected with Section Point QB, the grid and transistor of transistor M1 The drain electrode of M3 is connected with first node Q, and the source electrode of transistor M3 and the source electrode of transistor M2 receive the first power at very low levels voltage The drain electrode of Vss (voltage of the first power at very low levels voltage Vss be, for example, 0 or negative value), transistor M1 receives output clock signal clk_out。
Stable module 123 is supplied according to rear class gate drive signal VG [i+x] and stable clock signal clk_s, high level The signals such as piezoelectric voltage Vdd, the first power at very low levels voltage Vss control the voltage of Section Point QB.
Resetting module 124 includes transistor M5, and the grid of wherein transistor M5 receives switching signal sw, source electrode and receives second Power at very low levels voltage VL (voltage of the second power at very low levels voltage VL be, for example, 0 or negative value), drain electrode and Section Point QB phases Even.
Transistor M1 to M5 shown in Fig. 2 is the thin film transistor (TFT) of n-type doping.
The display device of first embodiment of the invention mainly has display pattern and standby mode.In display mode, grid Each row pixel cell during the drive element of the grid at different levels included in drive circuit pass through line by line scan line to pel array is exported Gate drive signal VG [1] to VG [n], so that display floater display image under the driving of source electrode drive circuit;In standby mould Under formula, the not display image of the display floater in display device.
Fig. 3 illustrates the basic time diagram of the drive element of the grid of first embodiment of the invention.
In display mode, the course of work of the drive element of the grid 120 of first embodiment of the invention is divided into multiple work Stage, with reference to the drive element of the grid shown in Fig. 2 circuit structure and Fig. 3 shown in drive element of the grid sequential point It is not described.
As shown in Fig. 3 and Fig. 2, in pre-charging stage T1 of drive element of the grid, output clock signal clk_out is low Level, the voltage of the Section Point QB that stable module 123 is provided is low level, and now transistor M2 and M3 are closed. Meanwhile, the gate drive signal VG [i-x] of prime drive element of the grid output is high level, therefore transistor M4 turns on and start Charge to first node Q, so that transistor M1 is changed to conducting state by off state.Due to exporting clock signal clk_ Out is low level, therefore the gate drive signal VG [i] of this grade of drive element of the grid output also exports low level.
In the charging stage T2 of drive element of the grid, the gate drive signal VG [i- of prime drive element of the grid output X] it is low level, the voltage of the Section Point QB of the output of stable module 123 is low level.Therefore transistor M4 is changed into turning off shape State, transistor M2 and M3 is also at off state, causes first node Q to be in vacant state.In the most elementary of charging stage T2 Section, output clock signal clk_out is high level by low transition.Transistor M1 is in the conduction state, and it drains and source electrode Between voltage rapid increase, the current potential of hanging first node Q also raises therewith, realizes bootstrapping (Bootstrap).Due to crystalline substance The grid voltage of body pipe M1 is raised, and the ducting capacity of transistor M1 strengthens, so as to the driving force of drive element of the grid is obtained Strengthen.
In the drop-down stage T3 of drive element of the grid, output clock signal clk_out be low level, stable module 123 The voltage of the Section Point QB of output is high level, and M2 and M3 are in the conduction state for transistor.With this grade of drive element of the grid pair The electric charge on transistor gate in the connected pixel cell of scan line G [i] answered can be discharged by transistor M2.At this During, transistor M1 is gradually changed into off state by conducting state, before transistor M1 is turned off, due to exporting clock letter Number clk_out is in low level state, brilliant in the connected pixel cell of scan line G [i] corresponding with this grade of drive element of the grid Electric charge on body tube grid still can be discharged by M1.So as to comprising two electric discharge roads in each drive element of the grid 120 Footpath so that the gate drive signal VG [i] that this grade of drive element of the grid is exported is converted to low level by high level.
In the low level maintenance stage T4 of drive element of the grid, stable module 123 persistently provides high to Section Point QB Level voltage so that transistor M2 and M3 are continuously in conducting state.So as to the voltage of first node Q is pulled down to by transistor M3 Low level, i.e. transistor M1 is held off;Transistor M2 is turned on so that the grid drive that this grade of drive element of the grid is exported Dynamic signal VG [i] is maintained at low level state.But in this stage, because the voltage of Section Point QB will keep for a long time In high level, therefore transistor M2 and M3 will be kept on for a long time.Each transistor is by low stability, low reliability TFT realize, can cause the threshold voltage of TFT that positive excursion occurs because TFT long-times receive forward bias, therefore in this rank Section, the threshold voltage of transistor M2 and M3 will occur positive excursion.
The display device for being first embodiment of the invention to the description content of each stage T1 to T4 above is in display mode Temporal aspect, now switching signal sw be in low level.Come interim when the tsw moment, drive element of the grid 120 enters standby mould Formula.
In stand-by mode, switching signal sw is high level by low transition.Due to reset module 124 in, crystal The grid of pipe M5 receive switching signal sw, source electrode receive the second power at very low levels voltage VL (the second power at very low levels voltage VL's Magnitude of voltage be, for example, 0 or negative value), therefore transistor M5 turn on so that the voltage of Section Point QB is pulled low, transistor M2 and M3 The level state of grid voltage change, i.e. the grid bias of transistor M2 and M3 is anti-phase.Therefore in stand-by mode, transistor The threshold voltage of M2 and M3 can produce the positive excursion produced under anti-phase drift motion compensation display pattern, make transistor M2 and M3 Switching characteristic is restored, so as to reduce the unnecessary power consumption that drive element of the grid is produced due to the drift of threshold voltage.
Gate driver circuit according to a first embodiment of the present invention, by adding in gate driver circuit module is reset, So that the threshold voltage that gate driver circuit is chronically in display mode the transistor of conducting state is obtained in stand-by mode To compensation, so as to recover the threshold voltage of these transistors, the life-span of these transistors is not only extended, while also reducing The power consumption of gate driver circuit, the error rate for reducing gate driver circuit output.
Fig. 4 illustrates the part schematic flow sheet of the control method of the gate driver circuit of second embodiment of the invention.Including Step S201 to S203.
Gate driver circuit includes multistage drive element of the grid, every grade of drive element of the grid mainly include pre-charge module, Output module and stable module.
In step s 201, there is provided for switching switching signal sw of display pattern and standby mode.
Gate driver circuit has two kinds of mode of operations:Display pattern and standby mode.(the example when switching signal sw is invalid Such as when switching signal sw is low level), execution step S202;When switching signal sw is effective (such as when switching signal sw is During high level), execution step S203.
In step S202, gate driver circuit is in display pattern.Gate driver circuit drives display floater to show Image.
In step S203, display floater is closed, and gate driver circuit is in standby mode.Gate driver circuit changes choosing The level state of grid voltage of thin film transistor (TFT) is determined to compensate the threshold voltage of selected thin film transistor (TFT).
Selected transistor is located in output module, and the grid for selecting transistor is connected with the output end of stable module.Treating Under machine pattern, effectively, the output end voltage of stable module is reduced to low level to change the grid of selected transistor switching signal The level state of voltage.
The control method of gate driver circuit according to a second embodiment of the present invention, it is standby need not carry out that image shows The grid voltage of the transistor under pattern to being chronically at conducting state in display mode in gate driver circuit enters line level The upset of state, so as to recover the threshold voltage of these transistors, not only extends the life-span of these transistors, while also reducing The power consumption of gate driver circuit, the error rate for reducing gate driver circuit output.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality Body or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or deposit between operating In any this actual relation or order.And, term " including ", "comprising" or its any other variant are intended to Nonexcludability is included, so that a series of process, method, article or equipment including key elements not only will including those Element, but also including other key elements being not expressly set out, or also include for this process, method, article or equipment Intrinsic key element.In the absence of more restrictions, the key element for being limited by sentence "including a ...", it is not excluded that Also there is other identical element in process, method, article or equipment including the key element.
According to embodiments of the invention as described above, these embodiments do not have all of details of detailed descriptionthe, not yet It is only described specific embodiment to limit the invention.Obviously, as described above, can make many modifications and variations.This explanation These embodiments are chosen and specifically described to book, is in order to preferably explain the principle and practical application of the present invention, so that affiliated Technical field technical staff can be used well using modification of the invention and on the basis of the present invention.The present invention only receives right The restriction of claim and its four corner and equivalent.

Claims (10)

1. a kind of gate driver circuit, including multistage drive element of the grid, per grade of drive element of the grid includes:
Pre-charge module, for entering line precharge to first node according to prime gate drive signal;
Stable module, for changing the voltage of Section Point according to rear class gate drive signal;
Output module, with the first input end being connected at the first node with the output end of the pre-charge module and The second input being connected at the Section Point with the output end of the stable module, the output module is used for according to institute Voltage, the voltage of the Section Point and the output clock signal for stating first node produces this grade of gate drive signal,
Wherein, per grade of drive element of the grid also includes resetting module, and the replacement module is used for the control in switching signal The lower level state for changing the Section Point is compensating the threshold voltage of selected transistor.
2. gate driver circuit according to claim 1, wherein, in per grade of drive element of the grid, the replacement Module includes the first transistor, and the grid of the first transistor receives the switching signal, source electrode and receives power at very low levels electricity Pressure, drain electrode are connected with the Section Point.
3. gate driver circuit according to claim 2, wherein, in per grade of drive element of the grid, the low electricity The magnitude of voltage of flat supply voltage is 0 or negative value.
4. gate driver circuit according to claim 1, wherein, in per grade of drive element of the grid, the output Module includes third transistor, the 4th transistor and the 5th transistor, the 5th transistor described in the 4th transistor AND gate Drain and be connected and export the source ground of described level gate drive signal, the third transistor and the 5th transistor, The drain electrode of the third transistor and the grid of the 4th transistor are connected in the first node, the third transistor Grid is connected in the Section Point with the grid of the 5th transistor, and the source electrode of the 4th transistor receives the output Clock signal.
5. gate driver circuit according to claim 4, wherein, it is described to select in per grade of drive element of the grid Transistor is the third transistor and the 5th transistor.
6. gate driver circuit according to claim 1, wherein, in per grade of drive element of the grid, the prime Gate drive signal by this grade of drive element of the grid the output of front x levels drive element of the grid, the rear class gate drive signal by The rear x levels drive element of the grid output of this grade of drive element of the grid, x is non-zero natural number.
7. gate driver circuit according to claim 6, wherein, in per grade of drive element of the grid, the preliminary filling Electric module includes transistor seconds, and the grid of the transistor seconds receives the prime gate drive signal, and described second is brilliant The source electrode of body pipe receives high level supply voltage or input clock signal or the prime gate drive signal, second crystal The drain electrode of pipe is connected with the first node.
8. the arbitrary gate driver circuit according to claim 1 to 7, wherein, the transistor in drive element of the grid at different levels Realized by the thin film transistor (TFT) of n-type doping.
9. a kind of control method for gate driver circuit, including:
It is provided for handing off the switching signal of display pattern and standby mode;
When the switching signal is invalid, the gate driver circuit enters the display pattern, the gate driver circuit Output gate drive signal;
When the switching signal is effective, the gate driver circuit enters the standby mode, the gate driver circuit Change the level state for selecting transistor gate to compensate the threshold voltage of the selected transistor.
10. control method according to claim 9, wherein, the gate driver circuit includes multistage drive element of the grid, Per grade of drive element of the grid includes pre-charge module, output module and stable module, and the selected transistor is located at institute State in output module, the grid of the selected transistor is connected with the output end of the stable module, the switching signal is by institute The output end voltage for stating stable module drags down to change the level state of the grid voltage of the selected transistor.
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Cited By (2)

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Publication number Priority date Publication date Assignee Title
CN106971697A (en) * 2017-05-16 2017-07-21 昆山龙腾光电有限公司 Display device
TWI713008B (en) * 2019-11-07 2020-12-11 友達光電股份有限公司 Driving circuit and the operation method thereof

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