CN106637322B - A kind of semi-conductor silicon chip microdot electroplating bath - Google Patents
A kind of semi-conductor silicon chip microdot electroplating bath Download PDFInfo
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- CN106637322B CN106637322B CN201710109734.7A CN201710109734A CN106637322B CN 106637322 B CN106637322 B CN 106637322B CN 201710109734 A CN201710109734 A CN 201710109734A CN 106637322 B CN106637322 B CN 106637322B
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- plating
- groove
- inside groove
- silicon chip
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/026—Electroplating of selected surface areas using locally applied jets of electrolyte
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/02—Tanks; Installations therefor
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The present invention discloses a kind of semi-conductor silicon chip microdot electroplating bath, including plating chamber (1) and bath trough (2)；Plating chamber (1) is divided into outer groove (11) and inside groove (12), inside groove (12) bottom inside places anode electrode plate (31), semi-conductor silicon chip (4) to be plated is shelved on inside groove (12) top perimeter and is evenly distributed in 4 upward protrusions (13), is placed with cathode electrode plate (32) above；Plating solution is formed between plating chamber (1) and bath trough (2) by plating pipe (6) to cycle；Plating liquid pump (5) is equipped in bath trough (2), the outlet of plating liquid pump (5) connects liquid pipe (61) on a plating solution, liquid pipe (61) is through outer groove (11) and inside groove (12) and anode electrode plate (31) on plating solution, with being communicated inside inside groove (12)；Hole for back flow (14) is provided on outer groove (11), hole for back flow (14) is located at outside inside groove (12).The electroplating bath of the present invention, the uniform microdot plating of large-scale semiconductive chip is without generating plating knurl or being adhered.
Description
Technical field
The invention belongs to silicon chip electroplating slot technical field, particularly a kind of uniform microdot electricity of realization large-scale semiconductive chip
The semi-conductor silicon chip microdot electroplating bath plated without generating plating knurl or being adhered.
Background technology
The semiconductor devices such as transistor, diode are widely used in the fields such as mobile phone, computer, transistor, a diode
Often there is the tube core of ten tens of thousands of or more on silicon chip, one silver point of plating is required at the pin of every tube core, in order to pin
Welding.
Due to the size of large-scale semiconductive chip and spacing very little, existing electroplating device was electroplated in silicon chip die pin
It is easy to that plating knurl occurs in journey or is adhered.
The content of the invention
It is an object of the invention to provide a kind of semi-conductor silicon chip microdot electroplating baths, realize that large-scale semiconductive chip is uniform
Microdot plating is without generating plating knurl or being adhered.
Realize the object of the invention technical solution be：
A kind of semi-conductor silicon chip microdot electroplating bath, including plating chamber 1 and bath trough 2；
The plating chamber 1 is divided into outer groove 11 and the circular inner groove 12 being placed in outer groove 11, and 12 bottom inside of inside groove is put
Anode electrode plate 31 is put, 12 top perimeter of inside groove is evenly distributed with 4 upward protrusions 13, described for shelving semi-conductor silicon chip 4 to be plated
Semi-conductor silicon chip 4 to be plated is placed with cathode electrode plate 32 above, and upside down funnel shape kuppe 9 is equipped in the inside groove 12；
Plating solution is formed between the plating chamber 1 and bath trough 2 by plating pipe 6 to cycle；
It is equipped with plating liquid pump 5 in the bath trough 2, the outlet of the plating liquid pump 5 connects liquid pipe 61 on a plating solution, on the plating solution
Liquid pipe 61, with being communicated inside inside groove 12, is set through outer groove 11 and inside groove 12 and anode electrode plate 31 on the plating solution in liquid pipe 61
There is regulating valve 8；
Hole for back flow 14 is provided on the outer groove 11, the hole for back flow 14 is located at outside inside groove 12.
Compared with prior art, the present invention its remarkable advantage is：
1st, microdot plating is uniform：Plating solution is flowing, by the adjusting of vertical feed flow and kuppe, make silicon chip from center to
The concentration gradient of outer plating solution is basically identical, so as to ensure that microdot is grown during plating uniformity.
2nd, do not generate plating knurl or be adhered：By the adjusting of the technological parameters such as flow velocity, microdot will not be produced due to growing too fast
Raw plating knurl is adhered.
The present invention is described in further detail with reference to the accompanying drawings and detailed description.
Description of the drawings
Fig. 1 is the structure diagram of semi-conductor silicon chip microdot electroplating bath of the present invention.
Fig. 2 is the top view of Fig. 1.
Fig. 3 is to utilize the coating bath of the present invention electromicroscopic photograph silver-plated to 5 inches of diode silicon wafers.
In figure, plating chamber 1, outer groove 11, inside groove 12, protrusion 13, hole for back flow 14, bath trough 2, anode electrode plate 31, cathode
Electrode plate 32, semi-conductor silicon chip 4 to be plated plate liquid pump 5, liquid pipe 61 on plating solution, return duct 62, heater 71, and temperature controller 72 is adjusted
Valve 8, kuppe 9.
Specific embodiment
As shown in Figure 1, 2, semi-conductor silicon chip microdot electroplating bath of the present invention, including plating chamber 1 and bath trough 2；The plating
Chamber 1 is divided into outer groove 11 and the circular inner groove 12 being placed in outer groove 11, and 12 bottom inside of inside groove places anode electrode plate 31, interior
12 top perimeter of slot is evenly distributed with 4 upward protrusions 13, for shelving semi-conductor silicon chip 4 to be plated, on the semi-conductor silicon chip 4 to be plated
Face is placed with cathode electrode plate 32；Plating solution is formed between the plating chamber 1 and bath trough 2 by plating pipe 6 to cycle；The bath trough
Plating liquid pump 5 is equipped in 2, the outlet of the plating liquid pump 5 connects liquid pipe 61 on a plating solution, and liquid pipe 61 passes through 11 He of outer groove on the plating solution
Inside groove 12 and anode electrode plate 31, with being communicated inside inside groove 12；Hole for back flow 14, the hole for back flow 14 are provided on the outer groove 11
Outside inside groove 12.
It plates liquid pump 5 and preferably uses immersible pump.
To ensure bath temperature, heater 71 and temperature controller 72 are equipped in the bath trough 12.
Flow quantity and discharge velocity are plated accurately to adjust and controlling, liquid pipe 61 is equipped with regulating valve 8 on the plating solution.
It is described to ensure that semi-conductor silicon chip 4 to be plated is accurately shelved in the uniformly distributed multiple protrusions 13 of 12 top perimeter of inside groove
The outer diameter of inside groove 12 is equal with the diameter of semi-conductor silicon chip 4 to be plated.
By the adjusting of vertical feed flow and kuppe, silicon chip is made to flow the concentration gradient basic one of plating solution from center to outer
It causes, so as to ensure the uniformity of microdot electrode growth during plating, as an improvement, it is equipped in the inside groove 12 and is inverted leakage
Bucket-shaped kuppe 9.
Meanwhile 9 position-adjustable of kuppe, after stopping plating kuppe top residual plating solution can also be allowed to flow back to.9 top of kuppe
Leakage hole diameter is suitably adjusted according to die size, and die size is big, and required plating solution is more, and bore dia is larger.
Plating liquid energy for ease of being flowed out from inside groove 12 is back in bath trough 2, and a return duct 62 is connect under the hole for back flow 14,
Liquid level is submerged in 62 lower end of return duct.
During plating, plating solution is heated to certain temperature first, regulates the valve 8 on pipe, by semi-conductor silicon chip 4 to be plated
It need to plate and be put on 12 top of inside groove down, cathode electrode plate 32 is placed above in semi-conductor silicon chip 4 to be plated, start plating liquid pump 5, it will
Plating solution is sent by liquid pipe on plating solution 61 in inside groove 12, after being controlled by kuppe 9, the plating solution of flowing and semi-conductor silicon chip 4 to be plated
Surfacing is needed to contact, after its plating, outer groove is spilled over to from the gap between 12 top protrusion 13 of inside groove and semi-conductor silicon chip to be plated 4
Bath trough 2 is flowed back in space between 11 and inside groove 12 via return duct 62.
Cathode electrode plate 32 plays the role of counterweight and is moved to prevent silicon chip simultaneously.
The anode electrode plate 31 of 12 bottom inside of inside groove is placed on preferably using identical with Bottom Shape in inside groove 12
Electrode plate, middle part open up the hole flowed through for plating solution.
The plating chamber is usually that use is square, and convenient for making bull coating bath, if single head coating bath, cylinder can also be used
Shape.
12 height of inside groove is determined according to die size, electroplating power supply and technique.
Claims (1)
1. a kind of semi-conductor silicon chip microdot electroplating bath,
Including plating chamber (1) and bath trough (2)；
The circular inner groove (12) that the plating chamber (1) is divided into outer groove (11) and is placed in outer groove (11), inside groove (12) bottom
Anode electrode plate (31) is placed in inside, and inside groove (12) top perimeter is evenly distributed with 4 upward protrusions (13), to be plated is partly led for shelving
Body silicon chip (4), the semi-conductor silicon chip (4) to be plated are placed with cathode electrode plate (32) above；
Plating solution is formed between the plating chamber (1) and bath trough (2) by plating pipe (6) to cycle；
Plating liquid pump (5) is equipped in the bath trough (2), the outlet of the plating liquid pump (5) connects liquid pipe (61) on a plating solution, the plating
Liquid pipe (61) is through outer groove (11) and inside groove (12) and anode electrode plate (31) on liquid, with being communicated inside inside groove (12)；
Hole for back flow (14) is provided on the outer groove (11), the hole for back flow (14) is located at outside inside groove (12)；
Heater (71) and temperature controller (72) are equipped in the bath trough (2)；
Liquid pipe (61) is equipped with regulating valve (8) on the plating solution；
The outer diameter of the inside groove (12) is equal with the diameter of semi-conductor silicon chip to be plated (4)；
A return duct (62) is connect under the hole for back flow (14), liquid level is submerged in return duct (62) lower end；
It is characterized in that：
Upside down funnel shape kuppe (9) is equipped in the inside groove (12).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710109734.7A CN106637322B (en) | 2017-02-28 | 2017-02-28 | A kind of semi-conductor silicon chip microdot electroplating bath |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710109734.7A CN106637322B (en) | 2017-02-28 | 2017-02-28 | A kind of semi-conductor silicon chip microdot electroplating bath |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106637322A CN106637322A (en) | 2017-05-10 |
| CN106637322B true CN106637322B (en) | 2018-05-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710109734.7A Active CN106637322B (en) | 2017-02-28 | 2017-02-28 | A kind of semi-conductor silicon chip microdot electroplating bath |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110544636B (en) * | 2019-08-13 | 2020-12-18 | 广东芯华微电子技术有限公司 | Packaging method for improving FOPLP chip circuit yield |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5198089A (en) * | 1991-10-29 | 1993-03-30 | National Semiconductor Corporation | Plating tank |
| US5441629A (en) * | 1993-03-30 | 1995-08-15 | Mitsubishi Denki Kabushiki Kaisha | Apparatus and method of electroplating |
| CN2437696Y (en) * | 2000-06-27 | 2001-07-04 | 苏兆辉 | Bath for selection plating production line of IC lead frame |
| CN1511977A (en) * | 2002-12-30 | 2004-07-14 | 清华大学 | Electroplating cup with adjustable spacing between cathode, anode and uniform stream plate in wafer level package |
-
2017
- 2017-02-28 CN CN201710109734.7A patent/CN106637322B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5198089A (en) * | 1991-10-29 | 1993-03-30 | National Semiconductor Corporation | Plating tank |
| US5441629A (en) * | 1993-03-30 | 1995-08-15 | Mitsubishi Denki Kabushiki Kaisha | Apparatus and method of electroplating |
| CN2437696Y (en) * | 2000-06-27 | 2001-07-04 | 苏兆辉 | Bath for selection plating production line of IC lead frame |
| CN1511977A (en) * | 2002-12-30 | 2004-07-14 | 清华大学 | Electroplating cup with adjustable spacing between cathode, anode and uniform stream plate in wafer level package |
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| Publication number | Publication date |
|---|---|
| CN106637322A (en) | 2017-05-10 |
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