CN106601201B - Gate driving circuit - Google Patents
Gate driving circuit Download PDFInfo
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- CN106601201B CN106601201B CN201611127387.2A CN201611127387A CN106601201B CN 106601201 B CN106601201 B CN 106601201B CN 201611127387 A CN201611127387 A CN 201611127387A CN 106601201 B CN106601201 B CN 106601201B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
Abstract
The invention discloses a kind of gate driving circuits, it is characterized in that, including multistage drive element of the grid, every grade of drive element of the grid is used to respectively drive a corresponding grid line on display panel, wherein every grade of drive element of the grid respectively includes low-temperature stabilization unit, the low-temperature stabilization unit is used to stablize when environment temperature is lower than first threshold the driving signal and transmitting signal of the same level drive element of the grid output, and the low-temperature stabilization unit includes first switching element to the 12nd switch element.On this basis, the gate driving circuit further includes that the 13rd switch element to the second eighteenmo closes element.Due to increasing low-temperature stabilization unit, gate driving circuit of the invention can be in the case where environment temperature be lower than first threshold, the stability for promoting the transmitting signal of the driving signal of every grade of drive element of the grid output, guarantees that gate driving circuit remains to steady operation in low temperature environment.
Description
Technical field
The invention belongs to field of liquid crystal, more particularly, to a kind of gate driving circuit.
Background technique
Liquid crystal display device has many advantages, such as frivolous, energy saving, radiationless, therefore has gradually replaced traditional cathode
Ray tube display.Liquid crystal display is widely used in HD digital TV, desktop computer, individual digital and helps at present
It manages in the electronic equipments such as (PAD), laptop, mobile phone, digital camera.
By taking thin film transistor (TFT) (Thin Film Transistor, TFT) liquid crystal display device as an example comprising: liquid crystal
Show panel and driving circuit, wherein liquid crystal display panel includes a plurality of grid line and multiple data lines, and two adjacent grids
Line and two adjacent data lines intersect to form a pixel unit, and each pixel unit includes at least a thin film transistor (TFT).
Driving circuit includes gate driving circuit (gate drive circuit) and source electrode drive circuit (source drive
circuit).As the producer is to the cost effective pursuit of liquid crystal display device and the raising of manufacturing process, it is set to originally
Driving circuit integrated chip other than liquid crystal display panel, which is arranged on the glass substrate of liquid crystal display panel, becomes possibility,
For example, grid-driving integrated circuit is set on array substrate (Gate IC in Array, GIA), to simplify liquid crystal
The manufacturing process of showing device, and reduce production cost.
The basic functional principle of liquid crystal display panel and driving circuit are as follows: gate driving circuit with grid line by electrically connecting
Pulling up transistor for connecing sends out gate drive signal to grid line, sequentially opens the TFT of every a line, then by source drive electricity
The pixel unit of one full line is charged to respectively required voltage by road simultaneously, to show different grayscale.I.e. first by the first row
Gate driving circuit pulled up transistor by it and open the thin film transistor (TFT) of the first row, then by source electrode drive circuit to the
The pixel unit of a line charges.When the pixel unit of the first row is charged, gate driving circuit is just by the row film crystal
Pipe is closed, and then the gate driving circuit of the second row is pulled up transistor by it and opens the thin film transistor (TFT) of the second row, then by
Source electrode drive circuit carries out charge and discharge to the pixel unit of the second row.So sequentially go down, when the pixel for last line of having substituted the bad for the good
Unit is just started to charge from the first row again.
But for the liquid crystal display for being applied to vehicle-mounted industry control, since it is in the lower working environment of temperature
In, and too low temperature temperature can impact the on-state characteristic of TFT, and then influence display effect, be unfavorable for liquid crystal display
In the application and popularization of vehicle-mounted industrial control field, this just proposes the driving capability of gate driving circuit and stability and reliability
Higher requirement is gone out.
Summary of the invention
In view of this, which raises in low temperature the technical problem to be solved in the present invention is to provide a kind of gate driving circuit
Driving capability in environment, stability is good and high reliablity.
In order to solve the above-mentioned technical problems, the present invention provides a kind of gate driving circuits, including multistage gate driving list
Member, every grade of drive element of the grid is used to respectively drive a corresponding grid line on display panel, wherein every grade of gate driving
Unit respectively includes low-temperature stabilization unit, and the low-temperature stabilization unit is used to stablize this when environment temperature is lower than first threshold
The driving signal and transmitting signal of grade drive element of the grid output.
Preferably, the low-temperature stabilization unit includes: first switching element, including the first path terminal, alternate path end and
First control terminal, first path terminal are connected with first control terminal, and receive the first low-temperature stabilization signal；Second switch
Element, including third path end, fourth passage end and the second control terminal, the third path end and the second control terminal phase
Even, and the second low-temperature stabilization signal is received；Third switch element, including fifth passage end, the 6th path terminal and third control terminal,
The fifth passage end receives the first reference level, and the 6th path terminal is connected with the third path end, the third control
End processed is connected with first path terminal；4th switch element, including the 7th path terminal, the 8th path terminal and the 4th control terminal,
7th path terminal is connected with the alternate path end, and the 4th control terminal is connected with the fourth passage end；5th opens
Close element, including the 9th path terminal, the tenth path terminal and the 5th control terminal, the tenth path terminal and the 8th path terminal phase
Even, the 5th control terminal is connected with the alternate path end；6th switch element, including the 11st path terminal, the tenth two-way
Terminal and the 6th control terminal, the 11st path terminal are connected with the tenth path terminal, the 12nd path terminal with it is described
9th path terminal is connected, and the 6th control terminal is connected with the third path end；7th switch element, including the tenth three-way
End, the 14th path terminal and the 7th control terminal, the 7th control terminal are connected with the 5th control terminal；8th switch element,
Including the 15th path terminal, the 16th path terminal and the 8th control terminal, the 15th path terminal and the 14th path terminal
It is connected, the 16th path terminal is connected with the tenth threeway terminal, the 8th control terminal and the 6th control terminal phase
Even；9th switch element, including the 17th path terminal, the 18th path terminal and the 9th control terminal, the 18th path terminal with
15th path terminal is connected, and the 9th control terminal is connected with the 7th control terminal；Tenth switch element, including the tenth
Nine path terminals, the 20th path terminal and the tenth control terminal, the 19th path terminal receive the second reference level and with described the
18 path terminals are connected, and the 20th path terminal is connected with the 17th path terminal, the tenth control terminal and described the
Eight control terminals are connected；11st switch element, including the 21st path terminal, the 22nd path terminal and the 11st control terminal,
22nd path terminal is connected with the alternate path end；12nd switch element, including the 20th threeway terminal, second
14 path terminals and the 12nd control terminal, the 24th path terminal are connected with the third path end, and the described 23rd
Path terminal is connected with the 21st path terminal, and the 12nd control terminal is connected with the 11st control terminal.
Preferably, every grade of drive element of the grid difference further include: the 13rd switch element, including the 25th access
End, the 26th path terminal and the 13rd control terminal, the first pulse signal of the 25th path terminal reception, the described 13rd
Control terminal receives the second pulse signal；14th switch element, including the 27th path terminal, the 28th path terminal and the tenth
Four control terminals, the 27th path terminal are connected with the 26th path terminal, and the 28th path terminal receives the
Two clock signals, the 14th control terminal receive third pulse signal；15th switch element, including the 29th access
End, the 30th path terminal and the 15th control terminal, the 29th path terminal receive the first clock signal, and the described 30th is logical
Terminal is connected by first capacitor with the 15th control terminal, and the driving signal for exporting the same level drive element of the grid,
15th control terminal is connected with the 27th path terminal；Sixteenmo closes element, including the 31st path terminal, the
32 path terminals and the 16th control terminal, the 31st path terminal are connected with the 29th path terminal, and described
32 path terminals are used to export the transmitting signal of the same level drive element of the grid, the 16th control terminal and the 15th control
End processed is connected；17th switch element, including the 30th threeway terminal, the 34th path terminal and the 17th control terminal, it is described
30th threeway terminal is connected with the 21st path terminal, the 17th control terminal and the 27th path terminal phase
Even；Eighteenmo pass element, including the 35th path terminal, the 36th path terminal and the 18th control terminal, the described 30th
Five path terminals are connected with the 21st path terminal, the 18th control terminal and the 17th control terminal and the described tenth
One control terminal is connected simultaneously；19th switch element, including the 37th path terminal, the 38th path terminal and the 19th control
End, the 37th path terminal receive the first stabilization signal and are connected with the 19th control terminal, and the described 38th is logical
Terminal is connected with the 34th path terminal；20th switch element, including the 39th path terminal, the 40th path terminal and
20th control terminal, the 39th path terminal are connected with the 36th path terminal, and the 40th path terminal receives
Second stabilization signal is simultaneously connected with the 20th control terminal；21st switch element, including the 41st path terminal, the 4th
12 path terminals and the 21st control terminal, the 41st path terminal and the 20th threeway terminal and the described 8th are led to
Terminal simultaneously be connected, the 42nd path terminal is connected with the 39th path terminal, the 21st control terminal and
37th path terminal is connected；22nd switch element, including the 40th threeway terminal, the 44th path terminal and
22 control terminals, the 40th threeway terminal are connected with the 38th path terminal, and the 44th path terminal connects
It receives first reference level and is connected with the 42nd path terminal, the 22nd control terminal is logical with the described 40th
Terminal is connected；23rd switch element, including the 45th path terminal, the 46th path terminal and the 23rd control terminal,
45th path terminal is connected with the 15th control terminal, the 46th path terminal and the 41st access
End is connected, and the 23rd control terminal is connected with the 40th threeway terminal；24th switch element, including the 40th
Seven path terminals, the 48th path terminal and the 24th control terminal, 47 path terminal and the 46th path terminal
It is connected, the 48th path terminal is connected with the 9th path terminal, the 24th control terminal and the described 42nd
Path terminal is connected；25th switch element, including the 49th path terminal, the 50th path terminal and the 25th control terminal,
49th path terminal is connected with the 30th path terminal and the tenth threeway terminal, and the 50th path terminal receives the
Two reference levels, the 25th control terminal are connected with the 23rd control terminal；Second sixteenmo pass element, including the
51 path terminals, the 52nd path terminal and the 26th control terminal, the 51st path terminal are logical with the described 50th
Terminal is connected, and the 52nd path terminal is connected with the tenth threeway terminal, the 26th control terminal and described the
24 control terminals are connected；27th switch element, including the 50th threeway terminal, the 54th path terminal and the 27th
Control terminal, the 50th threeway terminal are connected with the 32nd path terminal, the 54th path terminal and described the
50 path terminals are connected, and the 27th control terminal is connected with the 25th control terminal；Second eighteenmo closes element, packet
Include the 55th path terminal, the 56th path terminal and the 28th control terminal, the 55th path terminal and the described 5th
14 path terminals are connected, the 56th path terminal and the 17th path terminal and the 50th threeway terminal phase simultaneously
Even, the 28th control terminal is connected with the 26th control terminal.
Preferably, the level of first stabilization signal corresponds to third reference level, the electricity of second stabilization signal
It is flat to correspond to the second reference level；Within the second duty cycle, the level of first stabilization signal corresponds to second with reference to electricity
Flat, the level of second stabilization signal corresponds to third reference level.
Preferably, when environment temperature is greater than or equal to first threshold, within the first duty cycle and the second duty cycle, institute
The level for stating the first low-temperature stabilization signal and the second low-temperature stabilization signal corresponds to the second reference level.
Preferably, when environment temperature is lower than first threshold, within the first duty cycle, the first low-temperature stabilization signal
Level corresponds to third reference level, and the level of the second low-temperature stabilization signal corresponds to the second reference level；In the second work
Make in the period, the level of the first low-temperature stabilization signal corresponds to the second reference level, the second low-temperature stabilization signal
Level corresponds to third reference level.
Preferably, first pulse signal and second pulse signal correspond respectively to the grid for differing three-level upwards
The upper three-level driving signal and upper three-level of driving unit output transmit signal.
Preferably, the lower three-level that the third pulse signal corresponds to the drive element of the grid output of difference three-level downwards is driven
Dynamic signal.
Preferably, the first capacitor be the 15th switch element the 30th path terminal and the 15th control terminal it
Between parasitic capacitance.
Preferably, it is provided between the 30th path terminal and the 15th control terminal of the 15th switch element and independently deposits
Storage is held, and the first capacitor is the parasitism between the 30th path terminal and the 15th control terminal of the 15th switch element
The sum of capacitor and the separate storage capacitor.
Gate driving circuit according to an embodiment of the present invention, can be in the case where environment temperature be lower than first threshold, still
Stability and reliability with higher.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, above-mentioned and other purposes of the invention, feature and
Advantage will be apparent from.
Fig. 1 is that the circuit structure of every level-one drive element of the grid in the gate driving circuit of first embodiment of the invention shows
It is intended to.
Fig. 2 to Fig. 6 is the timing of every level-one drive element of the grid in the gate driving circuit of first embodiment of the invention
Figure.
Specific embodiment
Hereinafter reference will be made to the drawings, and the present invention will be described in more detail.In various figures, identical element is using similar attached
Icon is remembered to indicate.For the sake of clarity, the various pieces in attached drawing are not necessarily to scale.In addition, may not show in figure
Certain well known parts out.
Many specific details of the invention, such as structure, material, size, the processing work of device is described hereinafter
Skill and technology, to be more clearly understood that the present invention.But it just as the skilled person will understand, can not press
The present invention is realized according to these specific details.
Gate driving circuit (also referred to as shift register) of the invention includes that multistage drive element of the grid (also referred to as shifts
Deposit unit), the drive element of the grid of every level-one is corresponding with every a line grid line on real panel respectively to be electrically connected, thus
Gate drive signal is sequentially gradually applied on every row grid line.
Fig. 1 is that the circuit structure of every level-one drive element of the grid in the gate driving circuit of first embodiment of the invention shows
It is intended to.The present embodiment gate driving circuit, including multistage drive element of the grid as shown in Figure 1, every grade of drive element of the grid packet
Low-temperature stabilization unit is included, the low-temperature stabilization unit is used to stablize the same level gate driving when environment temperature is lower than first threshold
The driving signal Gn and transmitting signal Zn of unit output.
Wherein, low-temperature stabilization unit includes first switching element M1, second switch element M2, third switch element M3,
Four switch element M4, the 5th switch element M5, the 6th switch element M6, the 7th switch element M7, the 8th switch element M8, the 9th
Switch element M9, the tenth switch element M10, the 11st switch element M11, the 12nd switch element M12.
Specifically, first switching element M1, including the first path terminal, alternate path end and the first control terminal, described first
Path terminal is connected with first control terminal, and receives the first low-temperature stabilization signal VS1；Second switch element M2, including third
Path terminal, fourth passage end and the second control terminal, the third path end are connected with second control terminal, and it is low to receive second
Warm stabilization signal VS2；Third switch element M3, including fifth passage end, the 6th path terminal and third control terminal, the described 5th is logical
Terminal receives the first reference level VSQ, and the 6th path terminal is connected with the third path end, the third control terminal and institute
The first path terminal is stated to be connected；4th switch element M4, including the 7th path terminal, the 8th path terminal and the 4th control terminal, described
Seven path terminals are connected with the alternate path end, and the 4th control terminal is connected with the fourth passage end；5th switch element
M5, including the 9th path terminal, the tenth path terminal and the 5th control terminal, the tenth path terminal are connected with the 8th path terminal,
5th control terminal is connected with the alternate path end；6th switch element M6, including the 11st path terminal, the 12nd access
End and the 6th control terminal, the 11st path terminal is connected with the tenth path terminal, the 12nd path terminal and described the
Nine path terminals are connected, and the 6th control terminal is connected with the third path end；7th switch element M7, including the tenth three-way
End, the 14th path terminal and the 7th control terminal, the 7th control terminal are connected with the 5th control terminal；8th switch element
M8, including the 15th path terminal, the 16th path terminal and the 8th control terminal, the 15th path terminal and the 14th access
End is connected, and the 16th path terminal is connected with the tenth threeway terminal, the 8th control terminal and the 6th control terminal
It is connected；9th switch element M9, including the 17th path terminal, the 18th path terminal and the 9th control terminal, the 18th access
End is connected with the 15th path terminal, and the 9th control terminal is connected with the 7th control terminal；Tenth switch element M10,
Including the 19th path terminal, the 20th path terminal and the tenth control terminal, the 19th path terminal receives the second reference level VGL
And be connected with the 18th path terminal, the 20th path terminal is connected with the 17th path terminal, the tenth control
End is connected with the 8th control terminal；11st switch element M11, including the 21st path terminal, the 22nd path terminal and
11st control terminal, the 22nd path terminal are connected with the alternate path end；12nd switch element M12, including the
20 threeway terminals, the 24th path terminal and the 12nd control terminal, the 24th path terminal and the third path end
It is connected, the 20th threeway terminal is connected with the 21st path terminal, the 12nd control terminal and the described 11st
Control terminal is connected.
Every grade of drive element of the grid further includes the 13rd switch element M13, the 14th switch element M14, the 15th switch
Element M15, sixteenmo close element M16, the 17th switch element M17, eighteenmo and close element M18, the 19th switch element
M19, the 20th switch element M20, the 21st switch element M21, the 22nd switch element M22, the 23rd switch member
Part M23, the 24th switch element M24, the 25th switch element M25, the second sixteenmo pass element M26, the 27th are opened
Close element M27, the second eighteenmo closes element M28.
Specifically, the 13rd switch element M13, including the 25th path terminal, the 26th path terminal and the 13rd control
End processed, the 25th path terminal receive the first pulse signal, and the 13rd control terminal receives the second pulse signal；Tenth
Four switch element M14, including the 27th path terminal, the 28th path terminal and the 14th control terminal, the described 27th is logical
Terminal is connected with the 26th path terminal, and the 28th path terminal receives the second clock signal CLK_B, and the described tenth
Four control terminals receive third pulse signal；15th switch element M15, including the 29th path terminal, the 30th path terminal and
15th control terminal, the 29th path terminal receive the first clock signal CLK_A, and the 30th path terminal passes through first
Capacitor C1 is connected with the 15th control terminal, and the driving signal Gn for exporting the same level drive element of the grid, and the described tenth
Five control terminals are connected with the 27th path terminal；Sixteenmo closes element M16, including the 31st path terminal, the 30th
Two path terminals and the 16th control terminal, the 31st path terminal are connected with the 29th path terminal, and the described 30th
Two path terminals are used to export the transmitting signal Zn of the same level drive element of the grid, the 16th control terminal and the 15th control
End is connected；17th switch element M17, including the 30th threeway terminal, the 34th path terminal and the 17th control terminal, it is described
30th threeway terminal is connected with the 21st path terminal, the 17th control terminal and the 27th path terminal phase
Even；Eighteenmo closes element M18, including the 35th path terminal, the 36th path terminal and the 18th control terminal, the third
15 path terminals are connected with the 21st path terminal, the 18th control terminal and the 17th control terminal and described the
11 control terminals are connected simultaneously；19th switch element M19, including the 37th path terminal, the 38th path terminal and the tenth
Nine control terminals, the 37th path terminal receive the first stabilization signal V1 and are simultaneously connected with the 19th control terminal, and described the
38 path terminals are connected with the 34th path terminal；20th switch element M20, including the 39th path terminal,
40 path terminals and the 20th control terminal, the 39th path terminal are connected with the 36th path terminal, and the described 4th
Ten path terminals receive the second stabilization signal V2 and are connected with the 20th control terminal；21st switch element M21, including the
41 path terminals, the 42nd path terminal and the 21st control terminal, the 41st path terminal and the described 23rd
Path terminal is connected simultaneously with the 8th path terminal, and the 42nd path terminal is connected with the 39th path terminal, institute
The 21st control terminal is stated to be connected with the 37th path terminal；22nd switch element M22, including the 40th three-way
End, the 44th path terminal and the 22nd control terminal, the 40th threeway terminal are connected with the 38th path terminal,
44th path terminal receives the first reference level VSQ and is connected with the 42nd path terminal, and described second
12 control terminals are connected with the 40th path terminal；23rd switch element M23, including the 45th path terminal, the 4th
16 path terminals and the 23rd control terminal, the 45th path terminal are connected with the 15th control terminal, and the described 4th
16 path terminals are connected with the 41st path terminal, the 23rd control terminal and the 40th threeway terminal phase
Even；24th switch element M24, including the 47th path terminal, the 48th path terminal and the 24th control terminal, it is described
47 path terminals are connected with the 46th path terminal, and the 48th path terminal is connected with the 9th path terminal,
24th control terminal is connected with the 42nd path terminal；25th switch element M25, including the 49th is logical
Terminal, the 50th path terminal and the 25th control terminal, the 49th path terminal and the 30th path terminal and the tenth
Threeway terminal is connected, and the 50th path terminal receives the second reference level VGL, the 25th control terminal and described second
13 control terminals are connected；Second sixteenmo closes element M26, including the 51st path terminal, the 52nd path terminal and the 20th
Six control terminals, the 51st path terminal are connected with the 50th path terminal, the 52nd path terminal and described the
Ten threeway terminals are connected, and the 26th control terminal is connected with the 24th control terminal；27th switch element
M27, including the 50th threeway terminal, the 54th path terminal and the 27th control terminal, the 50th threeway terminal and institute
It states the 32nd path terminal to be connected, the 54th path terminal is connected with the 50th path terminal, the 27th control
End processed is connected with the 25th control terminal；Second eighteenmo closes element M28, including the 55th path terminal, the 56th
Path terminal and the 28th control terminal, the 55th path terminal are connected with the 54th path terminal, and the described 50th
Six path terminals are connected simultaneously with the 17th path terminal and the 50th threeway terminal, the 28th control terminal and institute
The 26th control terminal is stated to be connected.
Wherein, first reference level and second reference level are unequal.
In the first embodiment of the invention, received first pulse signal of every grade of drive element of the grid is to differ three-level upwards
The upper three-level driving signal Gn-3 that is exported of drive element of the grid, received second pulse signal is the grid of difference three-level upwards
The upper three-level that pole driving unit is exported transmits signal Zn-3, and received third pulse signal is that the grid of difference three-level downwards drives
The lower three-level driving signal Gn+3 that moving cell is exported.
It is worth noting that, under this connection type, since the first order is not upward to third level drive element of the grid
The drive element of the grid of three-level, grade third from the bottom and drive element of the grid later are differed without differing the grid drive of three-level downwards
Moving cell, so first pulse signal and second pulse signal of the first order to third level drive element of the grid, grade third from the bottom
And the third pulse signal of drive element of the grid later is intended to be provided by external signal circuit.
In this embodiment, it is preferred that it is N-type transistor that first switching element M1, which closes element M28 to the second eighteenmo,.?
In other embodiments, first switching element M1 to the second eighteenmo close element M28 can also using other switch elements and
It realizes, such as P-type transistor.
Fig. 2 to Fig. 6 is referred to, Fig. 2 to Fig. 6 is every level-one grid in the gate driving circuit of first embodiment of the invention
The timing diagram of driving unit.
Every level-one drive element of the grid each duty cycle is divided into pre-charging stage, the pull-up stage, the drop-down stage, stablizes rank
4 stages of section.
Within the first duty cycle, Fig. 2 is referred to, the gate driving circuit of first embodiment of the invention is shown in Fig. 2
In every first duty cycle of level-one drive element of the grid in part signal timing diagram, when environment temperature be greater than or equal to first
When threshold value, the corresponding second reference potential VGL of the current potential of the first low-temperature stabilization signal VS1 and the second low-temperature stabilization signal VS2, because
And first switching element M1 to the tenth switch element M10 is turned off, low-temperature stabilization unit does not work.
Pre-charging stage: referring to Figure 1 and Fig. 3, correspond to T1, the first pulse signal Zn-3 is by the second reference level VGL
Become third reference level VGH, the second pulse signal Gn-3 becomes third reference level VGH, and from the second reference level VGL
When one clock signal CLK_A becomes the second reference level VGL from third reference level VGH, the 13rd switch element M13 conducting,
Node Q is precharged by the 13rd switch element M13 switched on, and further, the second pulse signal Gn-3 is by the second ginseng
When examining level VGL becomes third reference level VGH, by the parasitic capacitance of the 13rd switch element M13 by the first pulse signal
Zn-3 is coupled to the current potential higher than third reference level VGH, so that the 13rd switch element M13 is further opened, accelerates
The pre-charge process of node Q, makes the current potential of node Q be thus lifted to VGH-Vth within the faster time, wherein Vth corresponds to
Threshold voltage, so that the 15th switch element M15, the 17th switch element M17, eighteenmo pass element M18, the 11st be made to open
It closes element M11 and the 12nd switch element M12 to be both turned on, the voltage of node QB1 is pulled low by the 17th switch element M17
To the second reference level VGL, the voltage of node QB2 closes element M18 by eighteenmo and is pulled down to the second reference level VGL,
The voltage of node QBS1 is pulled down to the second reference level VGL by the 11st switch element M11, and the voltage of node QBS1 passes through
12nd switch element M12 is pulled down to the second reference level VGL, further, the 23rd switch element M23, the 20th
Four switch element M24, the 25th switch element M25, the second sixteenmo close element M26, the 27th switch element M27, the
Two eighteenmos close element M28 be turned off, stopped to the same level drive element of the grid output driving signal Gn, transmitting signal Zn with
And the drop-down of node Q current potential.
The pull-up stage: referring to Figure 1 and Fig. 4, correspond to T2, the first clock signal CLK_A is become by the second reference level VGL
When for third reference level VGH, due to being precharged in pre-charging stage node Q, the 15th switch element M15 is led
It is logical, and due to the boot strap of first capacitor C1, the current potential at node Q is further pulled up to 2VGH-Vth, so that the 15th
Switch element M15 is opened more abundant, and the driving signal Gn of the same level drive element of the grid output is pulled to third with reference to electricity
Flat VGH.
It is worth noting that, in embodiments of the present invention, the 15th of the 15th switch element M15 can be directly used
Parasitic capacitance between control terminal and the 30th path terminal is as first capacitor, can also be or in order to promote pull-up speed
Separate storage capacitor is set between the 15th control terminal and the 30th path terminal of the 15th switch element M15, wherein the independence
The parasitic capacitance in parallel of storage capacitance and the 15th switch element M15 and collectively as first capacitor C1, i.e. first capacitor C1 etc.
In the sum of the parasitic capacitance of the 15th switch element M15 and separate storage capacitor.
The drop-down stage: it is completed after exporting, the first clock signal CLK_A is joined by third with Fig. 5 corresponding to T3 referring to Figure 1
Examining level VGH becomes the second reference level VGL, and the 15th switch element M15 continues to be connected, and node Q passes through the 15th of conducting
Switch element M15 is pulled down to VGH-VMh, the driving signal Gn of the same level drive element of the grid output by the first clock signal CLK_A
The second reference level VGL is pulled down to by the first clock signal CLK_A by the 15th switch element M15 of conducting.
Third pulse signal Gn+3 becomes third reference level VGH, the 14th switch element from the second reference level VGL
M14 conducting, due to being the in pre-charging stage (correspond to T1) and pull-up stage (corresponding to T2) second clock signal CLK_B
Three reference level VGH, node Q can be maintained by the 14th switch element M14 of conducting by the second clock signal CLK_B higher
Current potential, to ensure that the driving signal Gn of the same level drive element of the grid output has shorter fall time, in the drop-down stage
(correspond to T3), the second clock signal CLK_B become the second reference level VGL from third reference level VGH, and node Q passes through the
14 switch element M14 are pulled down to the second reference level VGL by the second clock signal CLK_B.
Stabilization sub stage: referring to Figure 1 and Fig. 6, corresponding to T4, due to node Q by the 14th switch element M14 by second
Clock signal CLK_B is pulled down to the second reference level VGL, the 15th switch element M15, the 17th switch element M17 and the tenth
Eight switch element M18 are turned off, and stop the drop-down to node QB1 and node QB2 current potential.First stabilization signal V1 passes through the 19th
The voltage that switch element M19 is VGH_Vth to node QB1 incoming level, the second stabilization signal V2 pass through the 20th switch element
The voltage that M20 is the second reference level VGL to node QB2 incoming level, the 23rd switch element M23, the 25th switch
Element M25 and the 27th switch element M27 are both turned on, the 24th switch element M24, the second sixteenmo close element M26 and
Second eighteenmo closes element M28 and is turned off, and the current potential of node Q is pulled down by the 23rd switch element M23 be connected, the same level
The transmitting signal Zn of drive element of the grid output is pulled down by the 27th switch element M27 be connected, the same level gate driving
The driving signal Gn of unit output is pulled down by the 25 switch element M25 be connected and maintains the second reference level VGL.
In next second duty cycle, the first stabilization signal V1 and the second stabilization signal V2 alternating polarity, first
The voltage that stabilization signal V1 is the second reference level VGL to node QB1 incoming level by the 19th switch element M19, second
The voltage that stabilization signal V2 is VGH_Vth to node QB2 incoming level by the 20th switch element M20, the 23rd switch
Element M23, the 25th switch element M25 and the 27th switch element M27 are turned off, the 24th switch element M24,
Two sixteenmos close element M26 and the second eighteenmo closes element M28 and is both turned on, the 24-carat gold that the current potential of node Q passes through conducting
It closes element M24 to be pulled down, the transmitting signal Zn of the same level drive element of the grid output closes element M28 by the second eighteenmo of conducting
It is pulled down, the driving signal Gn of the same level drive element of the grid output is pulled low and is tieed up by the two sixteenmos pass element M26 be connected
It holds in the second reference level VGL.
After the second duty cycle, gate driving circuit will reenter the first duty cycle, the gate driving
The course of work of the circuit in the first duty cycle is same as above.
When environment temperature is lower than first threshold, Fig. 2 is please referred to, the grid of first embodiment of the invention is shown in Fig. 2
The timing diagram of part signal in every first duty cycle of level-one drive element of the grid in driving circuit, in the first duty cycle
Interior, the first low-temperature stabilization signal VS1 output level corresponds to third reference level VGH, the second low-temperature stabilization signal VS2 output electricity
It is flat to correspond to the second reference level VGL.
The case where being greater than or equal to first threshold relative to previously described environment temperature is lower than first for environment temperature
The case where threshold value, the course of work of gate driving circuit provided by the invention only have bigger difference in the stabilization sub stage, thus here
We only to environment temperature be lower than first threshold when, gate driving circuit provided by the invention the stabilization sub stage the course of work into
Row is described in detail, remaining process please refers to above.
Stabilization sub stage: referring to Figure 1 and Fig. 6, corresponding to T4, due to node Q by the 14th switch element M14 by second
Clock signal CLK_B is pulled down to the second reference level VGL, the 15th switch element M15, the 17th switch element M17 and the tenth
Eight switch element M18 are turned off, and stop the drop-down to node QB1 and node QB2 current potential.First stabilization signal V1 and the first low temperature
Stabilization signal VS1 passes through the 19th switch element M19 and first switching element M1 to node QB1 and node QBS1 input electricity respectively
The voltage for VGH_Vth is put down, the second stabilization signal V2 and the second low-temperature stabilization signal VS2 pass through the 20th switch element respectively
The voltage that M20 and second switch element M2 is the second reference level VGL to node QB2 and node QBS2 incoming level, the 5th opens
Close element M5, the 7th switch element M7, the 9th switch element M9, the 23rd switch element M23, the 25th switch element
M25 and the 27th switch element M27 are both turned on, the 6th switch element M6, the 8th switch element M8, the tenth switch element M10,
24th switch element M24, the second sixteenmo close element M26 and the second eighteenmo closes element M28 and is turned off, the electricity of node Q
Position is pulled down by the 23rd switch element M23 be connected and the 5th switch element M5, the output of the same level drive element of the grid
Transmitting signal Zn is pulled down by the 27th switch element M27 be connected and the 9th switch element M9, the same level gate driving list
The driving signal Gn of member output is pulled down by the 25 switch element M25 and the 7th switch element M7 of conducting and maintains the
Two reference level VGL.
It is respectively used to due to increasing the 5th switch element M5, the 7th switch element M7, the 9th switch element M9 to node
Q, the drop-down of the driving signal Gn of the same level drive element of the grid output and the transmitting signal Zn of the same level drive element of the grid output are steady
Fixed, gate driving circuit provided by first embodiment of the invention still has higher under cryogenic compared with the existing technology
Reliability and stability.
In next second duty cycle, the first stabilization signal V1 and the second stabilization signal V2 alternating polarity, first
Low-temperature stabilization signal VS1 and the second low-temperature stabilization signal VS2 alternating polarity.First stabilization signal V1 and the first low-temperature stabilization signal
VS1 pass through respectively the 19th switch element M19 and first switching element M1 to node QB1 and node QBS1 incoming level be VGL
Voltage, the second stabilization signal V2 and the second low-temperature stabilization signal VS2 pass through the 20th switch element M20 and second switch respectively
The voltage that element M2 is the second reference level VGH_VMh to node QB2 and node QBS2 incoming level, the 5th switch element M5,
7th switch element M7, the 9th switch element M9, the 23rd switch element M23, the 25th switch element M25 and the 20th
Seven switch element M27 are turned off, the 6th switch element M6, the 8th switch element M8, the tenth switch element M10,24-carat gold
It closes element M24, the second sixteenmo pass element M26 and the second eighteenmo pass element M28 is both turned on, the current potential of node Q passes through conducting
The 24th switch element M24 and the 6th switch element M6 be pulled down, the same level drive element of the grid output transmitting signal Zn
It closes element M28 and the tenth switch element M10 by the second eighteenmo of conducting to be pulled down, the drive of the same level drive element of the grid output
Dynamic signal Gn is pulled down by the two sixteenmos pass element M26 and the 8th switch element M8 be connected and maintains the second reference level
VGL。
After the second duty cycle, gate driving circuit will reenter the first duty cycle, the gate driving
The course of work of the circuit in the first duty cycle is same as above.
Similarly, it is used respectively due to increasing the 6th switch element M6, the 8th switch element M8, the tenth switch element M10
In the transmitting signal Zn of driving signal Gn and the output of the same level drive element of the grid to node Q, the output of the same level drive element of the grid
Drop-down stablize, gate driving circuit provided by first embodiment of the invention, compared with the existing technology, under cryogenic still
Reliability and stability with higher.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
It is as described above according to the embodiment of the present invention, these embodiments details all there is no detailed descriptionthe, also not
Limiting the invention is only the specific embodiment.Obviously, as described above, can make many modifications and variations.This explanation
These embodiments are chosen and specifically described to book, is principle and practical application in order to better explain the present invention, thus belonging to making
Technical field technical staff can be used using modification of the invention and on the basis of the present invention well.The present invention is only by right
The limitation of claim and its full scope and equivalent.
Claims (10)
1. a kind of gate driving circuit, which is characterized in that including multistage drive element of the grid, every grade of drive element of the grid is for dividing
It Qu Dong a corresponding grid line on display panel, wherein
Every grade of drive element of the grid respectively includes low-temperature stabilization unit, and the low-temperature stabilization unit is used for when environment temperature is lower than the
When one threshold value, stablize the driving signal and transmitting signal of the output of the same level drive element of the grid,
The low-temperature stabilization unit includes first group of switch element, and when environment temperature is lower than first threshold, described first group is opened
The alternate conduction within the different duty cycles of two switch elements in element is closed,
Every grade of drive element of the grid respectively further comprises second group of switch element connecting with first group of switch element, and described
Two switch elements in two groups of switch elements alternate conduction, the driving signal within the different duty cycle pass through institute
One of two switch elements of one of two switch elements of second group of switch element and first group of switch element are stated by under
It draws.
2. gate driving circuit according to claim 1, which is characterized in that the low-temperature stabilization unit includes:
First switching element, including the first path terminal, alternate path end and the first control terminal, first path terminal and described the
One control terminal is connected, and receives the first low-temperature stabilization signal；
Second switch element, including third path end, fourth passage end and the second control terminal, the third path end and described the
Two control terminals are connected, and receive the second low-temperature stabilization signal；
Third switch element, including fifth passage end, the 6th path terminal and third control terminal, the fifth passage end receive first
Reference level, the 6th path terminal are connected with the third path end, the third control terminal and the first path terminal phase
Even；
4th switch element, including the 7th path terminal, the 8th path terminal and the 4th control terminal, the 7th path terminal and described the
Two path terminals are connected, and the 4th control terminal is connected with the fourth passage end；
5th switch element, including the 9th path terminal, the tenth path terminal and the 5th control terminal, the tenth path terminal and described the
Eight path terminals are connected, and the 5th control terminal is connected with the alternate path end；
6th switch element, including the 11st path terminal, the 12nd path terminal and the 6th control terminal, the 11st path terminal with
Tenth path terminal be connected, the 12nd path terminal is connected with the 9th path terminal, the 6th control terminal with it is described
Third path end is connected；
7th switch element, including the tenth threeway terminal, the 14th path terminal and the 7th control terminal, the 7th control terminal and institute
The 5th control terminal is stated to be connected；
8th switch element, including the 15th path terminal, the 16th path terminal and the 8th control terminal, the 15th path terminal with
14th path terminal be connected, the 16th path terminal is connected with the tenth threeway terminal, the 8th control terminal and
6th control terminal is connected；
9th switch element, including the 17th path terminal, the 18th path terminal and the 9th control terminal, the 18th path terminal with
15th path terminal is connected, and the 9th control terminal is connected with the 7th control terminal；
Tenth switch element, including the 19th path terminal, the 20th path terminal and the tenth control terminal, the 19th access termination
It receives the second reference level and is connected with the 18th path terminal, the 20th path terminal and the 17th path terminal phase
Even, the tenth control terminal is connected with the 8th control terminal；
11st switch element, including the 21st path terminal, the 22nd path terminal and the 11st control terminal, the described 20th
Two path terminals are connected with the alternate path end；
12nd switch element, including the 20th threeway terminal, the 24th path terminal and the 12nd control terminal, the described 20th
Four path terminals are connected with the third path end, and the 20th threeway terminal is connected with the 21st path terminal, described
12nd control terminal is connected with the 11st control terminal.
3. gate driving circuit according to claim 2, which is characterized in that every grade of drive element of the grid also wraps respectively
It includes:
13rd switch element, including the 25th path terminal, the 26th path terminal and the 13rd control terminal, the described 20th
Five path terminals receive the first pulse signal, and the 13rd control terminal receives the second pulse signal；
14th switch element, including the 27th path terminal, the 28th path terminal and the 14th control terminal, the described 20th
Seven path terminals are connected with the 26th path terminal, the second clock signal of the 28th path terminal reception, and the described tenth
Four control terminals receive third pulse signal；
15th switch element, including the 29th path terminal, the 30th path terminal and the 15th control terminal, the described 29th
Path terminal receives the first clock signal, and the 30th path terminal is connected by first capacitor with the 15th control terminal, and
For exporting the driving signal of the same level drive element of the grid, the 15th control terminal is connected with the 27th path terminal；
Sixteenmo pass element, including the 31st path terminal, the 32nd path terminal and the 16th control terminal, the described 30th
One path terminal is connected with the 29th path terminal, and the 32nd path terminal is for exporting the same level drive element of the grid
Signal is transmitted, the 16th control terminal is connected with the 15th control terminal；
17th switch element, including the 30th threeway terminal, the 34th path terminal and the 17th control terminal, the described 30th
Threeway terminal is connected with the 21st path terminal, and the 17th control terminal is connected with the 27th path terminal；
Eighteenmo pass element, including the 35th path terminal, the 36th path terminal and the 18th control terminal, the described 30th
Five path terminals are connected with the 21st path terminal, the 18th control terminal and the 17th control terminal and the described tenth
One control terminal is connected simultaneously；
19th switch element, including the 37th path terminal, the 38th path terminal and the 19th control terminal, the described 30th
Seven path terminals receive the first stabilization signal and are connected with the 19th control terminal, the 38th path terminal and the third
14 path terminals are connected；
20th switch element, including the 39th path terminal, the 40th path terminal and the 20th control terminal, the described 39th
Path terminal is connected with the 36th path terminal, and the 40th path terminal receives the second stabilization signal and with the described 20th
Control terminal is connected；
21st switch element, including the 41st path terminal, the 42nd path terminal and the 21st control terminal, described
41 path terminals are connected simultaneously with the 20th threeway terminal and the 8th path terminal, the 42nd path terminal with
39th path terminal is connected, and the 21st control terminal is connected with the 37th path terminal；
22nd switch element, including the 40th threeway terminal, the 44th path terminal and the 22nd control terminal, described
40 threeway terminals are connected with the 38th path terminal, and the 44th path terminal receives first reference level simultaneously
It is connected with the 42nd path terminal, the 22nd control terminal is connected with the 40th path terminal；
23rd switch element, including the 45th path terminal, the 46th path terminal and the 23rd control terminal, described
45 path terminals are connected with the 15th control terminal, the 46th path terminal and the 41st path terminal phase
Even, the 23rd control terminal is connected with the 40th threeway terminal；
24th switch element, including the 47th path terminal, the 48th path terminal and the 24th control terminal, described four
17 path terminals are connected with the 46th path terminal, and the 48th path terminal is connected with the 9th path terminal, institute
The 24th control terminal is stated to be connected with the 42nd path terminal；
25th switch element, including the 49th path terminal, the 50th path terminal and the 25th control terminal, the described 4th
19 path terminals are connected with the 30th path terminal and the tenth threeway terminal, and the 50th path terminal receives second with reference to electricity
Flat, the 25th control terminal is connected with the 23rd control terminal；
Second sixteenmo closes element, including the 51st path terminal, the 52nd path terminal and the 26th control terminal, and described the
51 path terminals are connected with the 50th path terminal, and the 52nd path terminal is connected with the tenth threeway terminal,
26th control terminal is connected with the 24th control terminal；
27th switch element, including the 50th threeway terminal, the 54th path terminal and the 27th control terminal, described
50 threeway terminals are connected with the 32nd path terminal, the 54th path terminal and the 50th path terminal phase
Even, the 27th control terminal is connected with the 25th control terminal；
Second eighteenmo closes element, including the 55th path terminal, the 56th path terminal and the 28th control terminal, and described the
55 path terminals are connected with the 54th path terminal, the 56th path terminal and the 17th path terminal and institute
It states the 50th threeway terminal while being connected, the 28th control terminal is connected with the 26th control terminal.
4. gate driving circuit according to claim 3, which is characterized in that within the first duty cycle, described first is steady
The level for determining signal corresponds to third reference level, and the level of second stabilization signal corresponds to the second reference level；?
In two duty cycles, the level of first stabilization signal corresponds to the second reference level, the level of second stabilization signal
Corresponding to third reference level.
5. gate driving circuit according to claim 4, which is characterized in that environment temperature is greater than or equal to first threshold
When, within the first duty cycle and the second duty cycle, the electricity of the first low-temperature stabilization signal and the second low-temperature stabilization signal
Averagely correspond to the second reference level.
6. gate driving circuit according to claim 4, which is characterized in that when environment temperature is lower than first threshold, the
In one duty cycle, the level of the first low-temperature stabilization signal corresponds to third reference level, the second low-temperature stabilization letter
Number level correspond to the second reference level；Within the second duty cycle, the level of the first low-temperature stabilization signal corresponds to
The level of second reference level, the second low-temperature stabilization signal corresponds to third reference level.
7. gate driving circuit according to claim 3, which is characterized in that first pulse signal and second arteries and veins
Rush upper three-level driving signal and upper three-level transmitting letter that signal corresponds respectively to the drive element of the grid output for differing three-level upwards
Number.
8. gate driving circuit according to claim 3, which is characterized in that the third pulse signal corresponds to downward phase
The lower three-level driving signal of the drive element of the grid output of poor three-level.
9. gate driving circuit according to claim 3, which is characterized in that the first capacitor is the 15th switch
Parasitic capacitance between 30th path terminal of element and the 15th control terminal.
10. gate driving circuit according to claim 3, which is characterized in that the 30th of the 15th switch element
Separate storage capacitor is provided between path terminal and the 15th control terminal, the first capacitor is the 15th switch element
The sum of parasitic capacitance and the separate storage capacitor between 30th path terminal and the 15th control terminal.
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| CN201611127387.2A CN106601201B (en) | 2016-12-09 | 2016-12-09 | Gate driving circuit |
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| CN108447438B (en) * | 2018-04-10 | 2020-12-08 | 京东方科技集团股份有限公司 | Display device, grid drive circuit, shift register and control method thereof |
| CN113628596B (en) * | 2021-07-23 | 2023-02-24 | 昆山龙腾光电股份有限公司 | Gate drive unit, gate drive circuit and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103996390A (en) * | 2014-05-26 | 2014-08-20 | 昆山龙腾光电有限公司 | Gate driving circuit and display device using same |
| CN104715732A (en) * | 2015-03-17 | 2015-06-17 | 昆山龙腾光电有限公司 | Grid driving circuit and display device |
| KR20150076442A (en) * | 2013-12-26 | 2015-07-07 | 엘지디스플레이 주식회사 | Liquid crystal display |
| CN105225630A (en) * | 2014-06-13 | 2016-01-06 | 乐金显示有限公司 | The display device of scanner driver and use scanner driver |
| CN105336291A (en) * | 2015-12-04 | 2016-02-17 | 京东方科技集团股份有限公司 | Shift register unit, driving method thereof and display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104637461B (en) * | 2015-02-12 | 2017-03-15 | 昆山龙腾光电有限公司 | A kind of gate driver circuit and display device |
-
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- 2016-12-09 CN CN201611127387.2A patent/CN106601201B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20150076442A (en) * | 2013-12-26 | 2015-07-07 | 엘지디스플레이 주식회사 | Liquid crystal display |
| CN103996390A (en) * | 2014-05-26 | 2014-08-20 | 昆山龙腾光电有限公司 | Gate driving circuit and display device using same |
| CN105225630A (en) * | 2014-06-13 | 2016-01-06 | 乐金显示有限公司 | The display device of scanner driver and use scanner driver |
| CN104715732A (en) * | 2015-03-17 | 2015-06-17 | 昆山龙腾光电有限公司 | Grid driving circuit and display device |
| CN105336291A (en) * | 2015-12-04 | 2016-02-17 | 京东方科技集团股份有限公司 | Shift register unit, driving method thereof and display device |
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