CN106549578B - Multi-mode power source managing system - Google Patents
Multi-mode power source managing system Download PDFInfo
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- CN106549578B CN106549578B CN201611192092.3A CN201611192092A CN106549578B CN 106549578 B CN106549578 B CN 106549578B CN 201611192092 A CN201611192092 A CN 201611192092A CN 106549578 B CN106549578 B CN 106549578B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Dc-Dc Converters (AREA)
Abstract
The present invention provides a kind of multi-mode power source managing systems, are suitable for SOC chip.The multi-mode power source managing system includes digital circuit, analog circuit and converter output stage, wherein the analog circuit is connected to the digital circuit, and it includes simulation PFM control circuit, digital PWM control circuit, the first LDO control circuit and the 2nd LDO control circuit；The simulation PFM control circuit, digital PWM control circuit, the first LDO control circuit and the 2nd LDO control circuit constitute output driving unit, for providing output drive signal, the voltage output that the output drive signal is used to that the converter power output stage to be driven to realize simulation PFM Switching Power Supply output mode, digital PWM Switching Power Supply output mode, Switching Power Supply topology LDO output mode and LDO output mode respectively to the converter power output stage.
Description
[technical field]
The present invention relates to power technologies, particularly, are related to a kind of suitable for SOC (System on a chip, on piece system
System) chip multi-mode power source managing system.
[background technique]
It is well known that it is usually necessary to use power-supply management systems to carry out stable confession to chip internal circuits for SOC chip
Electricity.
Power-supply management system in the prior art generally uses analog switched power supply or digital switch power supply.Analog switch
Power supply needs to redesign new feedback loop, proving period ratio when application conditions change or need to be transferred to new process
It is longer；Also, feedback control loop in new design and new process there are it is unstable a possibility that so that power-supply management system risk compared with
Greatly, it influences product and quickly cuts market.
If the power-supply management system in the SOC chip of the prior art uses digital switch power supply, although digital switch
Power supply can adapt to different application and technique requirement better, but the switch bandwidth of pure digi-tal Switching Power Supply is relatively low,
Load variation makes power supply ripple larger fastly, therefore its scope of application is relatively limited.On the other hand, switching power supply noise may also shadow
Other sensitive circuits for arriving SOC chip are rung, and efficiency can decline in low-voltage input.
In view of this, it is necessary to provide a kind of multi-mode power source managing systems suitable for SOC chip, to solve existing skill
The above problem existing for art.
[summary of the invention]
The purpose of the present invention is to provide a kind of multi-mode power source managing systems that can solve the above problem.
The present invention provides a kind of multi-mode power source managing system, including digital circuit, analog circuit and converter output stage,
Wherein the analog circuit is connected to the digital circuit, and it includes simulation PFM control circuit, digital PWM control circuit, the
One LDO control circuit and the 2nd LDO control circuit；The simulation PFM control circuit, digital PWM control circuit, the first LDO control
Circuit processed and the 2nd LDO control circuit constitute output driving unit, drive for providing output to the converter power output stage
Dynamic signal, the output drive signal is for driving the converter power output stage to realize that simulation PFM Switching Power Supply is defeated respectively
The voltage of mode, digital PWM Switching Power Supply output mode, Switching Power Supply topology LDO output mode and LDO output mode is defeated out
Out.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating converter power output stage includes the first PMOS switch, the second PMOS switch and NMOS switch, wherein the first PMOS is opened
Pass, the second PMOS switch and NMOS switch are connected to the output driving unit, provide for receiving the output driving unit
Output drive signal；The wherein source electrode ground connection of the NMOS switch, and its drain electrode is connected to the leakage of first PMOS switch
Pole, and exported as power stage；The source electrode of first PMOS switch and second PMOS switch is connected to power power-supply；Institute
The drain electrode for stating the second PMOS switch is connected to voltage output end, and described in power stage output is connected to by alternative device
Voltage output end, and the voltage output end is grounded by output capacitance.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
State output drive signal include for driving the first PMOS grid control signal of first PMOS switch, it is described for driving
2nd PMOS grid control signal of the second PMOS switch and for drive the NMOS switch NMOS gate control signal.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment,
The simulation PFM Switching Power Supply output mode and the digital PWM Switching Power Supply output mode, second PMOS switch are in
Off state, and the simulation PFM control circuit and the digital PWM control circuit by the first PMOS grid control signal and
NMOS gate controls signal and drives first PMOS switch with the NMOS switch so that the synchronous complementary switch of its composition.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment,
Under the Switching Power Supply topology LDO output mode, first PMOS switch and the NMOS switch are in an off state；It is described
2nd LDO control circuit exports the 2nd PMOS grid control letter to drive second PMOS switch to form Switching Power Supply mould
The LDO of formula is exported, wherein the replaceable components uses inductance element.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment,
Under the LDO output mode, second PMOS switch and the NMOS switch are in an off state；The first LDO control
First PMOS grid described in circuit output controls letter to drive first PMOS switch to form LDO output, wherein described to replace
Element is changed using Zero-ohm resistor.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating digital circuit includes LDO loop control unit, PFM mode parameter control unit and digital PWM loop filtering unit, wherein institute
It states LDO loop control unit and is connected to the first LDO control circuit and the 2nd LDO control circuit, for described the
One LDO control circuit and the 2nd LDO control circuit export the first bus voltage and the second bus voltage, the PFM mode
Parameter control unit is connected to the simulation PFM control circuit, for electric to simulation PFM control circuit output third bus
Pressure and the first clock signal；The digital PWM loop filtering unit is connected to the digital PWM control circuit, is used for described
Digital PWM control circuit exports the 4th bus voltage and second clock signal.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating digital circuit further includes operating mode selecting unit, is connected to the LDO loop control unit, the PFM mode parameter
Control unit and the digital PWM loop filtering unit, for electricity to be configured and inputted according to the output of register configuration interface
Sampled value is pressed, selectively the control of the first LDO loop of progress is enabled, the control of the 2nd LDO loop is enabled, simulates the control of PFM loop
The control of enabled and digital PWM loop is enabled.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating simulation PFM mode control circuit includes the high-speed comparator for introducing hysteresis module, is used to compare output feedback voltage and ginseng
Voltage is examined, wherein the hysteresis module includes that 1 multiplexer is selected in digital logic unit and 2, wherein the output of the high-speed comparator
Described 2, which are fed back to, by the digital logic unit selects 1 multiplexer；When the output of the high-speed comparator is low, 2 choosing
1 multiplexer selects the high level signal as the reference voltage output, and when the output of the high-speed comparator is high,
Described 2 select 1 multiplexer to select the low level signal as the reference voltage output；And the high-speed comparator also passes through
The digital logic unit and clock synchronization circuit pass through institute to power switch driver circuit output PFM mode activated clock
It states power switch driver circuit and generates output drive signal.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating simulation PFM mode control circuit further includes being connected to digital PFM parameter arithmetic element and described 2 to select number between 1 multiplexer
Word turns analog converter, and the Digital to Analog Converter is used to receive the position 2N that the number PFM parameter arithmetic element provides
Number bus voltage forms N after the decoding process of N decoders and selects two option codes；The N selects two option codes to pass through electricity
Pressure N selects two Unit selections using the partial pressure value that series resistance divides reference data power supply and generates, and selects by ripple N
Unit one exports the high level signal respectively and the low level signal is exported as the analog reference voltage.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating digital PFM parameter arithmetic element includes N output ripple setting units and N output voltage setting units, both is connected to
Logical unit is arranged in comparison voltage, and comparison voltage setting logical unit exports the 2N bit digital bus electricity
Pressure, the number PFM parameter arithmetic element are used to generate comparison voltage parameter according to output ripple and output voltage setting value and set
Set bus；Wherein, the N output voltage setting unit is for being arranged output voltage setting value, and the N sets for output ripple
Unit is set for output voltage ripple setting value.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating digital PWM mode control circuit includes error sample conversion unit and digital PWM loop filtering unit；The error sampling turns
Changing unit includes that reference power source resistor voltage divider network, voltage N select a unit and non-linear ADC unit, wherein the reference voltage
Resistor voltage divider network generates 2^N voltage output, and the voltage N selects a unit for the ginseng of register configuration interface output
It examines voltage option code to be decoded, and selects corresponding reference voltage output, the non-linear ADC unit is for receiving feedback electricity
Difference between pressure and the reference voltage, and non-linear simulation number conversion process is carried out to it, obtain the position N of output error
Digital error signal.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
It states digital PWM loop filtering unit and is mainly used for application requirement according to loop parameter, adjustment loop parameter simultaneously passes through digital PID
Filter unit carries out digital PID filtering and loop compensation to the digital error signal, is output to SDM noise shaping unit later
Noise shaping is carried out, PWM clock signal is then generated by the processing of digital PWM comparing unit.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating digital PID filter unit is basic PID loop, and signal process includes multiplying the N bit digital error signal of input
Method operation, accumulating operation and regressive operation, and multiplication result, accumulating operation result are added to obtain with regressive operation result
Filtered error output；The SDM noise shaping unit is second-order modulator comprising basic addition unit, subtraction list
Member, multiplying unit, delay cell and K quantifying units；The digital PWM comparing unit is sawed using basic K bit digital
Tooth wave producer and K bit digital PWM comparator, wherein the K bit digital saw-toothed wave generator generates sawtooth by accumulator
Wave, each clock cycle export accumulated value, and the K bit digital PWM comparator is connected to the K quantifying unit, for connecing
Receive the position the K quantized signal that the K is quantifying unit output；If the sawtooth wave numerical value that the K bit digital sawtooth wave generates is less than defeated
Enter numerical value, then the digital PWM comparator output 1, on the contrary output 0.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Stating the 2nd LDO control circuit includes the zero pole point compensated array circuit that operational amplifier and register can configure, wherein the fortune
Calculation amplifier is basic amplifier, and normal phase input end and inverting input terminal receive reference voltage and feedback voltage respectively, and
The output end of the operational amplifier is connected to second PMOS switch by first switch to export the 2nd PMOS grid to it
Pole controls signal；The zero pole point compensated array includes the series connection of M adjustable resistances and N shunt capacitances, and actual zero pole point
Offset is controlled by voltage bus.
As a kind of improvement in multi-mode power source managing system provided by the invention, in an advantageous embodiment, institute
Operational amplifier and pole-zero compensation circuit that the first LDO control circuit is multiplexed the 2nd LDO control circuit are stated, and described
The output end of operational amplifier is connected to the grid of first PMOS switch by second switch to export the first PMOS to it
Grid control signal；Under the LDO output mode, the practical zero pole point offset of the pole-zero compensation circuit is total by voltage
Line is controlled.
Compared to the prior art, multi-mode entity management system provided by the present application can achieve following technical effect:
(1) according to different application, the different operating mode of controllable power management system, parameter register can be by system
MCU adjustment saves the development time so that IP is highly suitable for the transfer of different application；
(2) response of simulation operating mode is fast, without stability problem；Closed loop mode digital operation mode Parameter adjustable is whole,
So that IP is highly suitable for the transfer of different process, development-success ratio is improved；
(3) the LDO output mode under integrated Switching Power Supply topology, improves the efficiency under low input；
(4) the LDO output mode of circuit multiplexer, the demand suitable for low noise power supply.
[Detailed description of the invention]
To describe the technical solutions in the embodiments of the present invention more clearly, used in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ability
For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure, in which:
Fig. 1 is a kind of structural schematic diagram of embodiment of multi-mode power source managing system provided by the invention；
Fig. 2 is multi-mode power source managing system shown in FIG. 1 in simulation PFM Switching Power Supply mode and digital PWM switch electricity
The output topological circuit figure of source module；
Fig. 3 is output topology electricity of the multi-mode power source managing system shown in FIG. 1 in Switching Power Supply topology LDO output mode
Lu Tu；
Fig. 4 is output topological circuit figure of the multi-mode power source managing system shown in FIG. 1 in LDO output mode；
Fig. 5 is the electrical block diagram of the simulation PFM control circuit of multi-mode power source managing system shown in FIG. 1；
Fig. 6 is the signal waveform schematic diagram of simulation PFM control circuit shown in fig. 5；
Fig. 7 is that the digital PFM parameter arithmetic element of simulation PFM mode control circuit shown in fig. 5 and DAC number revolving die are intended
The electrical block diagram of converter；
Fig. 8 is the electrical block diagram of the digital PWM control circuit of multi-mode power source managing system shown in FIG. 1；
Fig. 9 is the error sample conversion unit and digital PWM loop filtering unit of digital PWM control circuit shown in Fig. 8
Electrical block diagram；
Figure 10 is the electrical block diagram of each internal functional elements of digital PWM loop filtering unit shown in Fig. 9；
Figure 11 is circuit structure of the multi-mode power source managing system shown in FIG. 1 in Switching Power Supply topology LDO output mode
Schematic diagram；
Figure 12 is electrical block diagram of the multi-mode power source managing system shown in FIG. 1 in LDO output mode；
Figure 13 is that the operating mode of multi-mode power source managing system shown in FIG. 1 selects the circuit structure signal of control unit
Figure.
[specific embodiment]
The technical scheme in the embodiments of the invention will be clearly and completely described below, it is clear that described implementation
Example is only a part of the embodiments of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, this field is common
Technical staff's all other embodiment obtained without making creative work belongs to the model that the present invention protects
It encloses.
In order to solve the problems existing in the prior art, the present invention provides a kind of multi-mode power source managing suitable for SOC chip
System.The multi-mode power source managing system has the characteristics that as follows:
(1) using flexible Digital Circuit Control power-supply management system in simulation PFM (Pulse Frequency
Modulation, pulse frequency modulated) switch output, digital PWM (Pulse Width Modulation, pulse width modulation)
Switch output, Switching Power Supply topology LDO (Low Dropout Regulator, low pressure difference linear voltage regulator) output and pure LDO are defeated
Four kinds of modes work out, and System Parameter Registers are configurable under various modes, so that the multi-mode power source managing system
IP be highly suitable for the transfer of different process and different application；
(2) in order to avoid analogue loop stability problem, the multi-mode power source managing system is adopted in simulation operating mode
The open loop PFM mode controlled with comparator, energy quick response load variation, and there is no loop stability problem；
(3) the multi-mode power source managing system avoids analog feedback in closed loop mode using customization complete digital PWM control
Loop, therefore the error feedback amplifier and large area capacitor of simulation can be removed, and loop parameter passes through register configuration
To adapt to different technique；
(4) the multi-mode power source managing system is in low voltage mode or low noise mode using Digital Circuit Control
LDO output, can reduce noise and improve efficiency.
Referring to Fig. 1, it is a kind of structural schematic diagram of embodiment of multi-mode power source managing system provided by the invention.Institute
It states multi-mode power source managing system and is illustrated using buck converter (BUCK Converter) as principle, be integrated with four kinds of outputs
Mode, respectively simulation PFM Switching Power Supply mode, digital PWM Switching Power Supply mode, Switching Power Supply topology LDO output mode and
LDO output mode.
Specifically, as shown in Figure 1, the multi-mode power source managing system mainly includes following three parts: digital circuit,
Analog circuit and converter power output stage.It also, is the work for cooperating the multi-mode power source managing system, the multi-mode
The external environment of power-supply management system may include following two part, i.e. external component and MCU (microprocessor).Wherein,
The external component includes filter capacitor, is mainly used for filtering and generates voltage output；The MCU is mainly used for control system
Parameters.
Wherein, the digital circuit is connected to the microprocessor, mainly includes register configuration interface, operating mode
Selecting unit, LDO loop control unit, PFM mode parameter control unit and digital PWM loop filtering unit.The register
Configuration interface is connected to the MCU, and with the LDO loop control unit, the PFM mode parameter control unit, the number
Word PWM loop filtering unit is connected.The operating mode selecting unit is connected to the LDO loop control unit, the PFM
Mode parameter control unit, the digital PWM loop filtering unit, for selecting to control the LDO loop control unit, described
The working condition of PFM mode parameter control unit, the digital PWM loop filtering unit.
The analog circuit includes voltage sample converting unit, the first LDO control circuit (i.e. LDO1 control circuit), second
LDO control circuit (i.e. LDO2 control circuit), simulation PFM control circuit, digital PWM control circuit, error sample conversion unit
With feedback filtering and compensation circuit.Wherein, the first LDO control circuit, the 2nd LDO control circuit, the simulation PFM
Control circuit and the digital PWM control circuit constitute an output control unit, can export to the converter power
Grade provides output drive signal, and the converter power output stage is driven to realize the voltage output of relevant work mode.
Specifically, the 2nd LDO control circuit and the first LDO control circuit may be coupled to the digital circuit
LDO loop control unit, the two is respectively used to receive the first bus voltage vset1 of the LDO loop control unit output
With the second bus voltage vset2.The PFM mode parameter control that the simulation PFM control circuit is connected to the digital circuit is single
Member, for receiving the first clock signal clk1 and third bus voltage vset3 of the PFM mode parameter control unit output.
The digital PWM control circuit is connected to the digital PWM loop filtering unit, for receiving the PWM loop filtering unit
The second clock signal clk2 and the 4th bus voltage vset4 of output.
Also, the error sample conversion unit is connected between the feedback filtering and compensation circuit, and the feedback
Filtering and compensation circuit are also connected to voltage output end VOUT, the mode selecting unit and the register configuration interface.Its
In, the feedback filtering and compensation circuit can receive the 5th bus voltage vset5 from the register configuration interface, and
For the output voltage according to the voltage output end VOUT, the first LDO control circuit of Xiang Suoshu, the 2nd LDO control electricity
Road, the simulation PFM control circuit and the digital PWM control circuit export the first feedback voltage vfb1, and to the error
Sample conversion unit exports the second feedback voltage vfb2.The error sample conversion unit is used to filter from the digital PWM loop
Wave unit receives reference voltage option code vrefset, and generates corresponding error according to the second feedback voltage vfb2 and sample
Signal, and export to the digital PWM loop filtering unit.The voltage sample converting unit is connected to the digital circuit
Operating mode selects between control unit and the converter power output stage, is mainly used for receiving the operating mode selection
6th bus voltage vset6 of control unit output, and voltage sample is carried out to the converter power output stage and will be sampled
Signal vi returns to the operating mode selection control unit.
The conversion power output stage uses large scale device for power switching, mainly includes the first PMOS switch (PMOS
Switch 1), the second PMOS switch (PMOS switch 2) and NMOS switch.Wherein, first PMOS switch, the 2nd PMOS are opened
The output driving unit that the analog circuit is connected to the grid of the NMOS switch is closed, for receiving the output driving list
The first PMOS grid control signal PGATE1, the 2nd PMOS grid control signal PGATE2 and NMOS gate the control letter that member provides
Number NGATE.Wherein, the source electrode of the NMOS switch is grounded PGND, and its drain electrode is connected to the drain electrode of first PMOS switch,
And VLX is exported as power stage, the source electrode of first PMOS switch is connected to power power-supply PVDD.Wherein, the power stage
Output VLX can also be connected to voltage output by the alternative device (such as inductance or 0 Ohmic resistance) of external component
Hold VOUT.The source electrode of second PMOS switch is connected to the power power-supply PVDD, and is also connected to the analog circuit
Voltage sample converting unit, and its drain electrode is connected to the voltage output end VOUT.Also, the voltage output end VOUT is also
PGND can be grounded by output capacitance.
In specific works, the conversion power output stage, can be using following configuration in different working modes:
(1) PFM Switching Power Supply mode and digital PWM Switching Power Supply mode are simulated:
The output of the electric source topology of the simulation PFM Switching Power Supply mode and the digital PWM Switching Power Supply mode can letter
It is melted into output topological circuit as shown in Figure 2, under above-mentioned operating mode, the second PMOS switch shutdown, and the simulation
PFM control circuit and digital PWM control circuit control the driving input of the converter power output stage, that is, pass through the first PMOS
Grid control signal PGATE1 and NMOS gate control signal NGATE drive first PMOS switch and the NMOS switch,
So that first PMOS switch complementary switch synchronous with NMOS switch composition, as shown in Figure 2.
(2) Switching Power Supply topology LDO output mode:
The electric source topology output of the Switching Power Supply topology LDO output mode can simplify into output as shown in Figure 3 and open up
Flutter circuit.Under this operating mode, first PMOS switch and NMOS switch shutdown, and opened by the 2nd PMOS
It closes to constitute power output stage.At this point, the converter power output stage driving input by the 2nd LDO control circuit Lai
It generates, i.e., the described 2nd LDO control circuit provides and exports the 2nd PMOS grid control signal PGATE2 to control described second
PMOS switch, to form the LDO output of DC-DC Switching Power Supply mode.In this operating mode, the external component can be with
Replaceable component can use inductance, as shown in Figure 3.
(3) LDO output mode:
The electric source topology output of the LDO output mode can simplify into output topological circuit as shown in Figure 4.In this work
Under operation mode, second PMOS switch and NMOS switch shutdown, and power is constituted by first PMOS switch
Output stage.At this point, the driving input of the converter power output stage is generated by the first LDO control circuit, i.e., it is described
First LDO control circuit, which provides and exports the first PMOS grid control signal PGATE1, carrys out shape to control first PMOS switch
It is exported at LDO.In this operating mode, the replaceable component of the external component can use 0 Ohmic resistance, such as scheme
Shown in 4.
To more fully understand multi-mode power source managing system provided by the present application, below in conjunction with corresponding circuit diagram place of matchmakers
State the specific implementation of the various power supply output modes of multi-mode power source managing system.
(1) PFM Switching Power Supply mode is simulated
The control circuit of the simulation PFM Switching Power Supply mode mainly includes the digital control circuit and the simulation
PFM control circuit, concrete principle are as follows:
The digital control circuit configures the first clock signal clk1 and described the according to the demand output and input
Three controls voltage vset3 (voltage bus), and one group of reference clock and two groups of reference voltages are generated, it is controlled as the simulation PFM
The input of circuit processed.
The simulation PFM control circuit can use pulse frequency modulated (PFM) mode, and physical circuit can be such as Fig. 5
It is shown.The simulation PFM control circuit includes DAC Digital to Analog Converter, 2 selects 1 multiplexer (MUX), high-speed comparator, number
Word logic unit and clock synchronization circuit, power switch driver circuit.Wherein, the DAC Digital to Analog Converter is connected to
Digital PFM parameter arithmetic element and described 2 is selected between 1 multiplexer, for receiving the third bus voltage vset3, and is passed through
Digital-to-analogue conversion selects 1 multiplexer to export high level signal High_vout or low level signal Low_vout to described 2.Institute
Stating 2 selects 1 multiplexer for selectively exporting high level signal High_vout or low level signal Low_vout, as
Its reference voltage Ref exported.The number PFM parameter arithmetic element is also to the digital logic unit and clock synchronization circuit
Export the first clock signal clk1.
The core cell of the simulation PFM mode control circuit is the high-speed comparator for introducing hysteresis module, is mainly used
In comparing output feedback voltage vfb and reference voltage Ref, wherein the hysteresis module mainly includes that digital logic unit and 2 select 1
Multiplexer, wherein the output of the high-speed comparator feeds back to described 2 by the digital logic unit and clock synchronization circuit
Select 1 multiplexer.The specific logic of the core cell of the simulation PFM mode control circuit is as follows: when the high-speed comparator
When output is low, described 2 select 1 multiplexer that the high level signal High_vout is selected to export as the reference voltage Ref；
And when the output of the high-speed comparator is high, described 2 select 1 multiplexer to select the low level signal Low_vout as institute
State reference voltage Ref output.Also, the high-speed comparator is by the digital logic unit and clock synchronization circuit to described
Power switch driver circuit exports PFM mode activated clock PFM_CLK, and by described in power switch driver circuit generation
First PMOS grid control signal PGATE1 and the NMOS gate control signal NGATE, as first PMOS switch
With the driving signal of the NMOS switch.And second PMOS switch is in an off state at this time.The simulation PFM control
The signal waveform of circuit can be as shown in Figure 6.
In simulation PFM mode control circuit, the major function of the DAC Digital to Analog Converter unit is mapping number
The number bus voltage output vset3 of word PFM parameter arithmetic element exports Ref to analog reference voltage.Referring to Fig. 7, described
The implementation method of DAC Digital to Analog Converter unit is as follows: the DAC Digital to Analog Converter is received from the number
The position the 2N vset3 bus of PFM parameter arithmetic element input forms N after the decoding process of N decoders and selects two selections
Code；The N selects two option codes to select two Unit selections divide producing to reference data power supply using series resistance by voltage N
Raw partial pressure value, and select a unit to export high level signal High_vout and low level signal Low_vout respectively by ripple N
It exports as the reference voltage.Wherein, band gap reference can be used in the reference data power supply.
As shown in fig. 7, the digital PFM parameter arithmetic element in the simulation PFM mode control circuit includes N output lines
Wave setting unit and N output voltage setting units both are connected to comparison voltage setting logical unit, and the comparison
Voltage is arranged logical unit and exports the 2N vset3 bus.The specific algorithm of the number PFM parameter arithmetic element is
According to the setting value of output ripple and output voltage, comparison voltage parameter setting bus is generated；Wherein, the number PFM parameter
Output dc voltage value can be arranged in arithmetic element by the N output voltage setting unit, and passes through the N output line
Wave setting unit carrys out output voltage ripple setting value.
The voltage N of the DAC Digital to Analog Converter selects the major function of Unit two for selecting N binary codes defeated
It is out the low reference voltage Low_vout1 in boundary, and N binary codes is selected to add 1 output for boundary high reference voltage High_
Vout1, wherein the low reference voltage Low_vout1 in the boundary and the boundary high reference voltage High_vout1 can be by 2^N
A resistance series connection partial pressure obtains.It is to select N binary code outputs for high reference electricity that the ripple N, which selects the major function of a unit,
Pressure output (the i.e. described high level signal High_vout), and mirror image selects the output of N binary codes defeated for low reference voltage
(the i.e. described low level signal Low_vout) out；Wherein, the high reference voltage output and the low reference voltage output are same
It can be obtained by the 2^N resistance series connection partial pressure of 2 groups of mirror images.
By taking 4 BITBUS networks as an example, in the case where N=4:
(1) 4 ' b0111 of output voltage register value is arranged in output voltage 1.8V；
(2) output ripple is 14mv, and 4 ' b0111 of output ripple register value is arranged；
(3) voltage register values are moved to left 4 by comparison voltage logical unit, add output ripple register value,
Obtain 2N 8 ' b01110111 of vset3 bus value；
(4) vset3 bus value high 4 are selected Unit two by 4 decoders feeding voltage N, and it is high to obtain voltage setting boundary
Reference voltage High_vout1 is 1.815V, and the low reference voltage Low_vout1 output in boundary is 1.785V；
(5) vset3 bus value low 4 are selected Unit two to obtain high reference voltage output by 4 decoders feeding ripple N
High_vout is 1.807V and low reference voltage output Low_vout is 1.793V.
(2) digital PWM Switching Power Supply mode
The control circuit of the digital PWM Switching Power Supply mode mainly includes the digital PWM control circuit, concrete principle
It is as follows:
Referring to Fig. 8, the output voltage VO UT of voltage output end is fed back by the feedback filtering and compensation circuit to institute
Error sample conversion circuit is stated, and is digital signal vod by the error sample conversion circuit conversion.The digital signal vod
By digital PWM loop filtering unit generate the duty cycle signals vset4 (i.e. above-mentioned 4th control voltage) of PWM mode with it is synchronous
Clock signal clk2 (i.e. above-mentioned second clock signal), and export and give digital PWM control logic unit.The PWM mode accounts for
When sky generates real PWM driving after the logic control processing than signal vset4 Jing Guo the digital PWM control logic unit
Clock PWM_CLK, and the first PMOS grid control signal PGATE1 and NMOS gate control are generated by power switch driver circuit
Signal NGATE1, and export to the converter power output stage to drive first PMOS switch and the NMOS switch.
On the other hand, second PMOS switch is in an off state at this time.
Referring to Fig. 9, the core cell of the digital PWM mode control circuit includes error sample conversion unit and number
PWM loop filtering unit.The error sample conversion unit include reference power source resistor voltage divider network, voltage N select a unit and
Non-linear ADC unit.
Wherein, the reference voltage resistor voltage divider network generates 2^N voltage output, according to the setting of output voltage VO UT
Demand, the register configuration interface pass through its output parameter setting unit output reference voltage option code vrefset, the electricity
Pressure N, which is selected in a unit, is decoded the reference voltage option code vrefset, and selects corresponding reference voltage vref defeated
Out.As an example it is assumed that half of the second feedback voltage vfb2 equal to output voltage VO UT, i.e. vfb2=VOUT/2, and
Reference data power supply is 1.5V, and vrefset is 4 voltage bus；Also, 16 in total in the error sample conversion unit
Step is selected, represents each reference voltage option code as 0.1V step-length, then 4 ' b0111 of reference voltage option code is corresponding defeated
Reference voltage vref out should be Vref=0.7Vx2=1.4V.
The non-linear ADC unit is for receiving between the second feedback voltage vfb2 and the reference voltage vref
Difference, and Nonlinear A/D conversion process is carried out to it, obtain N bit digitizing signal ved (the i.e. digital error letter of output error
Number ved).Assuming that the non-linear ADC unit is 4 non-linear ADCs, then its conversion is as shown in table 1:
| The margin of error (mV) | Output code | The margin of error (mV) | Output code |
| 64 | 0111 | -2 | 1111 |
| 48 | 0110 | -4 | 1110 |
| 32 | 0101 | -6 | 1101 |
| 16 | 0100 | -8 | 1100 |
| 8 | 0011 | -16 | 1011 |
| 6 | 0010 | -32 | 1010 |
| 4 | 0001 | -48 | 1001 |
| 2 | 0000 | -64 | 1000 |
Table 1
The major function of the digital PWM loop filtering unit is the application requirement according to loop parameter, adjustment loop ginseng
It counts and passes through digital PID filter unit and digital PID filtering and loop compensation are carried out to the digital error signal ved, it is defeated later
Sigma-Delta modulation (SDM) noise shaping unit is arrived out and carries out noise shaping, then passes through the place of digital PWM comparing unit
Reason generates PWM clock signal PWM_CLK.As shown in figure 9, the digital PID filter unit, the SDM noise shaping unit and
The digital PWM comparing unit is sequentially connected；The register configuration interface includes pid parameter setting unit, SDM parameter setting
Unit and PWM parameter set unit are connected respectively to the digital PID filter unit, the SDM noise shaping unit and described
Digital PWM comparing unit, for carrying out corresponding pid parameter setting, SDM parameter setting and PWM parameter setting to it.
Also referring to Figure 10, each internal element of digital PWM loop filtering unit is implemented as follows:
Wherein, the digital PID filtering and loop compensation unit are basic PID loop, and signal process includes will be defeated
The N bit digitizing error signal ved [N:0] entered carries out multiplying, accumulating operation and regressive operation, finally by multiplying knot
Fruit, accumulating operation result and regressive operation result are added to obtain filtered error output PID [M:0], wherein the loop filter
Wave parameter is set by the pid parameter setting unit of the register configuration interface, in the present embodiment using M=16 as tool
Body example is designed.
The SDM noise shaping unit is second-order modulator comprising basic addition unit, subtrator, multiplication fortune
Unit, delay cell and K quantifying units are calculated, wherein the delay cell is the delay cell of 1 clock.The SDM noise
The signal stream of shaping unit can be as shown in fig.10, the present embodiment, which is set as 2, L and K with gain coefficient, be respectively set to 16 Hes
4 are designed as specific example.
The digital PWM comparing unit uses basic K bit digital saw-toothed wave generator and K bit digital PWM comparator,
In, the K bit digital saw-toothed wave generator generates sawtooth wave by accumulator, each clock cycle exports accumulated value.Institute
It states K bit digital PWM comparator and is connected to the K quantifying unit, for receiving the position the K quantization that the K is quantifying unit output
Signal SDM [K:0]；If the sawtooth wave numerical value that the K bit digital sawtooth wave generates is less than input numerical value, the digital PWM ratio
Compared with device output 1, otherwise export 0.As described above, the present embodiment is designed using K=4 as specific example.
(3) Switching Power Supply topology LDO output mode:
When input voltage is close to output voltage, the efficiency of Switching Power Supply will decline, therefore for raising efficiency,
Electric source modes can be turned off the switch in multi-mode power source managing system provided by the present application, and open the 2nd LDO control
Circuit, first PMOS switch and the NMOS switch are in an off state at this time, and the 2nd LDO control circuit can
To drive second PMOS switch to work by the 2nd PMOS grid control signal.
The specific implementation circuit of the Switching Power Supply topology LDO output mode can be as shown in figure 11, specifically, described
2nd LDO control circuit includes the zero pole point compensated array circuit that operational amplifier and register can configure, wherein the operation
Amplifier is basic amplifier, and normal phase input end and inverting input terminal can receive reference voltage Vref and the first feedback respectively
Voltage vfb1, also, the output end of the operational amplifier can be connected to described second by first switch (i.e. switch 1)
The grid of PMOS switch, for exporting the 2nd PMOS grid control signal PGATE2 to second PMOS switch.
In a particular embodiment, the 2nd LDO control circuit can use basic cascode level-one operational amplifier knot
Structure, zero pole point compensation can be realized by the zero pole point compensated array circuit.For example, the zero pole point compensated array can
To include the series connection of M adjustable resistances and N shunt capacitances, and actual zero pole point offset by voltage bus Vset [K:1] into
Row control, to adapt to the stability under the conditions of different application.Embodiment shown in Figure 11 is set using K=8 as specific example
Meter, wherein high 4 are used for resistance selection, and low 4 are used for capacitance selection.
(4) LDO output mode:
It is described more for improving performance when its power-supply management system of the application requirement of SOC chip uses low noise power supply
Mode power management system can turn off the switch electric source modes, and open the first LDO control circuit.At this point, described second
PMOS switch and the NMOS switch are in an off state, and the alternative device can be set to Zero-ohm resistor, separately
Outside, the first LDO control circuit can drive first PMOS switch to carry out by the first PMOS grid control signal
Work.
The specific implementation circuit of the LDO output mode of the multi-mode power source managing system is shown in Fig.12.Specifically
For, after the LDO output mode of the multi-mode power source managing system is enabled, the first LDO control circuit can be answered
With the operational amplifier and pole-zero compensation circuit of the 2nd LDO control circuit, also, the output end of the operational amplifier
The grid of first PMOS switch is connected to by second switch (i.e. switch 2), for exporting to first PMOS switch
The first PMOS grid control signal PGATE1.In addition, under the LDO output mode, the pole-zero compensation circuit
Actual zero pole point offset is controlled by voltage bus vset1, to adapt to the stability under the conditions of different application.
Finally, the switching of four kinds of power supply output modes of the multi-mode power source managing system, i.e., the described simulation PFM switch
Power supply output mode, the digital PWM Switching Power Supply output mode, the Switching Power Supply topology LDO output mode and the LDO
Output mode can select control unit by the operating mode of the digital circuit and the voltage of the analog circuit is cooperated to adopt
Sample converting unit is realized.Specifically, the specific implementation circuit of the output mode switching of the multi-mode power source managing system can
With as shown in figure 13.
Wherein, the voltage sample converting unit includes gradually-appoximant analog-digital converter (SAR ADC), the SAR ADC
It can be made for the basic position K successive approximation analog to digital C for realizing the detection to input voltage PVDD in the present embodiment with K=4
It is designed for specific example.The SAR ADC may be coupled to the input voltage ratio of the operating mode selection control unit
Compared with unit, the Approach by inchmeal code SAR CODE that can be provided according to the input voltage comparing unit, by the input voltage
PVDD is converted to numeral input voltage VI [K:1], and exports to the input voltage comparing unit.The input voltage is more single
Output voltage VO UT setting value of the member for providing the numeral input voltage VI [K:1] and the register configuration interface into
Row compares.
As shown in figure 13, the operating mode selection control unit can also include Switching Power Supply topology control unit, open
Close LDO control unit, LDO mode configuration unit, simulation the PFM mode configuration unit, digital PWM pattern configurations under electric source topology
LDO configuration unit under unit and Switching Power Supply topology.Wherein, the Switching Power Supply topology control unit is connected to the deposit
Device configures the LDO control unit under interface and the Switching Power Supply topology, and the Switching Power Supply topology control unit and described
LDO control unit under Switching Power Supply topology is all connected to the output end of the input voltage comparing unit.The LDO mode is matched
It sets under unit, the simulation PFM mode configuration unit, the digital PWM mode configuration unit and the Switching Power Supply topology
LDO configuration unit is respectively used to realize that the control of the first LDO loop is enabled, the control of PFM mode parameter is enabled, the filter of digital PWM loop
Wave is enabled and the control of the 2nd LDO loop is enabled.Wherein, the LDO mode configuration unit is directly connected to the register configuration
Interface, the simulation PFM mode configuration unit and the digital PWM mode configuration unit are connected to the Switching Power Supply topology control
Unit processed, and the LDO configuration unit under the Switching Power Supply topology is connected to the control list of the LDO under the Switching Power Supply topology
Member.
Based on foregoing circuit structure, the operating mode selection control unit can be accomplished by the following way described more
The output mode of mode power management system switches.
(1) if it is LDO output mode that the multi-mode power source managing system, which is arranged, in the register configuration interface, which applies,
The LDO mode configuration unit will realize that the first LDO loop control is enabled, at this time the multi-mode power source managing system
The shutdown of other control models, then the multi-mode power source managing system will enable the application setting of LDO loop.
(2) if it is Switching Power Supply mould that the multi-mode power source managing system, which is arranged, in the register configuration interface, which applies,
Formula, and the input voltage comparing unit goes out the input voltage by voltage multilevel iudge and sets less than the output voltage
Value, then the LDO control unit under the Switching Power Supply topology can control the LDO configuration unit under the Switching Power Supply topology, with
The LDO configuration unit under the Switching Power Supply topology is set to realize that the control of the 2nd LDO loop is enabled, at this time the multi-mode electrically source capsule
Other control models of reason system turn off.Therefore, the multi-mode power source managing system will start the 2nd LDO loop application
Setting.In the present embodiment, the output voltage setting value specifically can add 200mV to be set as an example using output voltage
Meter.
(3) if it is Switching Power Supply mould that the multi-mode power source managing system, which is arranged, in the register configuration interface, which applies,
Formula, and the input voltage comparing unit goes out the input voltage by voltage multilevel iudge and sets less than the output voltage
Value, the multi-mode power source managing system default is initialized into simulation PFM Switching Power Supply output mode at this time.As described above,
In the present embodiment, the output voltage setting value specifically can add 200mV to be designed as an example using output voltage.
(4) if it is Switching Power Supply mode that the multi-mode power source managing system, which is arranged, in the register configuration interface, which applies,
Simulation PFM Switching Power Supply output mode, at this time the multi-mode power source managing system will in simulation PFM Switching Power Supply output
Mode, the simulation PFM mode configuration unit may be implemented simulation PFM loop control and enable, the multi-mode power source managing system
Other control models shutdown of system.Therefore, the multi-mode power source managing system will start the PFM mode switch electric source topology
Using setting.
(5) if it is Switching Power Supply mode that the multi-mode power source managing system, which is arranged, in the register configuration interface, which applies,
Digital PWM Switching Power Supply output mode, the multi-mode power source managing system will in the digital PWM Switching Power Supply export
Mode.The digital PWM mode configuration unit may be implemented the control of digital PWM loop and enable, the multi-mode power source managing system
Other control models shutdown of system.Therefore, the multi-mode power source managing system will start digital PWM mode switch electric source topology
Using setting.
Based on above-mentioned specific technical solution, compared to the prior art, multi-mode entity management system provided by the present application can
To reach following technical effect:
(1) according to different application, the different operating mode of controllable power management system, parameter register can be by system
MCU adjustment saves the development time so that IP is highly suitable for the transfer of different application；
(2) response of simulation operating mode is fast, without stability problem；Closed loop mode digital operation mode Parameter adjustable is whole,
So that IP is highly suitable for the transfer of different process, development-success ratio is improved；
(3) the LDO output mode under integrated Switching Power Supply topology, improves the efficiency under low input；
(4) the LDO output mode of circuit multiplexer, the demand suitable for low noise power supply.
Above-described is only embodiments of the present invention, it should be noted here that for those of ordinary skill in the art
For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to protection model of the invention
It encloses.
Claims (15)
1. a kind of multi-mode power source managing system, which is characterized in that including digital circuit, analog circuit and converter output stage,
Wherein the analog circuit is connected to the digital circuit, and it includes simulation PFM control circuit, digital PWM control circuit, the
One LDO control circuit and the 2nd LDO control circuit；The simulation PFM control circuit, digital PWM control circuit, the first LDO control
Circuit processed and the 2nd LDO control circuit constitute output driving unit, drive for providing output to the converter power output stage
Dynamic signal, the output drive signal is for driving the converter power output stage to realize that simulation PFM Switching Power Supply is defeated respectively
The voltage of mode, digital PWM Switching Power Supply output mode, Switching Power Supply topology LDO output mode and LDO output mode is defeated out
Out, the simulation PFM control circuit includes the high-speed comparator for introducing hysteresis module, Digital to Analog Converter, number PFM ginseng
Number arithmetic element and 2 selects 1 multiplexer, and the high-speed comparator for introducing hysteresis module is for comparing output feedback voltage and reference
Voltage, the Digital to Analog Converter are connected to digital PFM parameter arithmetic element and described 2 and select between 1 multiplexer, the height
The output of fast comparator feeds back to described 2 by digital logic unit and selects 1 multiplexer, and described 2 select 1 multiplexer for selectively
High level signal or low level signal are exported, the number PFM parameter arithmetic element provides 2N bit digital bus voltage, described
Digital PFM parameter arithmetic element includes N output ripple setting units and N output voltage setting units, both is connected to ratio
Logical unit is set compared with voltage, and comparison voltage setting logical unit exports the 2N bit digital bus electricity
Pressure, the number PFM parameter arithmetic element are used to generate comparison voltage parameter according to output ripple and output voltage setting value and set
Set bus；Wherein, the N output voltage setting unit is for being arranged output voltage setting value, and the N output ripple is set
Unit is set for output voltage ripple setting value.
2. multi-mode power source managing system according to claim 1, which is characterized in that the converter power output stage packet
Include the first PMOS switch, the second PMOS switch and NMOS switch, wherein first PMOS switch, the second PMOS switch and
NMOS switch is connected to the output driving unit, the output drive signal provided for receiving the output driving unit；Its
Described in NMOS switch source electrode ground connection, and its drain electrode is connected to the drain electrode of first PMOS switch, and defeated as power stage
Out；The source electrode of first PMOS switch and second PMOS switch is connected to power power-supply；Second PMOS switch
Drain electrode is connected to voltage output end, and power stage output is connected to the voltage output end, and institute by alternative device
Voltage output end is stated to be grounded by output capacitance.
3. multi-mode power source managing system according to claim 2, which is characterized in that the output drive signal includes using
In drive first PMOS switch the first PMOS grid control signal, second for driving second PMOS switch
PMOS grid control signal and for drive the NMOS switch NMOS gate control signal.
4. multi-mode power source managing system according to claim 3, which is characterized in that in the simulation PFM Switching Power Supply
Under output mode and the digital PWM Switching Power Supply output mode, second PMOS switch is in an off state, and the mould
Quasi- PFM control circuit and the digital PWM control circuit pass through the first PMOS grid control signal and NMOS gate control signal
Drive first PMOS switch with the NMOS switch so that the synchronous complementary switch of its composition.
5. multi-mode power source managing system according to claim 3, which is characterized in that in the Switching Power Supply topology LDO
Under output mode, first PMOS switch and the NMOS switch are in an off state；The 2nd LDO control circuit output
The 2nd PMOS grid control letter exports come the LDO for driving second PMOS switch to form Switching Power Supply mode, wherein institute
Alternative device is stated using inductance element.
6. multi-mode power source managing system according to claim 3, which is characterized in that under the LDO output mode, institute
It states the second PMOS switch and the NMOS switch is in an off state；The first LDO control circuit exports the first PMOS
Grid controls letter to drive first PMOS switch to form LDO output, wherein the alternative device is using zero ohms electricity
Resistance.
7. multi-mode power source managing system according to claim 1, which is characterized in that the digital circuit includes LDO ring
Road control unit, PFM mode parameter control unit and digital PWM loop filtering unit, wherein the LDO loop control unit connects
It is connected to the first LDO control circuit and the 2nd LDO control circuit, for the first LDO control circuit and described
2nd LDO control circuit exports the first bus voltage and the second bus voltage, the PFM mode parameter control unit are connected to institute
Simulation PFM control circuit is stated, for exporting third bus voltage and the first clock signal to the simulation PFM control circuit；Institute
It states digital PWM loop filtering unit and is connected to the digital PWM control circuit, for being exported to the digital PWM control circuit
4th bus voltage and second clock signal.
8. multi-mode power source managing system according to claim 7, which is characterized in that the digital circuit further includes work
Mode selecting unit is connected to the LDO loop control unit, the PFM mode parameter control unit and the digital PWM
Loop filtering unit is selectively carried out for the output configuration and input voltage sampled value according to register configuration interface
The control of first LDO loop is enabled, the control of the 2nd LDO loop is enabled, simulation PFM loop control is enabled and the control of digital PWM loop
It is enabled.
9. multi-mode power source managing system according to claim 1, which is characterized in that when the output of the high-speed comparator
When being low, described 2 select 1 multiplexer to select the high level signal as the reference voltage output, and when the high speed compares
When the output of device is high, described 2 select 1 multiplexer to select the low level signal as the reference voltage output；And it is described
High-speed comparator also exports PFM mode to power switch driver circuit by the digital logic unit and clock synchronization circuit and drives
Dynamic clock, and output drive signal is generated by the power switch driver circuit.
10. multi-mode power source managing system according to claim 9, which is characterized in that the Digital to Analog Converter
The 2N bit digital bus voltage provided for receiving the number PFM parameter arithmetic element, by the decoding process of N decoders
N is formed later selects two option codes；The N selects two option codes to select two Unit selections using series resistance to reference base by voltage N
Quasi- power supply is divided and the partial pressure value that generates, and selects a unit to export the high level signal and described respectively by ripple N
Low level signal is exported as analog reference voltage.
11. multi-mode power source managing system according to claim 1, which is characterized in that the digital PWM control circuit packet
Include error sample conversion unit and digital PWM loop filtering unit；The error sample conversion unit includes reference power source partial pressure
Resistor network, voltage N select a unit and non-linear ADC unit, wherein the reference voltage resistor voltage divider network generates 2^N
Voltage output, the voltage N select the reference voltage option code of the unit for the output of register configuration interface to be decoded,
And corresponding reference voltage output is selected, the non-linear ADC unit is for receiving between feedback voltage and the reference voltage
Difference, and carry out non-linear simulation number conversion process to it, obtain the N bit digital error signal of output error.
12. multi-mode power source managing system according to claim 11, which is characterized in that the digital PWM loop filtering
Unit is mainly used for the application requirement according to loop parameter, and adjustment loop parameter simultaneously passes through digital PID filter unit to the number
Word error signal carries out digital PID filtering and loop compensation, is output to SDM noise shaping unit later and carries out noise shaping, so
PWM clock signal is generated by the processing of digital PWM comparing unit afterwards.
13. multi-mode power source managing system according to claim 12, which is characterized in that the digital PID filter unit
For basic PID loop, signal process include the N bit digital error signal that will be inputted carry out multiplying, accumulating operation and
Regressive operation, and multiplication result, accumulating operation result and regressive operation result are added to obtain filtered error output；
The SDM noise shaping unit is second-order modulator comprising basic addition unit, multiplying unit, prolongs subtrator
Slow unit and K quantifying units；The digital PWM comparing unit uses basic K bit digital saw-toothed wave generator and K bit digital
PWM comparator, wherein the K bit digital saw-toothed wave generator generates sawtooth wave by accumulator, each clock cycle is defeated
Accumulated value out, the K bit digital PWM comparator is connected to the K quantifying unit, defeated for receiving the K quantifying unit
The position K quantized signal out；If the sawtooth wave numerical value that the K bit digital sawtooth wave generates is less than input numerical value, the digital PWM
Comparator output 1, otherwise output 0.
14. multi-mode power source managing system according to claim 2, which is characterized in that the 2nd LDO control circuit packet
The zero pole point compensated array circuit that operational amplifier and register can configure is included, wherein the operational amplifier is basic amplification
Device, normal phase input end and inverting input terminal receive reference voltage and feedback voltage respectively, and the operational amplifier is defeated
Outlet is connected to second PMOS switch by first switch to export the 2nd PMOS grid control signal to it；Zero pole
Point compensated array includes M adjustable resistance series connection and N shunt capacitances, and actual zero pole point offset is carried out by voltage bus
Control.
15. multi-mode power source managing system according to claim 14, which is characterized in that the first LDO control circuit
It is multiplexed the operational amplifier and pole-zero compensation circuit of the 2nd LDO control circuit, and the output of the operational amplifier
End is connected to the grid of first PMOS switch by second switch to export the first PMOS grid control signal to it；Institute
It states under LDO output mode, the practical zero pole point offset of the pole-zero compensation circuit is controlled by voltage bus.
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| CN110311675B (en) * | 2019-06-11 | 2023-03-24 | 湖南国科微电子股份有限公司 | Successive approximation type analog-to-digital conversion circuit and successive approximation type analog-to-digital converter |
| CN112398328B (en) * | 2020-11-24 | 2022-04-12 | 西安空间无线电技术研究所 | Power supply starting time sequence self-control circuit suitable for complex digital-analog hybrid system |
| CN112511031B (en) * | 2020-11-25 | 2021-10-08 | 华中科技大学 | Inverter based on delta-sigma and PID control and control method |
| KR102561778B1 (en) * | 2021-05-28 | 2023-07-31 | 울산과학기술원 | Apparatus for dc-dc buck converter with pwm/pfm dual mode |
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