CN106535415A - Overvoltage detection circuit and method of LED driver chip - Google Patents

Overvoltage detection circuit and method of LED driver chip Download PDF

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Publication number
CN106535415A
CN106535415A CN201611199913.6A CN201611199913A CN106535415A CN 106535415 A CN106535415 A CN 106535415A CN 201611199913 A CN201611199913 A CN 201611199913A CN 106535415 A CN106535415 A CN 106535415A
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voltage
detection
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CN106535415B (en
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不公告发明人
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Shanghai Canrui Technology Co Ltd
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Shanghai Canrui Technology Co Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits

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Abstract

The invention provides an overvoltage detection circuit and method of an LED driver chip. The vervoltage detection circuit of the LED driver chip comprises a detection circuit body and an anti-overvoltage detection failure module, wherein the anti-overvoltage detection failure module is connected to a first control signal input end for inputting a control signal, a detection voltage input end for inputting a detection voltage, a reference voltage input end for inputting a reference voltage and a detection circuit body; the overvoltage detection circuit is arranged for judging whether the detection voltage is smaller than the reference voltage or not after the control signal is received; and overvoltage detection can be performed by the detection circuit body when the detection voltage is smaller than the reference voltage. According to the overvoltage detection circuit and method of the LED driver chip provided by the invention, an LED overvoltage detection failure problem can be effectively avoided, and the overvoltage detection circuit has the advantages of high accuracy and high stability.

Description

LED drive chip over-voltage detection circuit and method
Technical field
The present invention relates to LED drive chip field, more particularly to a kind of LED drive chip over-voltage detection circuit and method.
Background technology
With the accelerated development of LED illumination industry, energy-conserving and environment-protective, it is reliable and stable, with low cost the advantages of become market On LED and LED drive IC mainstream development directions.Refer to Fig. 1, a kind of LED illumination System of existing topological structure, its In, inductance is L, and RCS is sampling resistor, and VCS ' is peak current detection voltage, and traditional LED overvoltage detections can solve the problem that line electricity Pressure VLINEThe LED overvoltage error detections produced at trough, over-pressed error detection due at the trough inductance L charge limited causing. As shown in Fig. 2 over-pressed error detection generally occurs at trough, maximum ON time turns off switching power tube MSW, when causing demagnetization Between reduce, be likely less than the minimum demagnetization time, cause LED overvoltage error detection, it is over-pressed that existing LED overvoltages have been detected as solution LED Error detection, then when overvoltage detection is judged, peak current detection voltage VCS ' in maximum ON time is reached by each cycle Peak current detection threshold value judges the premise of overvoltage detection as this cycle, although this kind of LED crosses pressure detection method and effectively can keep away Exempt from LED overvoltage error detections, but frequent power switch machine debugging, or powered mounted LED lamp are carried out in output no-load or overvoltage When occur LED when or not when connecing situation when, output end overvoltage is settled and fails detection in time, is caused component damage, is subtracted Few LED life-span.
Fig. 1, Fig. 3 are referred to for existing LED over-voltage detection circuit structural representations, including first comparator 11 ', the One latch 12 ', minimum demagnetization time generation unit 13 ', epidemic situation comparison unit 14 ', maximum ON time generation unit 15 ' and Counting unit 16 '.Wherein, the positive input of first comparator 11 ' connects detection voltage VCS ', negative input receives peak value electricity Stream detection threshold value VREF ', the output end of first comparator 11 ' output comparative result signal IPK is simultaneously answered with the first latch 12 ' Position end is connected;The set end of the first latch 12 ' is connected with the first output end of counting unit 16 ', receives set signal R ', the The output end of one latch 12 ' is connected with the first input end of counting unit 16 ';Minimum demagnetization time generation unit 13 ' it is defeated Enter end receive the first control signal PGATE, the first control signal PGATE ' be power tube MSW grids driving tube grid letter Number, its level height and power tube MSW grid levels height consistent, the output end and shape of minimum demagnetization time generation unit 13 ' Second input of state comparing unit 14 ' is connected, and the first input end of epidemic situation comparison unit 14 ' receives demagnetization signal TD ', and which the One output end export the first output signal OUT1 ', the second output end export the second output signal OUT2 ' respectively with counting unit 16 ' the second input, the 3rd input are connected;The input of maximum ON time generation unit 15 ' receives the first control letter Number PGATE ', the maximum ON time signal TONMAX ' of its output end output, maximum ON time signal TONMAX ' is through one The inversion signal TONMAXB ' of maximum ON time signal TONMAX ' is exported after phase inverter;4th input of counting unit 16 ' Receive inversion signal TONMAXB ' signals, the output end output overvoltage signal OVP ' of counting unit 16 '.
The course of work of the LED over-voltage detection circuits is:By in each cycle power tube maximum ON time TONMAX ', examine Survey voltage VCS ' and reach peak current detection threshold value VREF ' premise that follow-up LED output overvoltages are detected is carried out as this cycle.If In a certain Cyclical power pipe maximum ON time TONMAX ', detection voltage VCS ' reach peak current detection threshold value VREF ', produce The narrow spaces signal of raw comparative result signal IPK=1, while so that maximum ON time signal TONMAX '=1 will not be produced, The narrow spaces signal of comparative result signal IPK=1 causes to enable control signal EN_COUNTB=0, enables control signal ENB_ COUNT=0 enables nor gate, therefore the first output signal OUT1 of epidemic situation comparison unit ' meter can be delivered to by nor gate The counter 164 ' of counting unit, namely follow-up output overvoltage detection can be carried out:Minimum demagnetization time generation unit 13 ' is utilized First control signal PGATE ' minimum demagnetization time signal TDMIN is produced after power tube MSW shut-offs ', minimum demagnetization Time signal TDMIN ' epidemic situation comparison unit 14 ' together to be sent into demagnetization signal TD ' be compared, if comparative result is demagnetization letter Number TD '<The narrow spaces letter of minimum demagnetization time signal TDMIN ', then epidemic situation comparison unit exports the first output signal OUT1 '=0 Number and the narrow spaces signal of the second output signal OUT2 '=1, the first output signal OUT1 '=0 enabling control signal ENB_ Transmitted into counter 164 ' by nor gate in the case of COUNT=0, counter 164 ' is counted Jia one;If comparative result is to move back Magnetic signal TD '>Minimum demagnetization time signal TDMIN ', then epidemic situation comparison unit 14 ' exports the first output signal OUT '=1 and the The narrow spaces signal of two output signals OUT2 '=0 narrow spaces signal, the second output signal OUT '=2 is produced by NAND gate Counter 164 ' is on the one hand reset by the narrow spaces signal of set signal R '=1, on the other hand will enable control signal ENB_ COUNT is set to height, therefore the first output signal OUT1 ' counter 164 ' cannot be sent to by nor gate, enable control signal ENB_COUNT=1 causes clock signal clk '=0.If in a certain Cyclical power pipe maximum ON time TONMAX ', detection electricity Pressure VCS ' be unable to reach peak current detection threshold value VREF ', therefore cannot producing ratio compared with consequential signal IPK=1 narrow spaces believe Number, but while maximum ON time signal TONMAX '=1 can be produced, therefore maximum ON time signal TONMAX '=1 causes Set signal R '=1, counter 164 ' reset, while set signal R '=1 causes to enable control signal ENB_COUNT=1, because This first output signal OUT1 ' counter 164 ', clock signal clk cannot be delivered to by nor gate '=0, therefore this cycle Follow-up output overvoltage detection is not carried out inside.Follow-up overvoltage detection is except including the demagnetization signal in each cycle to detecting TD ' and minimum demagnetization time signal TDMIN ' it is compared, and this cycle Jia one to the counting of counter 164 ' or clearing is outer, also Add one including 164 ' continuous three cycle count of counter, then produce over-pressed signal OVP '=1.
The circuit can exclude input line voltage VLINEThe LED overvoltage error detection situations being close to during output voltage, for example Low line voltage input, high LED output voltages, or power cutoff moment, input line voltage VLINEIt is reduced to and is close to LED output voltages VLEDSeveral situations.Available circuit highly effective can avoid above-mentioned LED overvoltage error detection, but in some special circumstances, for example Carry out frequently switching on machine debugging when output no-load or overvoltage, or occur in powered mounted LED lamp LED when or not when connecing During situation, both special circumstances can cause existing LED over-voltage detection circuits that overvoltage detection failure of removal occurs, and refer to Fig. 4 Existing LED illumination System carry out frequently switching on LED overvoltages detection failure analysis figure when machine is debugged in output no-load or overvoltage. Existing LED crosses pressure detection method, and by each cycle, the peak current detection voltage VCS ' in the maximum ON time can reach peak value Current detection threshold VREF ' judges the premise of overvoltage detection as this cycle, peak value in even a certain cycle maximum ON time Current detection voltage VCS ' can reach peak current detection threshold value VREF ', with regard to not carrying out subsequently sentencing LED detections in this cycle It is disconnected.Normal work line voltage V of existing LED information display systemLINEThe output voltage V of waveform and normal workLEDVoltage waveform respectively such as Bend shown in the dotted line a and straight dotted line b in lower section, with line voltage V during normal work in Fig. 4LINEIntersecting dotted line c is overvoltage protection threshold Value VOVP, now ignores output voltage VLEDRipple, carries out frequently switching on and shutting down debugging, then actual input to power switch It is shown in solid in the output LED voltage waveform e of line voltage waveform d and reality such as Fig. 4, in power supply gap input line voltage VLINE Voltage declines, the input line voltage V at the power onLINERise, if now output voltage VLEDIt is unloaded, then after chip starts Output voltage VLEDVoltage rises always, starts output voltage V in certainLEDVoltage has been sufficiently close to line voltage VLINE, need It should be noted that output voltage V hereinLEDOvervoltage protection threshold VOVP is not reached, then now due to output voltage VLEDIt is sufficiently close to input line voltage VLINE, therefore inductive current rising is very slow, in chip maximum ON time TONMAX ' Interior current peak detection voltage VCS ' it is not reaching to current peak detection threshold value VREF ', therefore do not carry out within this cycle follow-up Output overvoltage detection, after some cycles, the voltage of output end fills higher and higher due to open circuit, if just in output end electricity Before pressure reaches overvoltage protection threshold VOVP, line voltage VLINEOutput voltage V is sufficiently close to allLED, then each cycle afterwards Current peak detection voltage VCS in the maximum ON time ' all it is unable to reach current peak detection threshold value VREF ', so that Do not carry out follow-up overvoltage detection to judge in each cycle, output voltage VLEDCan be with input line voltage VLINERaise and rise Height, and two voltages are always maintained at the state that is sufficiently close to, final output voltage VLEDLED overvoltage protection threshold VOVP can be exceeded, it Afterwards still due to output voltage VLEDIt is sufficiently close to input line voltage VLEDAnd cause each cycle can be in maximum ON time Current peak detection voltage VCS ' it is unable to reach current peak detection threshold value VREF ', it is follow-up in each cycle so as to not carry out Overvoltage detection judges, therefore LED output ends very likely carry out frequently switching on machine in the case of this output open circuit or overvoltage There is LED overvoltage detection failures in debugging, cause component damage.
Fig. 1, Fig. 5 are referred to, when wherein Fig. 5 is the LED that existing LED illumination System occurs in powered mounted LED lamp LED overvoltages detection failure analysis figure when or not situation when connecing.Existing LED crosses pressure detection method by each cycle in maximum conducting Interior peak current detection voltage VCS ' can reach peak current detection threshold value VREF ' judge before overvoltage detection as this cycle Carry, in even a certain cycle maximum ON time, peak current detection voltage VCS ' can reach peak current detection threshold value VREF ', With regard to not carrying out the follow-up judgement to LED detections in this cycle.Line voltage VLINEWith output voltage V during installation lampLEDIt is respectively real Shown in line f and solid line g, dotted line h is LED overvoltage protection threshold VOVP, output voltage V when dotted line i is normal workLED. Output voltage V is assumed in one power frequency periodLEDFor normal work when voltage, it is assumed that when from trough nearby back out lamp When coming in contact bad process, the once touching backed out lamp or install lamp process exports possible actually for LED information display system Occur repeatedly to access the process that LED and LED disconnects, then after LED disconnects for the first time, output voltage VLEDCan rise, if now Just at trough, it is possible to so that input line voltage VLINETrough is sufficiently close to output voltage, and now output voltage does not have Reach overvoltage protection threshold VOVP, then this cycle does not carry out over-pressed detection, LED is accessed again afterwards, this be one very Of short duration access procedure, LED output voltage VLEDFall after rise, if output voltage VLEDStill very close to input line voltage after falling VLINE, equally over-pressed detection is not carried out in this cycle, if during several times repeatedly, lucky LED voltage was below always Pressure rotection thresholds VOVP, and output voltage VLEDIt is sufficiently close to input line voltage VLINE, then each cycle is in maximum ON time Interior peak current detection voltage VCS ' is unable to reach peak current detection threshold value VREF ', therefore do not carry out in each cycle Follow-up overvoltage detection judges, until output voltage VLEDMore than overvoltage protection threshold VOVP, afterwards still due to output voltage VLEDIt is sufficiently close to input line voltage VLINEAnd cause each cycle current peak detection voltage VCS in the maximum ON time ' It is unable to reach current peak detection threshold value VREF ', so as to the overvoltage detection for not carrying out follow-up in each cycle judges, therefore LED Output end very likely it is this back out lamp or install lamp in the case of occur LED overvoltage detection failure, cause component damage.
Above-mentioned two situations illustrate existing at present to solve LED overvoltages detection side obtained from LED overvoltage error detections Although method effectively avoids over-pressed error detection, can not be timely for real output overvoltage failure in some special circumstances Detection, brings the shortcoming of LED overvoltages detection failure under some particular cases.
For existing with the LED over-voltage detection circuits for avoiding LED overvoltage flase drop brakes, how to avoid LED over-pressed Detection failure, improves LED and crosses pressure detection method, is allowed to more efficient, accurate, safety, becomes those skilled in the art and urgently solve Problem certainly.
The content of the invention
For above-mentioned deficiency of the prior art, the present invention provides a kind of LED drive chip over-voltage detection circuit and method, LED overvoltage detection Problem of Failure can be effectively prevented from, has the advantages that accuracy is high and stability is strong.
To achieve these goals, the present invention provides a kind of LED drive chip over-voltage detection circuit, including a detection circuit Body, also including an anti-overvoltage detection failed module, anti-overvoltage detection failed module connection one is input into the of control signal One control signal input, the detection voltage input of an input detection voltage, the reference voltage input of an input reference voltage End and the detection circuit body, which is set to after the control signal is received, and judges whether the detection voltage is less than The reference voltage, and the detection circuit body execution overvoltage inspection is enabled when the detection voltage is less than the reference voltage Survey.
Preferably, the detection circuit body includes:
One first comparator, the normal phase input end one detection voltage input of connection of the first comparator, described first The inverting input of comparator connects a peak current detection threshold value input;
One first latch, the first input end of first latch connect the output end of the first comparator;
One minimum demagnetization time generation unit, the input connection one first of the minimum demagnetization time generation unit are controlled Signal input part;
One condition adjudgement unit, the first input end of the condition adjudgement unit connect a demagnetization signal input, described Second input of condition adjudgement unit connects the output end of the minimum demagnetization time generation unit;
One maximum ON time generation unit, input connection first control of the maximum ON time generation unit Signal input part processed, the output end connection anti-overvoltage detection failed module of the maximum demagnetization time generation unit;And
One counting unit, the first input end of the counting unit connect the output end of first latch;The meter Second input of counting unit connects the first output end of the condition adjudgement unit;3rd input of the counting unit connects Connect the second output end of the condition adjudgement unit, the first output end of the counting unit connects the of first latch Two inputs, the second output end of the counting unit is used as over-pressed signal output part.
Preferably, the counting unit includes:
One first nor gate, the first input end of first nor gate connect the first input end of the counting unit, Second input of first nor gate connects the 4th input of the counting unit;
One second nor gate, the first input end of second nor gate connect the output end of first nor gate, institute The second input for stating the second nor gate connects the second input of the counting unit;
One first NAND gate, the first input end of the NAND gate connect the 3rd input of the counting unit, described Second input of NAND gate connects the 5th input of the counting unit, and the output end connection of first NAND gate is described First output end of counting unit;And
One counter, the first input end of the counter connect the output end of second nor gate, the counter The second input connect the output end of first NAND gate, the output end of the counter connects the of the counting unit Two output ends.
Preferably, the anti-overvoltage detection failed module includes:
One fixed pulse width generation unit, input connection first control signal of the fixed pulse width generation unit are defeated Enter end;
One second comparator, the normal phase input end of second comparator connect the detection voltage input, and described the The inverting input of two comparators connects a reference voltage input;
One second latch, the first input end of second latch connect the output of the fixed pulse width generation unit End, the second input of second latch connect the output end of second comparator, the output of second latch 4th input of the end connection counting unit;
One phase inverter, the input of the phase inverter connect the output end of second latch;And
One second NAND gate, the first input end of second NAND gate connect the maximum ON time generation unit Output end, the second input of second NAND gate connect the output end of the phase inverter, the output of second NAND gate 5th input of the end connection computing unit.
A kind of LED drive chip of the present invention crosses pressure detection method, including step:Driven using LED of the present invention Chip over-voltage detection circuit carries out over-pressed detection to a LED drive chip.
Preferably, further include step:
S1:Using the anti-overvoltage detection failed module judge detection voltage input input a detection voltage and The size of one reference voltage;
S2:If the detection voltage continues subsequent step less than the reference voltage;The detection electricity is otherwise judged again Press with the peak current detection threshold value input input a peak current detection threshold value size, as the detection voltage it is little In the peak current detection threshold value, the counting of the counting unit resets and return to step S1, otherwise continues subsequent step;
S3:Judge a minimum demagnetization time signal of a demagnetization signal and the minimum demagnetization time generation unit output Size;
S4:If the demagnetization signal adds one less than the minimum demagnetization time signal, the counting of the counting unit, and Continue subsequent step;The counting of otherwise described counting unit resets and return to step S1;
S5:Whether the count value for judging the counting unit is preset value;
S6:If it is, one over-pressed signal of counting unit output;Otherwise return to step S1.
The present invention is by setting up anti-overvoltage detection failed module so that detection circuit body is except being less than peak in detection voltage Overvoltage detection is performed during value current detection threshold outer, over-pressed detection is similarly performed when detection voltage is less than reference voltage, gram Prior art has been taken in some special circumstances for real output overvoltage failure can not be detected in time so as to cause over-pressed inspection The defect of dendrometry effect, perfect LED cross pressure detection method, be allowed to more efficiently, accurately, safety.
Description of the drawings
Fig. 1 is the non-isolated topological structure circuit diagram of existing LED illumination System;
Fig. 2 is existing over-pressed detection waveform figure;
Fig. 3 is the structural representation of existing LED over-voltage detection circuits;
Fig. 4 is that existing LED illumination System carries out LED mistakes during frequently power switch machine debugging in output no-load or overvoltage Pressure detection failure analysis figure
Fig. 5 be existing LED illumination System occur in powered mounted LED lamp LED when LED mistakes when or not situation when connecing Pressure detection failure analysis figure;
Structural representations of the Fig. 6 for the LED drive chip over-voltage detection circuit of the embodiment of the present invention;
Fig. 7 is the LED drive chip over-voltage detection circuit detection voltage of the embodiment of the present invention less than work during reference voltage Make comparison of wave shape figure;
Fig. 8 is more than reference voltage but is less than for the LED drive chip over-voltage detection circuit detection voltage of the embodiment of the present invention Work wave comparison diagram during current peak detection threshold value;
Fig. 9 is more than current peak detection threshold for the LED drive chip over-voltage detection circuit detection voltage of the embodiment of the present invention Work wave comparison diagram during value;
Figure 10 is exported with output voltage difference in the case of preset range for input line voltage in the embodiment of the present invention The schematic diagram of overvoltage detection;
Figure 11 protects waveform to there is suddenly output voltage when opening a way at input line voltage trough in the embodiment of the present invention;
Figure 12 crosses pressure detection method flow chart for the LED drive chip of the embodiment of the present invention.
Specific embodiment
Below according to accompanying drawing 6-12, presently preferred embodiments of the present invention is given, and is described in detail, make to be better understood when The function of the present invention, feature.
Refer to Fig. 6, a kind of LED drive chip over-voltage detection circuit of the present invention, for whether detecting the LED in Fig. 1 Overvoltage, including detection circuit body 1 (part beyond thick line dashed box) and an anti-overvoltage detection 2 (thick line dashed box of failed module Interior part), anti-overvoltage detection 2 connection detection circuit body 1 of failed module, for preventing LED overvoltage detection failures.
Wherein, detect that circuit body 1 includes:One first comparator 11,12, one minimum demagnetization time of one first latch produce Raw unit 13,14, one maximum ON time generation unit 15 of a condition adjudgement unit and a counting unit 16.First comparator 11 Normal phase input end connect a detection voltage input, receive detection voltage VCS, the inverting input of first comparator 11 connects A peak current detection threshold value input is connect, peak current detection threshold value VREF is received.First input of the first latch 12 The output end of end connection first comparator 11, receives one first comparison signal IPK1.Minimum demagnetization time generation unit 13 it is defeated Enter one first control signal input of end connection, receive the first control signal PGATE.The first input end of condition adjudgement unit 14 Connect a demagnetization signal input, receive a demagnetization signal TD, the minimum demagnetization of the second input connection of condition adjudgement unit 14 The output end of time generation unit 13, receives minimum demagnetization time signal TDMIN.Maximum ON time generation unit 15 it is defeated Enter the first control signal input of end connection, receive the first control signal PGATE, the output of maximum ON time generation unit 15 One maximum ON time signal TONMAX of end output.The first input end of counting unit 16 connects the output of the first latch 12 End, receives one first and enables control signal EN1_COUNT;Second input connection status judging unit 14 of counting unit 16 First output end, receives one first output signal OUT1;3rd input connection status judging unit 14 of counting unit 16 Second output end, receives one second output signal OUT2, and the first output end of counting unit 16 connects the of the first latch 12 Two inputs, the second output end of counting unit 16 is used as over-pressed signal output part, output overvoltage signal OVP.
Further, counting unit 16 includes:One first nor gate 161, one second nor gate 162, one first NAND gate 163 and a counter 164.The first input end of the first input end connection count unit 16 of the first nor gate 161, receives first Control signal EN1_COUNT is enabled, the 4th input of the second input connection count unit 16 of the first nor gate 161 connects Receive one second enable control signal EN2_COUNT.The first input end of the second nor gate 162 connects the defeated of the first nor gate 161 Go out end, receive the 3rd and enable control signal ENB_COUNT, when this signal is 0, representing allows the first output signal OUT1 to be delivered to Counter 164.Second input of the second input connection count unit 16 of the second nor gate 162, receives the first output letter Number OUT1.3rd input of the first input end connection count unit 16 of the first NAND gate 163, receives the second output signal OUT2, the 5th input of the second input connection count unit 16 of the first NAND gate 163 receive maximum ON time signal The inversion signal TONMAXB of TONMAX, the first output end of the output end connection count unit 16 of the first NAND gate 163, output One set signal R.The first input end of counter 164 connects the output end of the second nor gate 162, receives a clock signal clk, Second input of counter 164 connects the output end of the first NAND gate 163, receives set signal R, the output of counter 164 Hold the second output end of connection count unit 16, output overvoltage signal OVP.
In the present embodiment, anti-overvoltage detection failed module 2 includes:One fixed pulse width generation unit 21, one second comparator 22nd, one second latch 23, a phase inverter 24 and one second NAND gate 25.The input connection the of fixed pulse width generation unit 21 One control signal input, receives the first control signal PGATE.The normal phase input end connecting detection voltage of the second comparator 22 is defeated Enter end, receive detection voltage VCS, the inverting input of the second comparator 22 connects a reference voltage input, receives a benchmark Voltage VCSTH.The first input end of the second latch 23 is connected the output end of pulsewidth generation unit 21, receives one and resets letter Number RESET, the second input of the second latch 23 connect the output end of the second comparator 22, receive one second comparison signal IPK2, the 4th input of the output end connection count unit 16 of the second latch 23, output second enable control signal EN2_ COUNT.The input of phase inverter 24 connects the output end of the second latch 23.The first input end of the second NAND gate 25 connects most The output end of big ON time generation unit 15, receives maximum ON time signal TONMAX, and the second of the second NAND gate 25 is defeated Enter the output end of end connection phase inverter 24, the output end of the second NAND gate 25 connects the 5th input of computing unit, and output is most The inversion signal TONMAXB of big ON time signal TONMAX.
Reset signal RESET signal is with certain pulsewidth using the generation of the first control signal PGATE rising edge signal Second enable control signal EN2_COUNT is reset to 1, within the TON times, if the second comparison signal by the high level signal of TON IPK2 is changed into high, i.e., detection voltage VCS exceeds reference voltage V CSTH, then the second enable control signal EN2_COUNT is set For 0, this result will be always maintained in this cycle T OFF time, second enable control signal EN2_COUNT be 0 cause simultaneously it is anti- The output end of phase device 24 is 1, that is, allow the second NAND gate 25 to export the inversion signal TONMAXB of maximum ON time signal, this When, if within the TON times, the first comparison signal IPK1 is changed into high, i.e., detection voltage VCS reaches peak current detection threshold value VREF, then maximum ON time signal TONMAX is 0 within the TON times always, therefore TONMAXB is 1, it is allowed to the second output Signal OUT2 is delivered to counter 164, and now as the first comparison signal IPK1 is the 1, therefore the 3rd enable control signal ENB_COUNT is 0 and can be always maintained in this cycle T OFF time, therefore can make the first output signal OUT1 in the TOFF times Counter 164 is delivered to, detection voltage VCS reaches meeting switch-off power pipe MSW after peak current detection threshold value VREF, and inductance opens L Begin demagnetization, detection demagnetization signal TD and minimum demagnetization time signal TDMIN size, if demagnetization signal TD>Minimum demagnetization time letter Number TDMIN, then the first output signal OUT1 remain 1, the second output signal OUT2 is changed into 0 from 1, now clock signal clk end 0 is remained, set signal R is 1 from 0, therefore counter 164 resets;If demagnetization signal TD<Minimum demagnetization time signal TDMIN, Then the first output signal OUT1 is changed into 0 from 1, and the second output signal OUT2 remains 1, and now clock signal clk end is changed into 1 from 0, Set signal R remains 0, continuous three demagnetization signal TD<Minimum demagnetization time signal TDMIN, 164 output end of counter are produced Over-pressed signal OVP=1.If in maximum ON time, the first comparison signal IPK1 is low always, i.e., detection voltage VCS is most Peak current detection threshold value VREF is not reaching in big ON time, then maximum ON time signal TONMAX is led in power tube It is changed into high level after logical maximum ON time, power tube is turned off by this signal again, and maximum ON time signal TONMAX becomes at once For 0, if the first comparison signal IPK1=0, the second comparison signal IPK2=1 has reference voltage in maximum ON time VCSTH<Detection voltage VCS<Peak current detection threshold value VREF, then no matter first enable control signal EN1_COUNT be 0 or 1, maximum ON time signal TONMAX=1 can cause set signal R=1, and counter 164 is zeroed out.Meet inspection Voltage VCS is surveyed in reference voltage V CSTH<Detection voltage VCS<During peak current detection threshold value VREF scope, to this, the cycle does not enter Row overvoltage detection judgement, and in detection voltage VCS<During reference voltage V CSTH, to this, the cycle carries out over-pressed detection, it is to avoid overvoltage Detection failure.
Fig. 6, Fig. 7 are referred to, when detection voltage VCS<During reference voltage V CSTH, it is believed that first enables control signal EN1_ Initial values of the COUNT before this cycle arrives is 0, illustrates that the previous cycle is probably that detection voltage VCS reaches peak point current inspection Survey threshold value VREF value and demagnetization signal TD>Minimum demagnetization time signal TDMIN, or may previous cycle reference voltage V CSTH< Detection voltage VCS<Peak current detection threshold value VREF, it is also possible to previous cycle detection voltage VCS<Reference voltage V CSTH, first Enable the result that control signal EN1_COUNT is kept for the last fortnight phase.Assume the first initial value for enabling control signal EN1_COUNT It is 0, is actually likely to as 1, if initial value is 1, illustrate that possibly detection voltage VCS of previous cycle reaches peak current detection threshold Value VREF and demagnetization signal TD<Minimum demagnetization time signal TDMIN, or may previous period detecting signal VCS<Reference voltage VCSTH, the first enable control signal EN1_COUNT keep the result of the last fortnight phase.First control signal EN1_ is enabled no matter COUNT is 0 or 1, if having detection voltage VCS in this cycle<Reference voltage V CSTH, then second enable control signal EN2_COUNT For 1, therefore to enable control signal ENB_COUNT be 0 this cycle the 3rd, it is allowed to which the first output signal OUT1 signal is sent to counting Device 164.
Fig. 6, Fig. 8 are referred to, when reference voltage V CSTH<Detection voltage VCS<During peak current detection threshold value VREF, it is believed that Initial value of first enable control signal EN1_COUNT before this cycle arrives is 0, and actual first enables control signal EN1_ The initial value of COUNT may be 0, it is also possible to for 1.Acquiescence press initial value for 0, but no matter the first enable control signal EN1_ The initial value of COUNT is 0 or is 1, and this cycle is bound to produce maximum ON time signal TONMAX=1, by set signal R It is changed into 1, therefore this cycle is not counted, and counter 164 is reset, therefore first enables control signal EN1_COUNT After initial value does not affect whether this cycle is counted, and this cycle set signal R signal is changed into 1, first is enabled and is controlled Signal EN1_COUNT is set to 0, and detection voltage VCS occurs to next cycle<Reference voltage V CSTH, reference voltage V CSTH<Detection Voltage VCS<Peak current detection threshold value VREF and detection voltage VCS>The situation of peak current detection threshold value VREF all without send out The situation of raw miscount.
Fig. 6, Fig. 9 are referred to, when detection voltage VCS>The situation of peak current detection threshold value VREF, the first comparison signal First enable control signal EN1_COUNT was reset to 1 before the TOFF times arrive by IPK1=1, now reset signal RESET So that second enables control signal EN2_COUNT=0, so the 3rd enables control signal ENB_COUNT=0.If TOFF There is demagnetization signal TD in time<Minimum demagnetization time signal TDMIN, then have the first output signal OUT1 to be changed into 0 from 1, and second is defeated Go out signal OUT2 and remain 1, notice that the second output signal OUT2 is faster than the transmission of the first output signal OUT1, therefore the second output letter Number OUT2=1 signals make set signal R signal remain 0, now the inversion signal of maximum ON time signal TONMAX TONMAXB=1, afterwards the first output signal OUT1 signal be changed into 0 from 1, therefore clock signal clk is changed into 1 from 0, counter 164 Count is incremented;If there is demagnetization signal TD in the TOFF times>Minimum demagnetization time signal TDMIN, then have the first output signal OUT1 to protect Hold as 1, the second output signal OUT2 is changed into 0 from 1, therefore set signal R is changed into 1 from 0, and clock signal clk remains 0, counts Device 164 resets.
A kind of reference voltage V CSTH setting principle of LED drive chip over-voltage detection circuit of the present invention is as follows:
The effect of anti-overvoltage detection failed module 2 is to ensure each cycle by detection voltage VCS>Peak current detection threshold value VREF or detection voltage VCS<Reference voltage V CSTH prevents LED over-pressed as the premise that follow-up overvoltage detection is carried out in this cycle Detection failure.
Reference voltage V CSTH to be manually set, be one it is less compare threshold value, and reference voltage V CSTH is less than peak value Current detection threshold VREF, reference voltage V CSTH setting value to be considered peak point current sampling resistor Rcs in peripheral circuit, electricity Sense L, power tube conduction voltage drop VSW, input line voltage and output voltage difference and peak current detection threshold value VREF trade off to set It is fixed.
If a certain periodical input line voltage VLINEIt is sufficiently close to output voltage VLED, then one it is scheduled on chip maximum ON time In TONMAX, detection voltage VCS is not reaching to peak current detection threshold value VREF, it is assumed that this cycle detection voltage VCS just reaches To reference voltage V CSTH, and now inductive current is ICSTH, input line voltage and output voltage now are respectively VLINEWith VLED, then had according to formula of the BUCK circuits in power tube ON time:
(VLINE-VLED-Vsw) TONMAX=ICSTH·L (1)
VCSTH=ICSTH·Rcs (2)
Can be obtained according to formula (1) and (2):
Difference V of reference voltage V CSTH and line voltage and output voltage as can be seen from the above equationLINE-VLEDBetween relation, V nowLINE-VLEDWhen on the one hand representing normal work, input line voltage trough is at least than output voltage during normal work Value is higher by VLINE-VLED, because if actually entering line voltage trough is less than V than the value that normal output voltage is higher byLINE-VLED, then Over-pressed detection can be carried out in trough, but as induction charging deficiency causes demagnetization time TD continuously several times less than the minimum demagnetization time TDMIN, therefore overvoltage detection false triggering can be produced;When on the other hand also represent present invention solution detection failure, when output electricity Pressure becomes closer to input line voltage, and input line voltage is less than V with both output voltages differenceLINE-VLEDWhen, can carry out again Overvoltage detection follow-up in each cycle.Once output voltage is increased to and is close to input line voltage and causes maximum ON time There is reference voltage V CSTH in TONMAX<Detection voltage VCS<Peak current detection threshold value VREF, then this is several to meet this condition The individual cycle does not carry out follow-up LED output overvoltages detection, but as input line voltage frequency is 100Hz, and output voltage frequency Even more big for tens kHz, when output no-load or overvoltage, output voltage increase ratio input line voltage rises fast a lot, Jing Guoji Individual cycle output voltage will be risen to so that detection voltage VCS<Reference voltage V CSTH, can now carry out output overvoltage inspection Survey.
If when output no-load or overvoltage, output voltage increase ratio input line voltage is many soon, export through several cycles The value of voltage can make detection voltage VCS to rise to<Reference voltage V CSTH, you can be sufficiently close to input electricity in output voltage Proceed LED overvoltage detections in the case of pressure, but in view of several cycles of over-pressed detection cannot be carried out in maximum conducting Between have reference voltage V CSTH in TONMAX<Detection voltage VCS<Peak current detection threshold value VREF, the output electricity in these cycles Pressure is risen to so that detection voltage VCS<Reference voltage V CSTH can just be protected.
Figure 10 is input line voltage V in the present inventionLINEWith output voltage VLEDDifference is being entered more than V1 or in the case of being less than V2 Row output overvoltage detects schematic diagram, wherein, VLINE1It is than input line voltage VLINEThe magnitude of voltage of low V1, VLINE2It is than input line electricity Pressure VLINEThe magnitude of voltage of low V2, as output voltage VLED<VLINE1When so that detection voltage VCS energy in maximum ON time TONMAX Reach peak current detection threshold value VREF, output voltage VLED=VLINE1When, just so that detection voltage VCS is in maximum conducting Between TONMAX reach peak current detection threshold value VREF, when output voltage enters into VLINE2<VLED<VLINE1During scope so that most There is reference voltage V CSTH in big ON time TONMAX<Detection voltage VCS<Peak current detection threshold value VREF, works as output voltage VLEDInto VLINE2<VLED<VLINEDuring scope so that have detection voltage VCS in maximum ON time TONMAX<Reference voltage VCSTH, is set at V to be ensured for reference voltage V CSTH valueLINE2-VLINE1Voltage is not too big, at least ensures output The pressure voltage of end member device is more than V than the value that overvoltage protection threshold VOVP voltages are higher byLINE2-VLINE1.When ignoring two kinds of situations Power tube conduction voltage drop difference, RCSEquivalent series resistance in ohmically pressure drop and inductance L, has according to above-mentioned analysis:
If in maximum ON time TONMAX causing just detection voltage VCS to rise to reference voltage V CSTH, have:
(V2-Vsw) TONMAX=ICSTH·L (5)
VCSTH=ICSTH·Rcs (2)
Wherein ICSTHInductor current value during reference voltage V CSTH is risen to for detection voltage VCS voltage, VSW is power Pipe conduction voltage drop, V2 are V2 voltages shown in Fig. 6.
If in maximum ON time TONMAX causing just detection voltage VCS voltage to rise to peak current detection threshold value VREF, then have:
(V1-Vsw) TONMAX=Ipk·L (6)
VREF=IPK·Rcs (7)
Wherein IPKInductor current value during peak current detection threshold value VREF is risen to for detection voltage VCS, VSW is power Pipe conduction voltage drop, V2 are V2 voltages shown in Fig. 6.
Had according to formula (5) and (2):
Had according to formula (6) and (7):
From formula (8) and (9) as can be seen that the ratio of peak current detection threshold value VREF and reference voltage V CSTH is (V1- VSW) and (V2-VSW) ratio, it is assumed that VREF=500mV, V2=5V, VSW=2.5V, if VCSTH=50mV, then there is V1= 22.5V, if VCSTH=100mV, then V1=10V, theoretical calculation have ignored the equivalent series resistance pressure drop of inductance, RCSResistance V when pressure drop and two kinds of situationsSWDifference, actually electric current are ICSTHWhen, VSWIt is smaller, actual conditions VREF and reference voltage VCSTH ratios should be:
Wherein VSW1、VSW2Respectively inductive current is IPK、ICSTHFlow through the voltage of power tube conducting resistance RON generation, VSW1 >VSW2, VLESR1、VLESR2Respectively inductive current is IPK、ICSTHFlow through the voltage that the series parasitic resistance of inductance L is produced, VLESR1> VLESR2, VCS1、VCS2Respectively inductive current is IPK、ICSTHFlow through peak point current sampling resistor RCSVoltage, VCS1>VCS2
Therefore to roll over when reference voltage V CSTH sets in consideration, if setting larger, easily export at trough Detection is held up, therefore, the maximum of reference voltage V CSTH scope of design will compare output voltage according to practical application line voltage trough How much be at least higher by set, if reference voltage V CSTH set it is less, then still have the possibility of output overvoltage detection failure, Therefore above-mentioned analysis is combined according to concrete application peripheral circuit parameter and chip internal peak current detection threshold value VREF, power tube Conducting resistance RON etc. and input and output voltage situation are set.Therefore the condition for defining reference voltage V CSTH maximum is Using the value that neutral voltage trough is at least had more than output voltage, it is ensured that now detection voltage VCS in application scheme>=benchmark Voltage VCSTH;The condition for defining reference voltage V CSTH minimum of a value can be allowed in reference voltage V CSTH<Detection voltage VCS< During peak current detection threshold value VREF, output end exceedes overvoltage protection threshold VOVP, at least ensures the pressure of output end components and parts Value is higher by this value than overvoltage protection threshold VOVP voltages.
In certain application, actually inductance is 3mH to such as present invention, and chip maximum ON time TONMAX is 40us, is adopted When resistance RCS is 1.5 Ω, when V2 is 5-7V, when reference voltage V CSTH is 50mV, i.e., over-pressed flase drop will not occur at trough Survey, and VLINE2-VLINE1Only several volts, even lucky reference voltage V CSTH<Detection voltage VCS<Peak current detection threshold value During VREF, value of the output end more than overvoltage protection threshold VOVP also can only exceed several volts, afterwards through several cycle detection voltages VCS<Reference voltage V CSTH, is put into overvoltage protection, and output voltage will not rise again.
Figure 11 is referred to, in input line voltage VLINENeighbouring (the now V of troughLINE<VOVP), now output voltage VLEDAlso do not have There are arrival overvoltage protection threshold VOVP, output voltage VLEDInput line voltage V has been sufficiently close to when rising to V1LINE, also can be even Continuous three generations detection voltage VCS<Reference voltage V CSTH situation, can now produce over-pressed detection signal, into overvoltage protection, Power tube is turned off, output voltage V after power tube shut-offLEDIt is likely to decrease, is restarted after a period of time again, now Line voltage may have built up so that can be with normal work for a period of time after restarting, output end voltage VLEDCan be further Raise, if output end voltage VLEDAfter rising, V is caused againLEDIt is sufficiently close to input line voltage VLINE, VLEDVoltage rises to V2 When, then overvoltage protection state is again gone into, repeatedly said process, VLEDWhen voltage rises to V3, V4, until output end electricity Pressure VLEDOvervoltage protection threshold VOVP is risen to, such as chip enters LED overvoltage protection states after producing LED output overvoltage signals, When reopening again a period of time, due to being varied from chip overvoltage shut-off line voltage this period, therefore often It is possible that following three kinds of situations after once restarting:
(1) three detection voltage VCS<Reference voltage V CSTH, then result is generation LED overvoltage detection signal OVP=1, Output LED does not rise substantially;
(2) three detection voltages VCS>Peak current detection threshold value VREF, then due to VLEDOvervoltage protection threshold is reached Value VOVP, therefore, it is possible to continuously judge three demagnetization signal TD<Minimum demagnetization time signal TDMIN, it is as a result basic to export LED Do not rise or ascensional range be very little, ascensional range be three times demagnetization by energy accumulation in output capacitance;
(3) reference voltage V CSTH<Detection voltage VCS<Peak current detection threshold value VREF, does not continue to carry out in this cycle The LED overvoltage detections of next step judge that above-mentioned analysis is mentioned when detection voltage VCS is in reference voltage V CSTH<Detection voltage VCS< When peak current detection threshold value VREF changes, control one with regard to the amplitude that this State- output voltage rises according in the content of the invention Determine in scope, this state can be jumped in (1) or (2) state quickly.
Output voltage VLED" hiccup " pattern can be kept at overvoltage protection threshold VOVP, in restarting repetition each time Process is stated, until output voltage VLEDWill not rise in continuation after reaching overvoltage protection threshold VOVP, or only can rise to than overvoltage The high a certain amount of allowed band voltage of rotection thresholds VOVP voltage is (when output reaches overvoltage protection threshold VOVP, just at inspection Voltage VCS is surveyed in reference voltage V CSTH<Detection voltage VCS<The situation of peak current detection threshold value VREF), export components and parts Pressure voltage is generally higher by some allowances than overvoltage protection threshold VOVP, therefore output end components and parts are served with the work of overvoltage protection With.
Whether a kind of LED drive chip over-voltage detection circuit of the present invention carries out the judgement bar of over-pressed detection in a certain cycle Part order is followed successively by:1st, judge whether detection voltage VCS reaches reference voltage V CSTH, 2, judge whether detection voltage VCS reaches Peak current detection threshold value VREF.As these judge whether that the condition for detecting all occurs the positive pulse width in RESET signal In TON, and for whether this cycle will carry out over-pressed detection, i.e. demagnetization signal TD and minimum demagnetization time signal TDMIN size Be more but occur within the negative pulse width TOFF time of RESET signal, as long as therefore whether are carried out overvoltage this cycle The judged result of detection before TOFF arrivals was produced and was kept in the TOFF times, and whether detection voltage VCS reaches benchmark Voltage VCSTH and peak current detection threshold value VREF all occurred within the TON times, as long as therefore will determine that result is protected in TOFF Hold, therefore the present invention can be overturned for the order of the Rule of judgment 1 and 2 that over-pressed detection whether is carried out in this cycle, Can judge simultaneously, but really as detection voltage VCS was begun to ramp up from 0 within the TON times, be bound to first reach benchmark electricity VCSTH, therefore the present invention is pressed to judge first whether to reach reference voltage V CSTH to detection voltage VCS.
Fig. 6, Figure 12 are referred to, a kind of LED drive chip of the present invention crosses pressure detection method, driven using the LED of the present invention Dynamic chip over-voltage detection circuit carries out over-pressed detection, including step to a LED drive chip:
S1:Detect that failed module 2 judges detection voltage VCS and a base of detection voltage input input using anti-overvoltage The size of quasi- voltage VCSTH;
S2:If detection voltage VCS continues subsequent step less than reference voltage V CSTH;Detection voltage VCS is otherwise judged again The size of peak current detection threshold value VREF being input into peak current detection threshold value input, such as detection voltage VCS are less than Peak current detection threshold value VREF, the counting of counting unit reset and return to step S1, otherwise continue subsequent step;
S3:Judge a minimum demagnetization time signal of a demagnetization signal TD and the minimum output of demagnetization time generation unit 13 The size of TDMIN;
S4:If demagnetization signal TD adds one less than minimum demagnetization time signal TDMIN, the counting of counting unit 16, and after Continuous subsequent step;Otherwise the counting of counting unit 16 resets and return to step S1;
S5:Whether the count value for judging counting unit 16 is preset value;
S6:If it is, one over-pressed signal OVP of the output of counting unit 16;Otherwise return to step S1.
A kind of LED drive chip of the present invention crosses whether pressure detection method reaches reference voltage to detection voltage VCS first VCSTH judged, reference voltage V CSTH=k* peak current detection threshold VREF, wherein 0<k<1, coefficient k is generally selected in 0.1 Left and right.If detection voltage VCS voltage reaches reference voltage V CSTH, then judge detecting system whether in the maximum conducting of chip again In time, detection voltage VCS reaches peak current detection threshold value VREF.If being not reaching to, demagnetization signal TD is likely due to inductance Undercharge and be less than minimum demagnetization time signal TDMIN, be also possible to certainly demagnetization signal TD>Minimum demagnetization time signal TDMIN, both of which are not over-voltage faults, then to this, cycle demagnetization signal TD and chip internal minimum demagnetization time do not believe Number TDMIN is compared, and counter is zeroed out, and does not produce over-pressed signal;If in chip maximum ON time TONMAX In time, peak current detection voltage VCS reaches peak current detection threshold voltage VREF, then to this cycle demagnetization time TD and Chip internal minimum demagnetization time TDMIN is compared, if comparative result is demagnetization signal TD>Minimum demagnetization time signal TDMIN, then counter O reset, if comparative result is demagnetization signal TD<Minimum demagnetization time signal TDMIN, then counter add one And judge whether counter continuous counter is preset value (such as 3), and if continuous counter is preset value, output overvoltage signal OVP, If continuous counter is not preset value, next cycle goes successively to judge flow process.If detection signal VCS voltage does not reach at the beginning To reference voltage V CSTH, then directly whether time TD of demagnetizing is judged less than minimum demagnetization time TDMIN, equally, if Comparative result is demagnetization signal TD>Minimum demagnetization time signal TDMIN, then counter O reset, if comparative result is demagnetization signal TD<Minimum demagnetization time TDMIN, then counter add, if continuous counter be three, Then output overvoltage OVP signals, if continuous counter is not three, next cycle goes successively to judge flow process, if in maximum conducting Interior detection voltage VCS is not up to reference voltage V CSTH, then this cycle is still to time TD and the minimum demagnetization time of demagnetizing TDMIN is compared, and as induction charging is not enough, necessarily has demagnetization signal TD<Minimum demagnetization time signal TDMIN, therefore count Number Jia one, is now to there occurs that input voltage is sufficiently close to output voltage situation, if therefore triggering output overvoltage continuous three times Protection, if now output can be necessarily protected more than overvoltage protection threshold VOVP, if now output end is also not reaching to over-pressed guarantor Shield threshold value VOVP, but now output one is set to zero load or overvoltage, can just cause output voltage VLEDIt is sufficiently close to input line voltage VLINIESo that detection voltage VCS<Reference voltage V CSTH, even if therefore this kind of situation in output voltage VLEDIt is not reaching to overvoltage Just there is overvoltage protection before rotection thresholds VOVP, after protection, output has declined, therefore does not have switch periods when protecting, System does not continue to power to output end, then exports after protection and also may proceed to rise, output eventually rises to overvoltage protection Threshold value VOVP, therefore output over-voltage protection effect can be played all the time, sent out before output is not reaching to overvoltage protection threshold VOVP Overvoltage protection several times is given birth to, but this kind of situation has necessarily occurred in output overvoltage or no-load condition, final output can rise, but will not More than overvoltage protection threshold VOVP.
Record above, only presently preferred embodiments of the present invention, be not limited to the scope of the present invention, the present invention's is upper State embodiment to make a variety of changes.What i.e. every claims and description according to the present patent application were made Simply, equivalence changes and modification, fall within the claims of patent of the present invention.

Claims (6)

1. a kind of LED drive chip over-voltage detection circuit, an including detection circuit body, it is characterised in that also including an anti-mistake Press and detect failed module, the first control signal input of one input control signal of anti-overvoltage detection failed module connection, One detection voltage input, the reference voltage input of an input reference voltage and the detection circuit sheet for being input into detection voltage Body, which is set to after the control signal is received, and whether judges the detection voltage less than the reference voltage, and in institute Enable the detection circuit body perform overvoltage detection when detection voltage is stated less than the reference voltage.
2. LED drive chip over-voltage detection circuit according to claim 1, it is characterised in that the detection circuit body Including:
One first comparator, the normal phase input end of the first comparator connect the detection voltage input, first ratio Connect a peak current detection threshold value input compared with the inverting input of device;
One first latch, the first input end of first latch connect the output end of the first comparator;
One minimum demagnetization time generation unit, input connection the first control letter of the minimum demagnetization time generation unit Number input;
One condition adjudgement unit, the first input end of the condition adjudgement unit connect a demagnetization signal input, the state Second input of judging unit connects the output end of the minimum demagnetization time generation unit;
One maximum ON time generation unit, input connection the first control letter of the maximum ON time generation unit Number input, the output end connection anti-overvoltage detection failed module of the maximum demagnetization time generation unit;And
One counting unit, the first input end of the counting unit connect the output end of first latch;It is described to count single Second input of unit connects the first output end of the condition adjudgement unit;The 3rd input connection institute of the counting unit The second output end of condition adjudgement unit is stated, the second of the first output end connection first latch of the counting unit is defeated Enter end, the second output end of the counting unit is used as over-pressed signal output part.
3. LED drive chip over-voltage detection circuit according to claim 2, it is characterised in that the counting unit includes:
One first nor gate, the first input end of first nor gate connect the first input end of the counting unit, described Second input of the first nor gate connects the 4th input of the counting unit;
One second nor gate, the first input end of second nor gate connect the output end of first nor gate, and described the Second input of two nor gates connects the second input of the counting unit;
One first NAND gate, the first input end of the NAND gate connect the 3rd input of the counting unit, it is described with it is non- Second input of door connects the 5th input of the counting unit, and the output end of first NAND gate connects the counting First output end of unit;And
One counter, the first input end of the counter connect the output end of second nor gate, and the of the counter Two inputs connect the output end of first NAND gate, and the second of the output end connection counting unit of the counter is defeated Go out end.
4. the LED drive chip over-voltage detection circuit according to Claims 2 or 3, it is characterised in that the anti-overvoltage detection Failed module includes:
One fixed pulse width generation unit, the input of the fixed pulse width generation unit connect the first control signal input End;
One second comparator, the normal phase input end of second comparator connect the detection voltage input, second ratio Connect the reference voltage input compared with the inverting input of device;
One second latch, the first input end of second latch connect the output end of the fixed pulse width generation unit, Second input of second latch connects the output end of second comparator, and the output end of second latch connects Connect the 4th input of the counting unit;
One phase inverter, the input of the phase inverter connect the output end of second latch;And
One second NAND gate, the first input end of second NAND gate connect the output of the maximum ON time generation unit End, the second input of second NAND gate connect the output end of the phase inverter, and the output end of second NAND gate connects Connect the 5th input of the computing unit.
5. a kind of LED drive chip crosses pressure detection method, including step:Driven using the LED described in any one of claim 1~4 Dynamic chip over-voltage detection circuit carries out over-pressed detection to a LED drive chip.
6. LED drive chip according to claim 5 crosses pressure detection method, it is characterised in that further include step:
S1:A detection voltage and a base of the detection voltage input input are judged using the anti-overvoltage detection failed module The size of quasi- voltage;
S2:If the detection voltage continues subsequent step less than the reference voltage;Otherwise judge again the detection voltage with The size of one peak current detection threshold value of the peak current detection threshold value input input, as the detection voltage is less than institute Peak current detection threshold value is stated, the counting of the counting unit resets and return to step S1, otherwise continues subsequent step;
S3:Judge minimum the big of time signal of demagnetizing of a demagnetization signal and the minimum demagnetization time generation unit output It is little;
S4:If less than the minimum demagnetization time signal, the counting of the counting unit adds one to the demagnetization signal, and continues Subsequent step;The counting of otherwise described counting unit resets and return to step S1;
S5:Whether the count value for judging the counting unit is preset value;
S6:If it is, one over-pressed signal of counting unit output;Otherwise return to step S1.
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