CN106535415B - LED drive chip over-voltage detection circuit and method - Google Patents
LED drive chip over-voltage detection circuit and method Download PDFInfo
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- CN106535415B CN106535415B CN201611199913.6A CN201611199913A CN106535415B CN 106535415 B CN106535415 B CN 106535415B CN 201611199913 A CN201611199913 A CN 201611199913A CN 106535415 B CN106535415 B CN 106535415B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
Abstract
The present invention provides a kind of LED drive chip over-voltage detection circuit and method, wherein LED drive chip over-voltage detection circuit includes a detection circuit ontology, further include an anti-overvoltage detection failed module, the anti-overvoltage detection failed module connects the first control signal input terminal of an input control signal, the detection voltage input end of one input detection voltage, the reference voltage input of one input reference voltage and the detection circuit ontology, it is set as after the control signal is received, judge whether the detection voltage is less than the reference voltage, and it enables the detection circuit ontology when the detection voltage is less than the reference voltage and performs overvoltage detection.A kind of LED drive chip over-voltage detection circuit and method of the present invention can effectively avoid LED overvoltages from detecting Problem of Failure, have the advantages that accuracy height and stability are strong.
Description
Technical field
The present invention relates to LED drive chip field more particularly to a kind of LED drive chip over-voltage detection circuit and methods.
Background technology
With the accelerated development of LED illumination industry, energy conservation and environmental protection, it is reliable and stable, of low cost the advantages that become market
On LED and LED driving IC mainstream development directions.Refer to Fig. 1, a kind of LED illumination System of existing topological structure,
In, inductance L, RCS are sampling resistor, and VCS ' is peak current detection voltage, and traditional LED overvoltages detection can solve line electricity
Press VLINEAt trough generate LED overvoltage error detections, over-pressed error detection be due at trough inductance L charging it is limited caused by.
As shown in Fig. 2, over-pressed error detection is usually happened at trough, maximum turn-on time turns off switching power tube MSW, when causing demagnetization
Between reduce, be likely less than the minimum demagnetization time, lead to LED overvoltage error detections, existing LED overvoltages have been detected as solution LED overvoltages
Error detection, then when judging overvoltage detection, each period reaches peak current detection voltage VCS ' in maximum turn-on time
Peak current detection threshold value judges the premise of overvoltage detection as this period, although such LED crosses pressure detection method and can effectively keep away
Exempt from LED overvoltage error detections, but frequent power switch machine debugging or electrification mounted LED lamp are carried out in output no-load or overvoltage
When occur LED light when or not when connecing situation when, output terminal overvoltage, which is settled, to fail to detect in time, causes component damage, subtracts
Few LED light service life.
Please refer to Fig.1, Fig. 3 is existing LED over-voltage detection circuit structure diagrams, including first comparator 11 ', the
One latch 12 ', minimum demagnetization time generate unit 13 ', epidemic situation comparison unit 14 ', maximum turn-on time generate unit 15 ' and
Counting unit 16 '.Wherein, the positive input of first comparator 11 ' meets detection voltage VCS ', and negative input receives peak value electricity
Detection threshold value VREF ' is flowed, the output terminal output comparison result signal IPK of first comparator 11 ' is simultaneously answered with first latch 12 '
Position end is connected；The set end of first latch 12 ' is connected with the first output terminal of counting unit 16 ', receives set signal R ', the
The output terminal of one latch 12 ' is connected with the first input end of counting unit 16 '；The minimum demagnetization time generates the defeated of unit 13 '
Enter end and receive first control signal PGATE, first control signal PGATE ' is the grid letter of the driving tube of power tube MSW grids
Number, level height is consistent with power tube MSW grid levels height, and the minimum demagnetization time generates the output terminal and shape of unit 13 '
Second input terminal of state comparing unit 14 ' is connected, and the first input end of epidemic situation comparison unit 14 ' receives demagnetization signal TD ', the
One output terminal export the first output signal OUT1 ', second output terminal export the second output signal OUT2 ' respectively with counting unit
16 ' the second input terminal, third input terminal are connected；The input terminal that maximum turn-on time generates unit 15 ' receives the first control letter
Number PGATE ', the maximum turn-on time signal TONMAX ' of output terminal output, maximum turn-on time signal TONMAX ' is by one
The inversion signal TONMAXB ' of maximum turn-on time signal TONMAX ' is exported after phase inverter；4th input terminal of counting unit 16 '
Receive inversion signal TONMAXB ' signals, the output terminal output overvoltage signal OVP ' of counting unit 16 '.
The course of work of the LED over-voltage detection circuits is：By in each cycle power tube maximum turn-on time TONMAX ', examine
It surveys voltage VCS ' and reaches the premise that peak current detection threshold value VREF ' carries out follow-up LED output overvoltages detection as this period.If
In a certain Cyclical power pipe maximum turn-on time TONMAX ', detection voltage VCS ' reaches peak current detection threshold value VREF ', produces
The narrow spaces signal of raw comparison result signal IPK=1, while so that maximum turn-on time signal TONMAX '=1 will not be generated,
The narrow spaces signal of comparison result signal IPK=1 causes enabled control signal EN_COUNTB=0, enables control signal ENB_
COUNT=0 enables nor gate, therefore the first output signal OUT1 ' of epidemic situation comparison unit can be transmitted to meter by nor gate
The counter 164 ' of counting unit can also carry out subsequent output overvoltage detection：The minimum demagnetization time generates unit 13 ' and utilizes
First control signal PGATE ' generates a minimum demagnetization time signal TDMIN ', minimum demagnetization after power tube MSW shutdowns
Time signal TDMIN ' and demagnetization signal TD ' is sent into epidemic situation comparison unit 14 ' and is compared together, if comparison result is believed for demagnetization
Number TD '<The narrow spaces letter of minimum demagnetization time signal TDMIN ', then the first output signal OUT1 '=0 of epidemic situation comparison unit output
Number and second output signal OUT2 '=1, the narrow spaces signal of the first output signal OUT1 '=0 is in enabled control signal ENB_
It is transmitted in the case of COUNT=0 by nor gate into counter 164 ', counter 164 ', which counts, adds one；If comparison result is moves back
Magnetic signal TD '>Minimum demagnetization time signal TDMIN ', then epidemic situation comparison unit 14 ' export the first output signal OUT '=1 and the
The narrow spaces signal of two output signal OUT2 '=0, the narrow spaces signal of the second output signal OUT '=2 are generated by NAND gate
On the one hand the narrow spaces signal of set signal R '=1 resets counter 164 ', on the other hand by enabled control signal ENB_
COUNT is set to height, therefore the first output signal OUT1 ' can not be transmitted to counter 164 ' by nor gate, enables control signal
ENB_COUNT=1 causes clock signal clk '=0.If in a certain Cyclical power pipe maximum turn-on time TONMAX ', detection electricity
Pressure VCS ' is unable to reach peak current detection threshold value VREF ', therefore can not generate the narrow spaces letter of comparison result signal IPK=1
Number, but maximum turn-on time signal TONMAX '=1 can be generated simultaneously, therefore maximum turn-on time signal TONMAX '=1 causes
Set signal R '=1, counter 164 ' are reset, while set signal R '=1 controls signal ENB_COUNT=1 so that enabling, because
This first output signal OUT1 ' can not be transmitted to counter 164 ', clock signal clk by nor gate '=0, therefore this period
It is interior to be detected without subsequent output overvoltage.Demagnetization signal of the subsequent overvoltage detection in addition to including in each cycle to detecting
TD ' and minimum demagnetization time signal TDMIN ' is compared and this period counts counter 164 ' and adds outside one or clearing, also
Add one including continuous three cycle count of counter 164 ', then generate over-pressed signal OVP '=1.
The circuit can exclude input line voltage VLINELED overvoltage error detection situations during close to output voltage, such as
Low line voltage input, high LED output voltages or power cutoff moment, input line voltage VLINEIt is reduced to close to LED output voltages
VLEDSeveral situations.Available circuit highly effective can avoid above-mentioned LED overvoltages error detection, but in certain special circumstances, such as
It carries out or not when connecing when frequently switching on machine debugging or the LED light occurred when charging mounted LED lamp when output no-load or overvoltage
During situation, both special circumstances can cause existing LED over-voltage detection circuits that overvoltage detection failure of removal occurs, and please refer to Fig. 4
Existing LED illumination System LED overvoltage detection failure analysis figures when in output no-load or overvoltage frequently switch on machine debugging.
Existing LED crosses pressure detection method, and by each period, the peak current detection voltage VCS ' in maximum turn-on time can reach peak value
Current detection threshold VREF ' judges the premise of overvoltage detection as this period, peak value in even a certain period maximum turn-on time
Current detection voltage VCS ' can reach peak current detection threshold value VREF ', just without subsequently sentencing to LED detections in this period
It is disconnected.The normal work line voltage V of existing LED information display systemLINEThe output voltage V of waveform and normal workLEDVoltage waveform respectively such as
It is bent in Fig. 4 shown in the dotted line a and straight dotted line b in lower section, with line voltage V during normal workLINEIntersecting dotted line c is overvoltage protection threshold
Value VOVP ignores output voltage V at this timeLEDRipple carries out frequent switching on and shutting down debugging, then practical input to power switch
It is shown in solid in line voltage waveform d and practical output LED voltage waveform e such as Fig. 4, in power supply gap input line voltage VLINE
Voltage declines, the input line voltage V at power supply connectionLINERise, if output voltage V at this timeLEDIt is unloaded, then after chip starts
Output voltage VLEDVoltage rises always, starts output voltage V in certainLEDVoltage has been sufficiently close to line voltage VLINE, need
It should be noted that output voltage V hereinLEDThere is no reach overvoltage protection threshold VOVP, then at this time due to output voltage
VLEDIt is sufficiently close to input line voltage VLINE, therefore inductive current rising is very slow, in chip maximum turn-on time TONMAX '
Interior current peak detection voltage VCS ' does not reach current peak detection threshold value VREF ', therefore without follow-up within this period
Output overvoltage detection, the voltage of output terminal the more fills the more high due to open circuit after several periods, if just output terminal electricity
Before pressure reaches overvoltage protection threshold VOVP, line voltage VLINEAll it is sufficiently close to output voltage VLED, then each period later
Current peak detection voltage VCS ' is unable to reach current peak detection threshold value VREF ' in maximum turn-on time, so that
Judge in each period without subsequent overvoltage detection, output voltage VLEDIt can be with input line voltage VLINEIt increases and rises
Height, and two voltages are always maintained at the state being sufficiently close to, final output voltage VLEDCan be more than LED overvoltage protection threshold VOVP, it
Afterwards still due to output voltage VLEDIt is sufficiently close to input line voltage VLEDAnd so that each period can be in maximum turn-on time
Current peak detection voltage VCS ' is unable to reach current peak detection threshold value VREF ', so as to without subsequent in each period
Overvoltage detection judges, therefore LED output terminals very likely carry out frequently switching on machine in the case of this output open circuit or overvoltage
LED overvoltages detection failure occurs for debugging, causes component damage.
It please refers to Fig.1, Fig. 5, when wherein Fig. 5 is the LED light that existing LED illumination System occurs when charging mounted LED lamp
LED overvoltages detect failure analysis figure when or not situation when connecing.Existing LED cross pressure detection method by each period maximum be connected when
Before interior peak current detection voltage VCS ' can reach peak current detection threshold value VREF ' as the judgement overvoltage detection of this period
It carrying, peak current detection voltage VCS ' can reach peak current detection threshold value VREF ' in even a certain period maximum turn-on time,
Just without the judgement subsequently to LED detections in this period.Line voltage VLINEWith output voltage V during installation lampLEDIt is respectively real
Shown in line f and solid line g, dotted line h be LED overvoltage protection threshold VOVP, dotted line i be work normally when output voltage VLED.
Output voltage V is assumed in one power frequency periodLEDVoltage during for normal work, it is assumed that when lamp being backed out or installed near trough
When being in contact undesirable process, back out lamp or the primary touching of lamp process is installed exported actually for LED information display system may
The process that repeatedly access LED and LED is disconnected occurs, then after LED is disconnected for the first time, output voltage VLEDIt can rise, if at this time
Just at trough, it is possible to so that input line voltage VLINETrough is sufficiently close to output voltage, and output voltage does not have at this time
Reach overvoltage protection threshold VOVP, then this period without overvoltage detect, LED is accessed again later, this be one very
Of short duration access procedure, LED output voltages VLEDIt is fallen after rise, if output voltage VLEDStill very close to input line voltage after falling
VLINE, equally detected in this period without overvoltage, if during several times repeatedly, lucky LED voltage was below always
Press rotection thresholds VOVP, and output voltage VLEDIt is sufficiently close to input line voltage VLINE, then each period is in maximum turn-on time
Interior peak current detection voltage VCS ' is unable to reach peak current detection threshold value VREF ', thus in each period without
Subsequent overvoltage detection judges, until output voltage VLEDMore than overvoltage protection threshold VOVP, later still due to output voltage
VLEDIt is sufficiently close to input line voltage VLINEAnd cause current peak detection voltage VCS ' in maximum turn-on time of each period
Current peak detection threshold value VREF ' is unable to reach, so as to judge, therefore LED without overvoltage detection subsequent in each period
Output terminal very likely backs out lamp or installation lamp generation LED overvoltage detection failures in the case that this, causes component damage.
Above-mentioned two situations illustrate existing at present for LED overvoltages detection side obtained from solving LED overvoltage error detections
It, cannot be timely for true output overvoltage failure in certain special circumstances although method effectively avoids over-pressed error detection
Detection brings the shortcomings that LED overvoltages detection is failed under certain specific conditions.
For the existing LED over-voltage detection circuits for having and avoiding LED overvoltage flase drop brakes, how to avoid LED over-pressed
Detection failure, improves LED and crosses pressure detection method, is allowed to more efficient, accurate, safety, becomes those skilled in the art and urgently solve
Certainly the problem of.
Invention content
Deficiency in for the above-mentioned prior art, the present invention provide a kind of LED drive chip over-voltage detection circuit and method,
LED overvoltages detection Problem of Failure can be effectively prevented from, has the advantages that accuracy height and stability are strong.
To achieve these goals, the present invention provides a kind of LED drive chip over-voltage detection circuit, including a detection circuit
Ontology, further includes an anti-overvoltage detection failed module, and the anti-overvoltage detection failed module connects the of an input control signal
The reference voltage input for detecting voltage input end, an input reference voltage of one control signal input, an input detection voltage
End and the detection circuit ontology are set as after the control signal is received, and judge whether the detection voltage is less than
The reference voltage, and enable the detection circuit ontology when the detection voltage is less than the reference voltage and perform overvoltage inspection
It surveys.
Preferably, the detection circuit ontology includes：
One first comparator, the one detection voltage input end of normal phase input end connection of the first comparator, described first
The inverting input of comparator connects a peak current detection threshold value input；
One first latch, the first input end of first latch connect the output terminal of the first comparator；
One minimum demagnetization time generated unit, and the minimum demagnetization time generates one first control of input terminal connection of unit
Signal input part；
One condition adjudgement unit, the first input end of the condition adjudgement unit connects a demagnetization signal input terminal, described
The second input terminal connection minimum demagnetization time of condition adjudgement unit generates the output terminal of unit；
One maximum turn-on time generates unit, and the maximum turn-on time generates input terminal connection first control of unit
Signal input part processed, the maximum demagnetization time generate the output terminal connection anti-overvoltage detection failed module of unit；And
One counting unit, the first input end of the counting unit connect the output terminal of first latch；The meter
Second input terminal of counting unit connects the first output terminal of the condition adjudgement unit；The third input terminal of the counting unit connects
Connect the second output terminal of the condition adjudgement unit, the first output terminal of the counting unit connects the of first latch
Two input terminals, the second output terminal of the counting unit is as over-pressed signal output end.
Preferably, the counting unit includes：
One first nor gate, the first input end of first nor gate connect the first input end of the counting unit,
Second input terminal of first nor gate connects the 4th input terminal of the counting unit；
One second nor gate, the first input end of second nor gate connect the output terminal of first nor gate, institute
The second input terminal for stating the second nor gate connects the second input terminal of the counting unit；
One first NAND gate, the first input end of the NAND gate connects the third input terminal of the counting unit, described
Second input terminal of NAND gate connects the 5th input terminal of the counting unit, described in the output terminal connection of first NAND gate
First output terminal of counting unit；And
One counter, the first input end of the counter connect the output terminal of second nor gate, the counter
The second input terminal connect the output terminal of first NAND gate, the output terminal of the counter connects the of the counting unit
Two output terminals.
Preferably, the anti-overvoltage detection failed module includes：
One fixed pulse width generates unit, and the input terminal connection first control signal that the fixed pulse width generates unit is defeated
Enter end；
One second comparator, the normal phase input end of second comparator connect the detection voltage input end, and described the
The inverting input of two comparators connects a reference voltage input；
One second latch, the first input end of second latch connect the output that the fixed pulse width generates unit
End, the second input terminal of second latch connect the output terminal of second comparator, the output of second latch
End connects the 4th input terminal of the counting unit；
One phase inverter, the input terminal of the phase inverter connect the output terminal of second latch；And
One second NAND gate, the first input end connection maximum turn-on time of second NAND gate generate unit
Output terminal, the second input terminal of second NAND gate connect the output terminal of the phase inverter, the output of second NAND gate
End connects the 5th input terminal of the computing unit.
A kind of LED drive chip of the present invention crosses pressure detection method, including step：It is driven using LED of the present invention
Chip over-voltage detection circuit carries out a LED drive chip over-pressed detection.
Preferably, further comprise step：
S1：Using it is described it is anti-overvoltage detection failed module judge it is described detection voltage input end input one detection voltage and
The size of one reference voltage；
S2：If the detection voltage is less than the reference voltage and continues subsequent step；Otherwise the detection electricity is judged again
The size of pressure and a peak current detection threshold value of peak current detection threshold value input input, such as described detection voltage are small
In the peak current detection threshold value, the counting of the counting unit is reset and return to step S1, otherwise continues subsequent step；
S3：Judge that a demagnetization signal and the minimum demagnetization time generate the minimum demagnetization time signal that unit exports
Size；
S4:If the demagnetization signal is less than the minimum time signal of demagnetizing, the counting of the counting unit adds one, and
Continue subsequent step；Otherwise the counting of the counting unit resets simultaneously return to step S1；
S5：Whether the count value for judging the counting unit is preset value；
S6：If so, one over-pressed signal of counting unit output；Otherwise return to step S1.
The present invention is by adding anti-overvoltage detection failed module so that detection circuit ontology in detection voltage in addition to being less than peak
It is outer that overvoltage detection is performed when being worth current detection threshold, over-pressed detection is similarly performed when detecting voltage and being less than reference voltage, gram
True output overvoltage failure cannot be detected in certain special circumstances to cause over-pressed inspection in time by having taken the prior art
The defects of dendrometry is imitated, perfect LED cross pressure detection method, be allowed to more efficiently, accurate, safety.
Description of the drawings
Fig. 1 is the non-isolated topological structure circuit diagram of existing LED illumination System；
Fig. 2 is existing over-pressed detection waveform figure；
Fig. 3 is the structure diagram of existing LED over-voltage detection circuits；
Fig. 4 carries out LED mistakes when frequent power switch machine is debugged in output no-load or overvoltage for existing LED illumination System
Pressure detection failure analysis figure
LED mistakes when Fig. 5 or not situation when being connect when being the LED light that existing LED illumination System occurs when charging mounted LED lamp
Pressure detection failure analysis figure；
Fig. 6 is the structure diagram of the LED drive chip over-voltage detection circuit of the embodiment of the present invention；
Fig. 7 is that the LED drive chip over-voltage detection circuit of the embodiment of the present invention detects work when voltage is less than reference voltage
Make comparison of wave shape figure；
Fig. 8 is that the LED drive chip over-voltage detection circuit of the embodiment of the present invention detects voltage more than reference voltage but is less than
Work wave comparison diagram during current peak detection threshold value；
Fig. 9 is that the LED drive chip over-voltage detection circuit of the embodiment of the present invention detects voltage more than current peak detection threshold
Work wave comparison diagram during value；
Figure 10 is that input line voltage is exported with output voltage difference in preset range in the embodiment of the present invention
The schematic diagram of overvoltage detection；
Figure 11 is that output voltage when opening a way suddenly at input line voltage trough in the embodiment of the present invention protects waveform；
Figure 12 is the LED drive chip overvoltage detection method flow chart of the embodiment of the present invention.
Specific embodiment
Below according to attached drawing 6-12, presently preferred embodiments of the present invention is provided, and be described in detail, make to be better understood when
Function, the feature of the present invention.
Referring to Fig. 6, a kind of LED drive chip over-voltage detection circuit of the present invention, for whether detecting the LED in Fig. 1
Overvoltage, including anti-overvoltage detection (the thick line dashed box of failed module 2 of a detection circuit ontology 1 (part other than thick line dashed box) and one
Interior part), anti-overvoltage detection 2 connection detection circuit ontology 1 of failed module, for preventing LED overvoltages detection failure.
Wherein, detection circuit ontology 1 includes：The minimum demagnetization time production of one first comparator 11, one first latch 12, one
The maximum turn-on time of raw unit 13, a condition adjudgement unit 14, one generates 15 and one counting unit 16 of unit.First comparator 11
One detection voltage input end of normal phase input end connection, receive a detection voltage VCS, the inverting input of first comparator 11 connects
A peak current detection threshold value input is connect, receives a peak current detection threshold value VREF.First input of the first latch 12
The output terminal of end connection first comparator 11, receives one first comparison signal IPK1.The minimum demagnetization time generates the defeated of unit 13
Enter one first control signal input terminal of end connection, receive first control signal PGATE.The first input end of condition adjudgement unit 14
A demagnetization signal input terminal is connected, receives a demagnetization signal TD, the minimum demagnetization of the second input terminal connection of condition adjudgement unit 14
Time generates the output terminal of unit 13, receives a minimum demagnetization time signal TDMIN.Maximum turn-on time generates the defeated of unit 15
Enter end connection first control signal input terminal, receive first control signal PGATE, maximum turn-on time generates the output of unit 15
One maximum turn-on time signal TONMAX of end output.The first input end of counting unit 16 connects the output of the first latch 12
End receives one first enabled control signal EN1_COUNT；Second input terminal connection status judging unit 14 of counting unit 16
First output terminal receives one first output signal OUT1；The third input terminal connection status judging unit 14 of counting unit 16
Second output terminal, receives one second output signal OUT2, and the first output terminal of counting unit 16 connects the of the first latch 12
Two input terminals, the second output terminal of counting unit 16 is as over-pressed signal output end, output overvoltage signal OVP.
Further, counting unit 16 includes：One first nor gate 161, one second nor gate 162, one first NAND gate
163 and a counter 164.The first input end of the first input end connection count unit 16 of first nor gate 161 receives first
Enabled control signal EN1_COUNT, the 4th input terminal of the second input terminal connection count unit 16 of the first nor gate 161 connect
Receive one second enabled control signal EN2_COUNT.The first input end of second nor gate 162 connects the defeated of the first nor gate 161
Outlet receives third and enables control signal ENB_COUNT, when this signal is 0, represents that the first output signal OUT1 is allowed to be transmitted to
Counter 164.Second input terminal of the second input terminal connection count unit 16 of the second nor gate 162 receives the first output letter
Number OUT1.The third input terminal of the first input end connection count unit 16 of first NAND gate 163 receives the second output signal
OUT2, the 5th input terminal of the second input terminal connection count unit 16 of the first NAND gate 163 receive maximum turn-on time signal
The inversion signal TONMAXB of TONMAX, the first output terminal of the output terminal connection count unit 16 of the first NAND gate 163, output
One set signal R.The first input end of counter 164 connects the output terminal of the second nor gate 162, receives a clock signal clk,
Second input terminal of counter 164 connects the output terminal of the first NAND gate 163, receives set signal R, the output of counter 164
Hold the second output terminal of connection count unit 16, output overvoltage signal OVP.
In the present embodiment, anti-overvoltage detection failed module 2 includes：One fixed pulse width generates unit 21, one second comparator
22nd, one second latch 23, a phase inverter 24 and one second NAND gate 25.Fixed pulse width generates the input terminal connection the of unit 21
One control signal input receives first control signal PGATE.The normal phase input end connecting detection voltage of second comparator 22 is defeated
Enter end, receive detection voltage VCS, the inverting input of the second comparator 22 connects a reference voltage input, receives a benchmark
Voltage VCSTH.The first input end connection fixed pulse width of second latch 23 generates the output terminal of unit 21, receives a resetting letter
Number RESET, the second input terminal of the second latch 23 connect the output terminal of the second comparator 22, receive one second comparison signal
IPK2, the 4th input terminal of the output terminal connection count unit 16 of the second latch 23, the enabled control signal EN2_ of output second
COUNT.The input terminal of phase inverter 24 connects the output terminal of the second latch 23.The first input end connection of second NAND gate 25 is most
Big turn-on time generates the output terminal of unit 15, receives maximum turn-on time signal TONMAX, and the second of the second NAND gate 25 is defeated
Enter the output terminal of end connection phase inverter 24, the 5th input terminal of the output terminal connection computing unit of the second NAND gate 25, output is most
The inversion signal TONMAXB of big turn-on time signal TONMAX.
Reset signal RESET signal is to have certain pulsewidth using what first control signal PGATE rising edge signals generated
Second enabled control signal EN2_COUNT is reset to 1, within the TON times, if the second comparison signal by the high level signal of TON
IPK2 becomes high, that is, detects voltage VCS and exceed reference voltage V CSTH, then the second enabled control signal EN2_COUNT is set
It is 0, this result will be always maintained in this cycle T OFF time, and the second enabled control signal EN2_COUNT is for 0 simultaneously so that anti-
The output terminal of phase device 24 is 1, that is, the second NAND gate 25 is allowed to export the inversion signal TONMAXB of maximum turn-on time signal, this
When, if within the TON times, the first comparison signal IPK1 becomes high, that is, detects voltage VCS and reach peak current detection threshold value
VREF, then maximum turn-on time signal TONMAX is always 0 within the TON times, therefore TONMAXB is 1, allows the second output
Signal OUT2 is transmitted to counter 164, and at this time since the first comparison signal IPK1 is 1, third enables control signal
ENB_COUNT is 0 and can be always maintained in this cycle T OFF time, therefore can make the first output signal OUT1 in the TOFF times
Counter 164 is transmitted to, detection voltage VCS reaches meeting switch-off power pipe MSW after peak current detection threshold value VREF, and inductance opens L
Begin demagnetization, detection demagnetization signal TD and minimum demagnetization time signal TDMIN sizes, if demagnetization signal TD>Minimum demagnetization time letter
Number TDMIN, then the first output signal OUT1 remain 1, the second output signal OUT2 becomes 0 from 1, at this time clock signal clk end
0 is remained, set signal R is 1 from 0, therefore counter 164 is reset；If demagnetization signal TD<Minimum demagnetization time signal TDMIN,
Then the first output signal OUT1 becomes 0 from 1, and the second output signal OUT2 remains 1, and clock signal clk end becomes 1 from 0 at this time,
Set signal R remains 0, continuously demagnetization signal TD three times<Minimum demagnetization time signal TDMIN, 164 output terminal of counter generate
Over-pressed signal OVP=1.If in maximum turn-on time, the first comparison signal IPK1 is low always, that is, detects voltage VCS most
Peak current detection threshold value VREF is not reached in big turn-on time, then maximum turn-on time signal TONMAX is led in power tube
Become high level after logical maximum turn-on time, this signal again turns off power tube, and maximum turn-on time signal TONMAX becomes at once
It is 0, if the first comparison signal IPK1=0, the second comparison signal IPK2=1 has reference voltage in maximum turn-on time
VCSTH<Detect voltage VCS<Peak current detection threshold value VREF, then no matter the first enabled control signal EN1_COUNT for 0 or
1, maximum turn-on time signal TONMAX=1 can cause set signal R=1, and counter 164 is zeroed out.Meet inspection
Voltage VCS is surveyed in reference voltage V CSTH<Detect voltage VCS<During peak current detection threshold value VREF ranges, not to this period into
Row overvoltage detection judges, and is detecting voltage VCS<During reference voltage V CSTH, to this, the period carries out over-pressed detection, avoids overvoltage
Detection failure.
Fig. 6, Fig. 7 are please referred to, as detection voltage VCS<During reference voltage V CSTH, it is believed that the first enabled control signal EN1_
Initial values of the COUNT before this period arrives is 0, and it may be that detection voltage VCS reaches peak point current inspection to illustrate previous cycle
Survey threshold value VREF values and demagnetization signal TD>Minimum demagnetization time signal TDMIN may previous cycle reference voltage V CSTH<
Detect voltage VCS<Peak current detection threshold value VREF, it is also possible to previous cycle detection voltage VCS<Reference voltage V CSTH, first
Enabled control signal EN1_COUNT keeps the result of the last fortnight phase.Assuming that the initial value of the first enabled control signal EN1_COUNT
It is 0, may also is actually 1, if initial value is 1, it may be that detection voltage VCS reaches peak current detection threshold to illustrate previous cycle
Value VREF and demagnetization signal TD<Minimum demagnetization time signal TDMIN may previous cycle detection signal VCS<Reference voltage
VCSTH, the first enabled control signal EN1_COUNT keep the result of the last fortnight phase.No matter the first enabled control signal EN1_
COUNT is 0 or 1, if there is detection voltage VCS in this period<Reference voltage V CSTH then second enables control signal EN2_COUNT
It is 1, therefore it is 0 that this period third, which enables control signal ENB_COUNT, and the first output signal OUT1 signals is allowed to be transmitted to counting
Device 164.
Fig. 6, Fig. 8 are please referred to, as reference voltage V CSTH<Detect voltage VCS<During peak current detection threshold value VREF, it is believed that
Initial values of the first enabled control signal EN1_COUNT before this period arrives is 0, practical first enabled control signal EN1_
The initial value of COUNT may be 0, it is also possible to be 1.Acquiescence is 0 by initial value, but no matter the first enabled control signal EN1_
It is still 1 that the initial value of COUNT, which is 0, this period is bound to generate maximum turn-on time signal TONMAX=1, by set signal R
Become 1, thus this period without counting, and counter 164 is reset, therefore the first enabled control signal EN1_COUNT
After initial value does not influence whether this period is counted, and this period set signal R signal becomes 1, by the first enabled control
Signal EN1_COUNT is set to 0, occurs detection voltage VCS next periods<Reference voltage V CSTH, reference voltage V CSTH<Detection
Voltage VCS<Peak current detection threshold value VREF and detection voltage VCS>The situation of peak current detection threshold value VREF will not all be sent out
The situation of raw miscount.
Fig. 6, Fig. 9 are please referred to, as detection voltage VCS>The situation of peak current detection threshold value VREF, the first comparison signal
First enabled control signal EN1_COUNT is reset to 1 by IPK1=1 before the TOFF times arrive, at this time reset signal RESET
So that second enables control signal EN2_COUNT=0, so third enables control signal ENB_COUNT=0.If TOFF
There is demagnetization signal TD in time<Minimum demagnetization time signal TDMIN, then have the first output signal OUT1 to become 0 from 1, second is defeated
Go out signal OUT2 and remain 1, it is fast to notice that the second output signal OUT2 is transmitted than the first output signal OUT1, therefore the second output letter
Number OUT2=1 signals make set signal R signal remain 0, at this time the inversion signal of maximum turn-on time signal TONMAX
TONMAXB=1, the first output signal OUT1 signals become 0 from 1 later, therefore clock signal clk becomes 1 from 0, counter 164
Count is incremented；If there is demagnetization signal TD in the TOFF times>Minimum demagnetization time signal TDMIN, then have the first output signal OUT1 guarantors
It is 1 to hold, and the second output signal OUT2 becomes 0 from 1, therefore set signal R becomes 1 from 0, and clock signal clk remains 0, counts
Device 164 is reset.
A kind of reference voltage V CSTH setting principles of LED drive chip over-voltage detection circuit of the present invention are as follows：
The effect of anti-overvoltage detection failed module 2 is to ensure that each period will detect voltage VCS>Peak current detection threshold value
VREF or detection voltage VCS<Reference voltage V CSTH prevents LED over-pressed as the premise for carrying out follow-up overvoltage detection in this period
Detection failure.
Reference voltage V CSTH is a smaller relatively threshold value, and reference voltage V CSTH is less than peak value to be manually set
Current detection threshold VREF, reference voltage V CSTH setting value will consider peak point current sampling resistor Rcs, electricity in peripheral circuit
Feel L, power tube conduction voltage drop VSW, input line voltage and output voltage difference and peak current detection threshold value VREF trade off to set
It is fixed.
If a certain periodical input line voltage VLINEIt is sufficiently close to output voltage VLED, then one it is scheduled on chip maximum turn-on time
In TONMAX, detection voltage VCS does not reach peak current detection threshold value VREF, it is assumed that this cycle detection voltage VCS just reaches
To reference voltage V CSTH, and inductive current is I at this timeCSTH, input line voltage and output voltage at this time are respectively VLINEWith
VLED, then had according to formula of the BUCK circuits in power tube turn-on time：
(VLINE-VLED-Vsw) TONMAX=ICSTH·L (1)
VCSTH=ICSTH·Rcs (2)
It can be obtained according to formula (1) and (2)：
The difference V of reference voltage V CSTH and line voltage and output voltage as can be seen from the above equationLINE-VLEDBetween relationship,
V at this timeLINE-VLEDOutput voltage when input line voltage trough is at least than normal work when on the one hand representing normal work
Value is higher by VLINE-VLEDBecause if actually enter line voltage trough is less than V than the value that normal output voltage is higher byLINE-VLED, then
Over-pressed detection can be carried out, but since induction charging deficiency leads to demagnetize time TD continuously several times less than the minimum demagnetization time in trough
TDMIN, therefore overvoltage detection false triggering can be generated；When on the other hand also representing present invention solution detection failure, when output electricity
Pressure becomes closer to input line voltage, and both input line voltage and output voltage difference are less than VLINE-VLEDWhen, but can carry out
Subsequent overvoltage detection in each period.Once output voltage, which is increased to close to input line voltage, causes maximum turn-on time
There is reference voltage V CSTH in TONMAX<Detect voltage VCS<Peak current detection threshold value VREF, then meeting this condition, this is several
A period is detected without subsequent LED output overvoltages, but since input line voltage frequency is 100Hz, and output voltage frequency
For tens kHz even biggers, when output no-load or overvoltage, output voltage increase ratio input line voltage rises fast very much, and process is several
A period output voltage will be risen to so that detecting voltage VCS<Reference voltage V CSTH can carry out output overvoltage inspection at this time
It surveys.
If when output no-load or overvoltage, output voltage increase ratio input line voltage is many soon, is exported by several periods
The value of voltage, which can rise to, makes detection voltage VCS<Reference voltage V CSTH, you can be sufficiently close to input electricity in output voltage
Continue LED overvoltages detection in the case of pressure, but in view of several periods of over-pressed detection can not be carried out when maximum is connected
Between have reference voltage V CSTH in TONMAX<Detect voltage VCS<Peak current detection threshold value VREF, the output electricity in these periods
Pressure is risen to so that detecting voltage VCS<Reference voltage V CSTH could be protected.
Figure 10 is input line voltage V in the present inventionLINEWith output voltage VLEDDifference in the case that more than V1 or less than V2 into
Row output overvoltage detects schematic diagram, wherein, VLINE1For than input line voltage VLINEThe voltage value of low V1, VLINE2For than input line electricity
Press VLINEThe voltage value of low V2, as output voltage VLED<VLINE1When so that detection voltage VCS energy in maximum turn-on time TONMAX
Reach peak current detection threshold value VREF, output voltage VLED=VLINE1When, just so that detection voltage VCS is when maximum is connected
Between TONMAX reach peak current detection threshold value VREF, when output voltage enters VLINE2<VLED<VLINE1During range so that most
There is reference voltage V CSTH in big turn-on time TONMAX<Detect voltage VCS<Peak current detection threshold value VREF, works as output voltage
VLEDInto VLINE2<VLED<VLINEDuring range so that have detection voltage VCS in maximum turn-on time TONMAX<Reference voltage
VCSTH is set at V to be ensured for reference voltage V CSTH valuesLINE2-VLINE1Voltage is not too big, at least ensures output
The pressure voltage of end member device is more than V than the value that overvoltage protection threshold VOVP voltages are higher byLINE2-VLINE1.When ignoring two kinds of situations
Power tube conduction voltage drop difference, RCSEquivalent series resistance on ohmically pressure drop and inductance L, has according to above-mentioned analysis：
If have just so that detection voltage VCS rises to reference voltage V CSTH in maximum turn-on time TONMAX：
(V2-Vsw) TONMAX=ICSTH·L (5)
VCSTH=ICSTH·Rcs (2)
Wherein ICSTHInductor current value during reference voltage V CSTH is risen to for detection voltage VCS voltage, VSW is power
Pipe conduction voltage drop, V2 are V2 voltages shown in Fig. 6.
If just so that detection voltage VCS voltage rises to peak current detection threshold value in maximum turn-on time TONMAX
VREF then has：
(V1-Vsw) TONMAX=Ipk·L (6)
VREF=IPK·Rcs (7)
Wherein IPKInductor current value during peak current detection threshold value VREF is risen to for detection voltage VCS, VSW is power
Pipe conduction voltage drop, V2 are V2 voltages shown in Fig. 6.
Had according to formula (5) and (2)：
Had according to formula (6) and (7)：
From formula (8) and (9) as can be seen that the ratio of peak current detection threshold value VREF and reference voltage V CSTH is (V1-
VSW) and (V2-VSW) ratio, it is assumed that VREF=500mV, V2=5V, VSW=2.5V, if VCSTH=50mV, then there is V1=
22.5V, if VCSTH=100mV, then V1=10V, theoretical calculation have ignored the equivalent series resistance pressure drop of inductance, RCSResistance
V when pressure drop and two kinds of situationsSWDifference, actually electric current are ICSTHWhen, VSWIt is smaller, actual conditions VREF and reference voltage
VCSTH ratios should be：
Wherein VSW1、VSW2Respectively inductive current is IPK、ICSTHFlow through the voltage of power tube conducting resistance RON generations, VSW1
>VSW2, VLESR1、VLESR2Respectively inductive current is IPK、ICSTHFlow through the voltage that the series parasitic resistance of inductance L generates, VLESR1>
VLESR2, VCS1、VCS2Respectively inductive current is IPK、ICSTHFlow through peak point current sampling resistor RCSVoltage, VCS1>VCS2。
Therefore it in rolling over consideration when reference voltage V CSTH is set, if setting larger, was easily exported at trough
Detection is held up, therefore, the maximum value of reference voltage V CSTH scopes of design will compare output voltage according to practical application line voltage trough
At least be higher by and how much set, if reference voltage V CSTH set it is smaller, then still have the possibility of output overvoltage detection failure,
Therefore above-mentioned analysis is combined according to concrete application peripheral circuit parameter and chip interior peak current detection threshold value VREF, power tube
Conducting resistance RON etc. and input and output voltage situation are set.Therefore defining the condition of reference voltage V CSTH maximum values is
The value at least being had more using neutral voltage trough than output voltage, it is ensured that detect voltage VCS in application scheme at this time>=benchmark
Voltage VCSTH；The condition for defining reference voltage V CSTH minimum values can be allowed in reference voltage V CSTH<Detect voltage VCS<
During peak current detection threshold value VREF, output terminal is more than overvoltage protection threshold VOVP, at least ensures the pressure resistance of output terminal component
Value is higher by this value than overvoltage protection threshold VOVP voltages.
Such as actually inductance is 3mH to the present invention in certain application, chip maximum turn-on time TONMAX is 40us, is used
When resistance RCS is 1.5 Ω, when V2 is 5-7V, when reference voltage V CSTH is 50mV, i.e., over-pressed flase drop will not occur at trough
It surveys, and VLINE2-VLINE1Only several volts, even lucky reference voltage V CSTH<Detect voltage VCS<Peak current detection threshold value
During VREF, output terminal is more than the value of overvoltage protection threshold VOVP, also only can be more than several volts, later by several cycle detection voltages
VCS<Reference voltage V CSTH, is put into overvoltage protection, and output voltage will not rise again.
Figure 11 is referred to, in input line voltage VLINE(V at this time near troughLINE<VOVP), output voltage V at this timeLEDDo not have also
Have and reach overvoltage protection threshold VOVP, output voltage VLEDInput line voltage V has been sufficiently close to when rising to V1LINE, can also connect
It is continuous to generate detection voltage VCS three times<Reference voltage V CSTH situations can generate overvoltage detection signal at this time, into overvoltage protection,
Power tube is turned off, output voltage V after power tube shutdownLEDIt is likely to decrease, restarts again after a period of time, at this time
Line voltage may have built up so that can be worked normally after restarting a period of time, output end voltage VLEDIt can be further
Raising, if output end voltage VLEDAfter raising, and cause VLEDIt is sufficiently close to input line voltage VLINE, VLEDVoltage rises to V2
When, then overvoltage protection state is again gone into, repeatedly the above process, VLEDWhen voltage rises to V3, V4, until output terminal electricity
Press VLEDOvervoltage protection threshold VOVP is risen to, enters LED overvoltage protection states after generating LED output overvoltage signals such as chip,
It is every due to that can be varied from chip overvoltage shutdown line voltage this period during through reopening again after a period of time
It is possible that following three kinds of situations after once restarting：
(1) voltage VCS is detected three times<Reference voltage V CSTH, then result detects signal OVP=1 to generate LED overvoltages,
Output LED does not rise substantially；
(2) voltage VCS is detected three times>Peak current detection threshold value VREF, then due to VLEDHave reached overvoltage protection threshold
Value VOVP, therefore can continuously judge demagnetization signal TD three times<Minimum demagnetization time signal TDMIN, result are basic for output LED
Do not rise or ascensional range is very small, ascensional range is to demagnetize energy being accumulated in output capacitance three times；
(3) reference voltage V CSTH<Detect voltage VCS<Peak current detection threshold value VREF does not continue to carry out in this period
The LED overvoltages detection of next step judges that above-mentioned analysis is mentioned when detection voltage VCS is in reference voltage V CSTH<Detect voltage VCS<
When peak current detection threshold value VREF changes, controlled according to the amplitude risen in invention content about this state output voltage one
Determine in range, this state can be jumped into quickly in (1) or (2) state.
Output voltage VLED" hiccup " pattern can be kept at overvoltage protection threshold VOVP, in restarting repetition each time
Process is stated, until output voltage VLEDIt will not continue to rise or can only rise to than overvoltage after reaching overvoltage protection threshold VOVP
The high a certain amount of allowed band voltage of rotection thresholds VOVP voltages is (when output reaches overvoltage protection threshold VOVP, just at inspection
Voltage VCS is surveyed in reference voltage V CSTH<Detect voltage VCS<The situation of peak current detection threshold value VREF), export component
Pressure voltage is usually higher by some allowances than overvoltage protection threshold VOVP, therefore the work of overvoltage protection is played to output terminal component
With.
Whether a kind of LED drive chip over-voltage detection circuit of the present invention carries out the judgement item of over-pressed detection in a certain period
Part sequence is followed successively by：1st, judge to detect voltage VCS and whether reach reference voltage V CSTH, 2, judge whether detection voltage VCS reaches
Peak current detection threshold value VREF.Since these judge whether that the condition of detection is all happened at the positive pulse width of RESET signal
In TON, and whether over-pressed detection, i.e. demagnetization signal TD and minimum demagnetization time signal TDMIN sizes to be carried out for this period
Comparison be to be happened in the negative pulse width TOFF times of RESET signal, as long as therefore whether are carried out overvoltage this period
The judging result of detection is generated before TOFF arrivals and is kept in the TOFF times, and whether detection voltage VCS reaches benchmark
Voltage VCSTH and peak current detection threshold value VREF were happened in the TON times, as long as therefore will determine that result is protected in TOFF
It holds, therefore the sequence of Rule of judgment 1 and 2 of the present invention for whether carrying out over-pressed detection in this period can overturn,
It can judge simultaneously, but really since detection voltage VCS is begun to ramp up within the TON times from 0, be bound to first reach benchmark electricity
Press VCSTH, therefore whether the present invention to detection voltage VCS first reach reference voltage V CSTH and judge.
Fig. 6, Figure 12 are please referred to, a kind of LED drive chip of the invention crosses pressure detection method, is driven using the LED of the present invention
Dynamic chip over-voltage detection circuit carries out a LED drive chip over-pressed detection, including step：
S1：A detection voltage VCS and a base for the judgement detection voltage input end input of failed module 2 is detected using anti-overvoltage
The size of quasi- voltage VCSTH；
S2：Continue subsequent step if detecting voltage VCS and being less than reference voltage V CSTH；Otherwise judge to detect voltage VCS again
With the size of a peak current detection threshold value VREF of peak current detection threshold value input input, such as detect voltage VCS and be less than
Peak current detection threshold value VREF, the counting of counting unit is reset and return to step S1, otherwise continues subsequent step；
S3：Judge that a demagnetization signal TD and minimum demagnetization time generate the minimum demagnetization time signal that unit 13 exports
The size of TDMIN；
S4:If demagnetization signal TD is less than minimum demagnetization time signal TDMIN, the counting of counting unit 16 adds one, and after
Continuous subsequent step；Otherwise the counting of counting unit 16 resets simultaneously return to step S1；
S5：Whether the count value for judging counting unit 16 is preset value；
S6：If so, one over-pressed signal OVP of the output of counting unit 16；Otherwise return to step S1.
A kind of LED drive chip of the present invention crosses whether pressure detection method reaches reference voltage to detection voltage VCS first
VCSTH judged, reference voltage V CSTH=k* peak current detection threshold VREF, wherein 0<k<1, coefficient k is generally selected in 0.1
Left and right.If detection voltage VCS voltage reaches reference voltage V CSTH, then judges whether detecting system is connected in chip maximum again
Detection voltage VCS reaches peak current detection threshold value VREF in time.If not reaching, demagnetization signal TD is likely due to inductance
Undercharge and less than minimum demagnetization time signal TDMIN, be also possible to demagnetization signal TD certainly>Minimum demagnetization time signal
TDMIN, both of which are not over-voltage faults, then period demagnetization signal TD and chip interior minimum demagnetization time letter not to this
Number TDMIN is compared, and counter is zeroed out, and does not generate over-pressed signal；If in chip maximum turn-on time TONMAX
Peak current detection voltage VCS reaches peak current detection threshold voltage VREF in time, then to this period demagnetization time TD and
Chip interior minimum demagnetization time TDMIN is compared, if comparison result is demagnetization signal TD>Minimum demagnetization time signal
TDMIN, then counter O reset, if comparison result is demagnetization signal TD<Minimum demagnetization time signal TDMIN, then counter add one
And judge whether counter continuous counter is preset value (such as 3), and if continuous counter is preset value, output overvoltage signal OVP,
If continuous counter is not preset value, next period goes successively to judge flow.If detection signal VCS voltage does not reach at the beginning
To reference voltage V CSTH, then directly whether it is less than minimum demagnetization time TDMIN to demagnetization time TD and judges, equally, if
Comparison result is demagnetization signal TD>Minimum demagnetization time signal TDMIN, then counter O reset, if comparison result is demagnetization signal
TD<Minimum demagnetization time TDMIN, then counter adds judges whether counter continuous counter is three together, if continuous counter is three,
Then output overvoltage OVP signals, if continuous counter is not three, next period goes successively to judge flow, if when maximum is connected
Interior detection voltage VCS is not up to reference voltage V CSTH, then this period is still to demagnetization time TD and minimum demagnetization time
TDMIN is compared, and due to induction charging deficiency, centainly there is demagnetization signal TD<Minimum demagnetization time signal TDMIN, therefore count
Number plus one, is that input voltage has occurred to be sufficiently close to output voltage situation at this time, if therefore continuous is triggering output overvoltage three times
Protection can centainly be protected if output at this time is more than overvoltage protection threshold VOVP, if output terminal reaches over-pressed guarantor not yet at this time
Threshold value VOVP is protected, but output one at this time is set to unloaded or overvoltage, can just cause output voltage VLEDIt is sufficiently close to input line voltage
VLINIESo that detection voltage VCS<Reference voltage V CSTH, even if therefore such situation in output voltage VLEDOvervoltage is not reached
Overvoltage protection just occurs before rotection thresholds VOVP, after protection, output is declined, therefore does not have switch periods during protection,
System does not continue to power to output terminal, then output also will continue to rise later for protection, and output eventually rises to overvoltage protection
Threshold value VOVP, therefore output over-voltage protection can be played the role of always, it is sent out before output does not reach overvoltage protection threshold VOVP
Overvoltage protection several times is given birth to, but such situation is centainly happened at output overvoltage or no-load condition, final output can rise, but not
More than overvoltage protection threshold VOVP.
It records above, only presently preferred embodiments of the present invention, is not limited to the scope of the present invention, of the invention is upper
Stating embodiment can also make a variety of changes.What i.e. every claims applied according to the present invention and description were made
Simply, equivalent changes and modifications fall within the claims of patent of the present invention.
Claims (5)
1. a kind of LED drive chip over-voltage detection circuit, including a detection circuit ontology, which is characterized in that further include an anti-mistake
Pressure detection failed module, the first control signal input terminal of the anti-overvoltage detection failed module one input control signal of connection,
The detection voltage input end of one input detection voltage, the reference voltage input of an input reference voltage and the detection circuit sheet
Body is set as after the control signal is received, and judges whether the detection voltage is less than the reference voltage, and in institute
It states and the detection circuit ontology execution overvoltage detection is enabled when detection voltage is less than the reference voltage, wherein the detection circuit
Ontology includes：
One first comparator, the normal phase input end of the first comparator connect the detection voltage input end, first ratio
Inverting input compared with device connects a peak current detection threshold value input；
One first latch, the first input end of first latch connect the output terminal of the first comparator；
One minimum demagnetization time generated unit, and the minimum demagnetization time generates input terminal connection the first control letter of unit
Number input terminal；
One condition adjudgement unit, the first input end of the condition adjudgement unit connect a demagnetization signal input terminal, the state
The second input terminal connection minimum demagnetization time of judging unit generates the output terminal of unit；
One maximum turn-on time generates unit, and the maximum turn-on time generates input terminal connection the first control letter of unit
Number input terminal, the maximum turn-on time generate the output terminal connection anti-overvoltage detection failed module of unit；And
One counting unit, the first input end of the counting unit connect the output terminal of first latch；It is described to count list
Second input terminal of member connects the first output terminal of the condition adjudgement unit；The third input terminal connection institute of the counting unit
The second output terminal of condition adjudgement unit is stated, the second of the first output terminal connection first latch of the counting unit is defeated
Enter end, the second output terminal of the counting unit is as over-pressed signal output end.
2. LED drive chip over-voltage detection circuit according to claim 1, which is characterized in that the counting unit includes：
One first nor gate, the first input end of first nor gate connects the first input end of the counting unit, described
Second input terminal of the first nor gate connects the 4th input terminal of the counting unit；
One second nor gate, the first input end of second nor gate connect the output terminal of first nor gate, and described the
Second input terminal of two nor gates connects the second input terminal of the counting unit；
One first NAND gate, the first input end of the NAND gate connect the third input terminal of the counting unit, it is described with it is non-
Second input terminal of door connects the 5th input terminal of the counting unit, and the output terminal of first NAND gate connects the counting
First output terminal of unit；And
One counter, the first input end of the counter connect the output terminal of second nor gate, and the of the counter
Two input terminals connect the output terminal of first NAND gate, and the second of the output terminal connection counting unit of the counter is defeated
Outlet.
3. LED drive chip over-voltage detection circuit according to claim 1 or 2, which is characterized in that the anti-overvoltage detection
Failed module includes：
One fixed pulse width generates unit, and the input terminal that the fixed pulse width generates unit connects the first control signal input
End；
One second comparator, the normal phase input end of second comparator connect the detection voltage input end, second ratio
Inverting input compared with device connects the reference voltage input；
One second latch, the first input end of second latch connect the output terminal that the fixed pulse width generates unit,
Second input terminal of second latch connects the output terminal of second comparator, and the output terminal of second latch connects
Connect the 4th input terminal of the counting unit；
One phase inverter, the input terminal of the phase inverter connect the output terminal of second latch；And
One second NAND gate, the first input end connection maximum turn-on time of second NAND gate generate the output of unit
End, the second input terminal of second NAND gate connect the output terminal of the phase inverter, and the output terminal of second NAND gate connects
Connect the 5th input terminal of the counting unit.
4. a kind of LED drive chip crosses pressure detection method, which is characterized in that including step：Utilize any one of claims 1 to 33
The LED drive chip over-voltage detection circuit carries out a LED drive chip over-pressed detection.
5. LED drive chip according to claim 4 crosses pressure detection method, which is characterized in that further comprises step：
S1：A detection voltage and a base for the detection voltage input end input is judged using the anti-overvoltage detection failed module
The size of quasi- voltage；
S2：If the detection voltage is less than the reference voltage and continues subsequent step；Otherwise judge again it is described detection voltage with
The size of one peak current detection threshold value of the peak current detection threshold value input input, as the detection voltage is less than institute
Peak current detection threshold value is stated, the counting of the counting unit is reset and return to step S1, otherwise continues subsequent step；
S3：Judge that a demagnetization signal and the minimum demagnetization time generate the big of the minimum demagnetization time signal that unit exports
It is small；
S4:If the demagnetization signal is less than the minimum time signal of demagnetizing, the counting of the counting unit adds one, and continue
Subsequent step；Otherwise the counting of the counting unit resets simultaneously return to step S1；
S5：Whether the count value for judging the counting unit is preset value；
S6：If so, one over-pressed signal of counting unit output；Otherwise return to step S1.
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| CN1457139A (en) * | 2002-05-08 | 2003-11-19 | 精工爱普生株式会社 | Stabilized voltage swtich supply with overpressure output protective circuit and electronic device |
| CN104159351A (en) * | 2013-05-13 | 2014-11-19 | 登丰微电子股份有限公司 | Feedback control circuit and LED drive circuit |
| CN106256173A (en) * | 2015-02-27 | 2016-12-21 | 达尔科技股份有限公司 | Simulation and digital dimming for LED driver control |
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| CN1457139A (en) * | 2002-05-08 | 2003-11-19 | 精工爱普生株式会社 | Stabilized voltage swtich supply with overpressure output protective circuit and electronic device |
| CN104159351A (en) * | 2013-05-13 | 2014-11-19 | 登丰微电子股份有限公司 | Feedback control circuit and LED drive circuit |
| CN106256173A (en) * | 2015-02-27 | 2016-12-21 | 达尔科技股份有限公司 | Simulation and digital dimming for LED driver control |
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