CN106532912B - The dynamic power supplies path selecting circuit of USB and battery dual power supply - Google Patents
The dynamic power supplies path selecting circuit of USB and battery dual power supply Download PDFInfo
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- CN106532912B CN106532912B CN201611030240.1A CN201611030240A CN106532912B CN 106532912 B CN106532912 B CN 106532912B CN 201611030240 A CN201611030240 A CN 201611030240A CN 106532912 B CN106532912 B CN 106532912B
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- switch pipe
- pmos
- pmos switch
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/061—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for DC powered loads
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/068—Electronic means for switching from one power supply to another power supply, e.g. to avoid parallel connection
Abstract
The invention discloses the dynamic power supplies path selecting circuit of a kind of USB and battery dual power supply, output of the VCC from USB power source, output of the VBAT from battery supply.VMAX voltage generation circuit can automatically select the maximum value in the two as output with the size of real time discriminating VCC and VBAT voltage.VCC selection circuit generates the Digital Logic that can control PM1 pipe switch.VBAT selection circuit generates the Digital Logic that can control PM2 pipe switch.The power source path for meeting power supply scene and demand by the load circuit selection that the two switches are chip interior, i.e., select a unique power supply from VCC or VBAT.The present invention is conducive to the integrated level of circuit, reduces the external Material Cost of the control class SOC of dual power supply and multiple feed.
Description
Technical field
The present invention relates to field of power management, and more particularly to a kind of USB, ((universal serial bus) and battery dual power supply are supplied
The dynamic power supplies path selecting circuit of electricity.
Background technique
Control class SOC (system level chip) chip (the included microcontroller in inside) common at present, the meeting in on-line Application
It is powered using USB power source；And in mobile environment, then it is powered using battery.Chip will not only support USB power source to power in this way,
But also battery is supported to power.System needs to carry out both power supply power supply paths dynamic selection in real time.It is previous this two
The path management of kind power supply is usually to be realized in PCB (printed circuit board) plate grade using discrete component, by chip exterior
In addition switching on and shutting down key, diode and switching tube select the chip interior load circuit to need live electrical power to be used.In this way
The Material Cost of system integrator can be greatly increased.
As shown in connection with fig. 1, what the USB and battery dual power supply path management circuit that the outer discrete device of traditional piece is built were realized
Function is when USB power source is effective (i.e. chip obtains electric energy from external equipment by USB interface), and load supplying only is from
Whether opened in USB power source but regardless of switching on and shutting down key at this time or whether battery has electricity；When invalid (the i.e. USB interface of USB power source
Disconnect or do not power), when external switch machine key is pressed, load obtains the power supply from battery.Such as Fig. 1
Shown, VCC is USB power source, and VBAT is battery supply.When VCC (USB power source) powers, Q1 pipe is by Q3 pipe conducting, Q2 pipe is led
Logical, no matter whether VBAT has electricity, and load supplying is from VCC；When VCC is powered off, the conducting of Q1 pipe, Q3 pipe is by whether Q2 pipe leads
It is logical to depend on whether switching on and shutting down key SWE is closed.When SWE is closed, then Q2 pipe is connected, and VBAT powers to the load, while Power_
On signal becomes high level.SWE is touch switch machine key, is automatically springed open by after key pressing by 5 milliseconds of meetings, behavior is not
Influence the supply path selection of chip.When system enters shutdown setting, SWE is pressed again, and Power_on signal becomes low electricity
Flat, circuit enters off-mode, and load no longer receives VBAT power supply.Diode D1-D5 in circuit be used to do voltage domain every
From.The dynamic power supplies path selecting circuit of USB and battery dual power supply that the outer discrete device of tradition piece shown in Fig. 1 is built, are adopted
With multiple discrete metal-oxide-semiconductors, resistance and diode component and a switching on and shutting down key, the material of SOC chip is considerably increased
Cost.
Summary of the invention
The technical problem to be solved in the present invention is to provide the dynamic power supplies Path selections of a kind of USB and battery dual power supply
Circuit is conducive to the integrated level of circuit, reduces the external Material Cost of the control class SOC of dual power supply and multiple feed.
In order to solve the above technical problems, the dynamic power supplies path selecting circuit of USB and battery dual power supply of the invention,
Include:
One VMAX voltage generation circuit, input terminal are connected with the end VCC and the end VBAT respectively, are used for real time discriminating VCC
With the size of VBAT voltage, the maximum value in the two is automatically selected as output；Wherein, output electricity of the VCC from USB power source
Pressure, output voltage of the VBAT from battery supply；VMAX indicates voltage max；
One VCC selection circuit, input terminal are connected with the output end at the end VCC and VMAX voltage generation circuit respectively, use
In the Digital Logic for generating control the first PMOS switch pipe PM1 switch；
One VBAT selection circuit, input terminal are connected with the output end of VMAX voltage generation circuit, for generating control
The Digital Logic of second PMOS switch pipe PM2 pipe switch；
One first PMOS switch pipe PM1, source electrode are connected with the end VCC, the output end of grid and the VCC selection circuit
It is connected；
One second PMOS switch pipe PM2, source electrode are connected with the end VBAT, the output of grid and the VBAT selection circuit
End is connected；
The substrate of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2 are defeated with VMAX voltage generation circuit
Outlet is connected；The drain electrode of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2 and one end of a first capacitor C1
It is connected, the other end ground connection of first capacitor C1；
It can be the negative of chip interior by the switching of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2
The power source path that circuit selection meets power supply scene and demand is carried, i.e., selection one unique power supply electricity from VCC or VBAT
Source.
The present invention realizes the function of power source path selection using the integrated digital control logic of chip interior and switching tube,
The switching on and shutting down key outside a piece is only needed, without the use of discrete device outside other pieces, changes tradition on chip exterior PCB
The selection that two or more power source path is realized using multiple discrete devices reduces the outside of the control more power supply SOC chips of class
Device requirement greatly reduces the cost of system.
Detailed description of the invention
Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the USB of traditional discrete device and the dynamic power supplies path selecting circuit figure of battery dual power supply.
Fig. 2 is the dynamic power supplies path selecting circuit figure of improved integrated circuit USB and battery dual power supply.
Fig. 3 is the dynamic power supplies path selecting circuit figure of multiple feed.
Fig. 4 is the dynamic power supplies path selecting circuit logic control process using improved USB and battery dual power supply
Figure.
Fig. 5 is the one embodiment circuit diagram of control circuit for realizing Fig. 4 logic control process.
Fig. 6 is one embodiment circuit diagram of VMAX voltage generation circuit in Fig. 2.
Fig. 7 is one embodiment circuit diagram of low power consumption comparator in Fig. 6.
Fig. 8 is the one embodiment schematic diagram of low power consumption comparator biasing circuit of Fig. 7.
Specific embodiment
The present invention is implemented under CMOS technology.
When chip applies the system in dual power supply, when being powered using USB power source, no matter switching on and shutting down key whether open or
Whether battery has electricity, and only using USB power source is load supplying；And when USB power source is disconnected, then only in switching on and shutting down by bonded
In the case where logical, load could obtain the power supply from battery.For the above power supply strategy, in the following embodiments using figure
2 circuit structure and the control logic process of Fig. 4, realize these functions in the chip.
As shown in connection with fig. 2, in the present embodiment, VCC comes from the output voltage of USB power source, and VBAT comes from electricity
The output voltage of pond power supply, VMAX voltage generation circuit can automatically select the two with the size of real time discriminating VCC and VBAT voltage
In maximum value as output.VCC selection circuit generates the Digital Logic that can control the first PMOS switch pipe PM1 switch.
VBAT selection circuit generates the Digital Logic that can control the second PMOS switch pipe PM2 switch.First PMOS switch pipe PM1 and
The output end for connecting VMAX voltage generation circuit (i.e. input maximum voltage VMAX) is prevented from producing by the substrate of two PMOS switch pipe PM2
Raw electric leakage.Power supply scene and need can be met by the switching of the two PMOS switch pipes for the load circuit selection of chip interior
The power source path asked selects a unique power supply that is, from VCC or VBAT.C1 is decoupling capacitance, being capable of smooth VCC
With burr voltage when VBAT switching.
Fig. 3 is the dynamic power supplies path selecting circuit structure diagram that multiple feed is extended to by Fig. 2, V1, V2 ..., Vn
It powers from different power supplys to chip, VMAX voltage generation circuit differentiates the voltage swing of n power supply, generates a maximum
Threshold voltage VMAX be power selection circuit and PMOS switch pipe PM1, PM2 ... the substrate of PMn is powered.Power selection circuit provides
PMOS switch pipe PM1, PM2 ... the control logic of PMn.By PMOS switch pipe PM1, PM2 ... the switch of PMn from n electricity
It selects all the way to be wherein load circuit power supply in source, in synchronization, PMOS switch pipe PM1, PM2 ... can only have one in PMn
A pipe is opened, and remaining pipe is all closed.C1 is decoupling capacitance, can smooth multiple power supplys switching when burr voltage.N is
Integer greater than 2.
Fig. 4 is the logic control flow process figure of the dynamic power supplies path selecting circuit using USB and battery dual power supply, this
The function that logic flow is realized is when USB power source is effective, and load supplying only is from USB power source but regardless of switching at this time
Whether machine key is opened or whether battery has electricity；When USB power source power-off (i.e. USB interface disconnect or do not power), when and only
When external switch machine key is pressed, load obtains the power supply from battery.After system enters initial state, initially judge
USB powers on whether flag bit VCC flag is 1 (high level), and if it is high level, then system enters USB power supply state, and first
PMOS switch pipe PM1 conducting, the second PMOS switch pipe PM2 cut-off, VBAT power on flag bit VBAT flag and set 0 (low level)；It is no
Then system enters battery-powered state, continues to judge whether switching on and shutting down key flag bit on-off flag is 1 at this time, if on-
Off flag=1, then system boot, the first PMOS switch pipe PM1 cut-off, the second PMOS switch pipe PM2 are connected, VBAT flag
Set 1；If on-off flag=0, the first PMOS switch pipe PM1, the second PMOS switch pipe PM2 cut-off, system come back to out
Machine initial decision state；When on-off flag sets height again, show that VBAT power supply enters off-mode, the first PMOS is opened at this time
Pipe PM1, the second PMOS switch pipe PM2 cut-off are closed, VBAT flag sets 0；After VBAT normal power supply, it will continue to judge VCC
Whether flag is height, and when VCC flag is 1, then system is battery powered state transition to USB power supply state, PM1 conducting, PM2
Cut-off, VBAT flag set 0.It loops back and forth like this.Delay200 μ s in Fig. 4, after indicating default delay 200S, under continuing
One step determines.
Fig. 5 is the control circuit embodiment done according to Fig. 4 logic control flow process figure, and VCC is USB power supply,
VBAT is battery power supply.
The VCC selection circuit, comprising: an electrification reset circuit SDF, one first digit buffer SH1, a delay circuit
YS, the first phase inverter FX1, third phase inverter FX3 and the 4th phase inverter FX4.
The VBAT selection circuit, comprising: one second phase inverter FX2, a switching on and shutting down key SW1, one or two input terminals and door
AND, pull-up resistor R1, the second capacitor C2, the second digit buffer SH2 and 1 select 1 circuit.
Whether electrification reset circuit SDF powers on according to VCC, high level or low level is generated, by a digital buffer
Device SH1 generation VCC powers on flag signal VCC flag and gives internal MCU logical process.The logic level warp that VCC POR is generated
It crosses delay circuit YS delay and the output of the first PMOS switch pipe PM1, VCC POR is controlled also by phase inverter FX1 again for a period of time
Generating control signal CTRL by two phase inverters FX3, FX4 goes gating 2 to select 1 circuit XT.When CTRL is high level, second
PMOS switch pipe PM2 connects VMAX voltage, i.e. the second PMOS switch pipe PM2 shutdown, and the first PMOS switch pipe PM1 is beaten at this time
It opens, system enters USB power supply state；CTRL=0, the first PMOS switch pipe PM1 are disconnected, and the second PMOS switch pipe PM2 is by switching
Machine key or VBAT power on flag bit VBAT flag and pass through the Power_on signal that internal latency generates, to control.So working as
Switching on and shutting down key SW1 closure or VBAT flag are 1, and the second PMOS switch pipe PM2 is opened, and VBAT powers to the load.Otherwise,
VBAT stops power supply, and system enters off-mode.When switching on and shutting down key SW1 is pressed, switching on and shutting down key flag bit on-
Off flag sets 1.Resistance R1 is the pull-up resistor of switching on and shutting down key SW1, and capacitor C2 is the filter capacitor of switching on and shutting down key SW1,
The addition of capacitor C2 can to avoid switching on and shutting down key SW1 due to electrostatic interference or shake caused by false triggering.Work as battery in Fig. 5
When power supply, after SW1 is closed for the first time, Power_on=1, until SW1 is closed again, system cut-off, Power_on=0.
As shown in connection with fig. 6, the VMAX voltage generation circuit includes four PMOS switch pipes in the following embodiments
M29, M30, M3, M4 and a low power consumption comparator.The source electrode of 29th PMOS switch pipe M29, third PMOS switch pipe M3
The grid of source electrode and the 4th PMOS switch pipe M4 are connected with the end output voltage VCC of USB power source；30th PMOS switch pipe
The output voltage of the source electrode of M30, the grid of the source electrode of the 4th PMOS switch pipe M4 and third PMOS switch pipe M3 and battery supply
The end VBAT is connected.The drain electrode of 29th PMOS switch pipe M29, the drain electrode of the 30th PMOS switch pipe M30, the 3rd PMOS are opened
Close the drain electrode of pipe M3 and the drain electrode of the 4th PMOS switch pipe M4 and the maximum voltage VMAX output end phase of the low power consumption comparator
Connection.The input terminal of the low power consumption comparator inputs the output voltage VCC of USB power source and the output voltage of battery supply respectively
VBAT.The low power consumption comparator exports the first control logic level SC1 and the second control logic level SC2；First control is patrolled
It collects the end level SC1 to be connected with the grid of the 29th PMOS switch pipe M29, the second control logic level SC2 and the 30th
The grid of PMOS switch pipe M30 is connected.
VMAX voltage generation circuit selects power supply electricity of the peak of voltage in VCC and VBAT as digital control circuit
Source.When the voltage of VCC is much larger than VBAT voltage value, the supply path that PMOS switch pipe M29, M3 conducting are VMAX；When the electricity of VCC
Pressure is much smaller than VBAT voltage value, the supply path that PMOS switch pipe M30, M4 conducting are VMAX；When VCC and VBAT voltage value very
It is close, then compare the voltage of VCC and VBAT by the low power consumption comparator in VMAX voltage generation circuit, generates control logic electricity
Flat SC1 and SC2 controls the switch of PMOS switch pipe M29 and M30, generates height control logic according to comparison voltage to select
Supply path of the PMOS switch pipe M29 or M30 as VMAX, PMOS switch pipe M3, M4 are closed.
As shown in connection with fig. 7, the low power consumption comparator is a differential comparator in the following embodiments, is a kind of typical case
Open loop comparator.Comprising: PMOS transistor M7-12, PMOS switch pipe M16, M18；NMOS transistor M5, M6, M13-15,
NMOS switch pipe M17, M19.The 7th PMOS transistor M12 of PMOS transistor M7~the 12nd, the 16th PMOS switch pipe M16 and
The source electrode of 18th PMOS switch pipe M18 is connected, the maximum voltage VMAX output end as low power consumption comparator；11st
The drain electrode of PMOS transistor M11 and the drain and gate and the 14th NMOS transistor M14 of the 13rd NMOS transistor M13
Grid be connected；The grid of 11st PMOS transistor M11 and the grid of the 9th PMOS transistor M9 and drain electrode, the 7th PMOS
The grid of the drain electrode of transistor M7, the drain electrode of the 5th NMOS transistor M5 and the 8th PMOS transistor M8 is connected；7th
The drain electrode of the grid of PMOS transistor M7 and the 8th PMOS transistor M8, the grid of the tenth PMOS transistor M10 and drain electrode, the tenth
The drain electrode of the grid, the 6th NMOS transistor M6 of two PMOS transistor M12 is connected.The source electrode of 5th NMOS transistor M5,
The source electrode of six NMOS transistor M6 is connected with the drain electrode of the 15th NMOS transistor M15.The grid of 5th NMOS transistor M5
Input the output voltage VCC of the grid input USB power source of the output voltage VBAT, the 6th NMOS transistor M6 of battery supply.The
The grid of 15 NMOS transistor M15 inputs VB (current source bias voltage).The drain electrode of 12nd PMOS transistor M12, the tenth
The drain electrode of four NMOS transistor M14, the grid of the 16th PMOS switch pipe M16 and the 17th NMOS switch pipe M17 grid phase
Connection.Drain electrode, the drain electrode of the 17th NMOS switch pipe M17, the 18th PMOS switch pipe M18 of 16th PMOS switch pipe M16
Grid and the grid of the 19th NMOS switch pipe M19 be connected；And the output end as the first control logic level SC1.The
The drain electrode of 18 PMOS switch pipe M18 is connected with the drain electrode of the 19th NMOS switch pipe M19, and as the second control logic electricity
The output end of flat SC2.Source electrode, ten seven NMOS switch pipe of the 13rd NMOS transistor M13 to the 15th NMOS transistor M15
The source electrode of the source electrode of M17 and the 19th NMOS switch pipe M19 ground connection.
5th NMOS transistor M5 and the 6th NMOS transistor M6 is main amplifier tube, the 7th PMOS transistor M7 and the 9th
PMOS transistor M9, the 8th PMOS transistor M8 and the tenth PMOS transistor M10 these two pair load pipe can generate for comparator
Certain hysteresis voltage window, the jump back and forth of output voltage when causing to compare because of burr on power supply to overcome.13rd
NMOS transistor M13, the 14th NMOS transistor M14 are the current mirror output of comparator.16th PMOS switch pipe M16,
17 NMOS switch pipe M17, the 18th PMOS switch pipe M18, the 19th NMOS switch pipe M19 constitute two-stage phase inverter, comparison
The analog level relatively obtained compared with device carries out being converted to cmos digital logic level, and wherein SC2 is the anti-phase output of SC1.Due to
The main function of VMAX voltage generation circuit is for the power digital logic circuitry in dynamic power supplies path selecting circuit, so base
In the demand for reducing power consumption, which is typically designed as low consumption circuit.Wherein main design method is to reduce comparator
Bias current, i.e., mainly realized by reducing the bias current that the 15th NMOS transistor M15 is provided.
Fig. 8 is the low-power consumption biasing circuit of comparator, this circuit generates VB voltage to control the bias current of comparator.With
Conventional Constant-g m biasing circuit difference is the 28th NMOS transistor M28 pipe being biased in linear zone to replace resistance
It realizes the other electric current of na level, the wastes of large-area chips can be caused to avoid using resistance to reach same effect.
The low-power consumption biasing circuit includes: a start-up circuit, the 24th to the 26th PMOS transistor M24 to M26,
20th to the 23rd NMOS transistor M20 to M23 and the 27th NMOS transistor M27 and the 28th NMOS is brilliant
Body pipe M28.
The source electrode of 24th to the 26th PMOS transistor M24 to M26 is connected with start-up circuit, then with it is described low
The maximum voltage VMAX output end of power consumption comparer is connected.The grid of 24th to the 26th PMOS transistor M24 to M26
Pole is connected with the drain electrode of the 25th PMOS transistor M25, the drain electrode of the 23rd NMOS transistor M23 and start-up circuit.
The drain electrode of 24th PMOS transistor M24, the drain and gate of the 20th bi-NMOS transistor M22, the 23rd NMOS are brilliant
The grid of body pipe M23 is connected, and is then connected again with start-up circuit.The source electrode and second of 20th bi-NMOS transistor M22
The grid of ten NMOS transistor M20, the grid of the 21st NMOS transistor M21 are connected.23rd NMOS transistor M23
Source electrode be connected with the drain electrode of the 21st NMOS transistor M21.The source electrode and the 20th of 21st NMOS transistor M21
The drain electrode of eight NMOS transistor M28 is connected.The drain electrode of 26th PMOS transistor M26 and the 27th NMOS transistor
The grid of M27 is connected with the grid of drain electrode, the 28th NMOS transistor M28.The source electrode of 20th NMOS transistor M20,
The source electrode of 27th NMOS transistor M27 and the source electrode ground connection of the 28th NMOS transistor M28.
Although the present invention is illustrated using specific embodiment, the explanation of embodiment is not intended to limit of the invention
Range.One skilled in the art is by reference to explanation of the invention, without departing substantially from the spirit and scope of the present invention
In the case of, it is easy to carry out various modifications or embodiment can be combined.
Claims (7)
1. the dynamic power supplies path selecting circuit of a kind of USB and battery dual power supply characterized by comprising
One VMAX voltage generation circuit, input terminal are connected with the end VCC and the end VBAT respectively, for real time discriminating VCC and
The size of VBAT voltage automatically selects the maximum value in the two as output；Wherein, output electricity of the VCC from USB power source
Pressure, output voltage of the VBAT from battery supply；VMAX indicates voltage max；
One VCC selection circuit, input terminal is connected with the output end at the end VCC and VMAX voltage generation circuit respectively, for producing
The Digital Logic of raw control the first PMOS switch pipe (PM1) switch；
One VBAT selection circuit, input terminal are connected with the output end of VMAX voltage generation circuit, for generating control second
The Digital Logic of PMOS switch pipe (PM2) switch；
One first PMOS switch pipe (PM1), source electrode is connected with the end VCC, the output end phase of grid and the VCC selection circuit
Connection；
One second PMOS switch pipe (PM2), source electrode is connected with the end VBAT, the output end of grid and the VBAT selection circuit
It is connected；
The substrate of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2) is defeated with VMAX voltage generation circuit
Outlet is connected；The drain electrode of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2) and a first capacitor (C1)
One end be connected, the other end of the first capacitor (C1) ground connection；
It can be the load of chip interior by the switching of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2)
Circuit selection meets the power source path of power supply scene and demand, i.e., a unique power supply is selected from VCC or VBAT；
After system enters initial state, first determine whether that USB powers on whether flag bit VCC flag is 1, is if VCC flag=1
System enters USB power supply state, the conducting of the first PMOS switch pipe (PM1), and the second PMOS switch pipe (PM2) ends, and VBAT powers on mark
Will position VBAT flag sets 0；Otherwise system enters battery-powered state, continues to judge switching on and shutting down key flag bit on-off at this time
Whether flag is 1, if on-off flag=1, system boot, the first PMOS switch pipe (PM1) ends, and the 2nd PMOS is opened
Pipe (PM2) conducting is closed, VBAT flag sets 1；If on-off flag=0, the first PMOS switch pipe (PM1), the 2nd PMOS are opened
Pipe (PM2) cut-off is closed, system comes back to initial state；When on-off flag sets height again, show that VBAT power supply enters shutdown shape
State, the first PMOS switch pipe (PM1), the cut-off of the second PMOS switch pipe (PM2), VBAT flag set 0 at this time；When VBAT is normally supplied
It after electricity, will continue to judge whether VCC flag is height, when VCC flag is 1, then system is battery powered state transition to USB confession
Electricity condition, the conducting of the first PMOS switch pipe (PM1), the cut-off of the second PMOS switch pipe (PM2), VBAT flag set 0: so circulation
Back and forth.
2. dynamic power supplies path selecting circuit as described in claim 1, which is characterized in that the VMAX voltage generation circuit,
Including four PMOS switch pipes (M29, M30, M3, M4) and a low power consumption comparator；29th PMOS switch pipe (M29)
The output voltage VCC of source electrode, the grid of the source electrode of third PMOS switch pipe (M3) and the 4th PMOS switch pipe (M4) and USB power source
End is connected；The source electrode and third PMOS switch pipe of the source electrode of 30th PMOS switch pipe (M30), the 4th PMOS switch pipe (M4)
(M3) grid is connected with the end output voltage VBAT of battery supply；The drain electrode of 29th PMOS switch pipe (M29), third
The drain electrode of ten PMOS switch pipes (M30), the drain electrode of third PMOS switch pipe (M3) and the drain electrode of the 4th PMOS switch pipe (M4) with
The maximum voltage VMAX output end of the low power consumption comparator is connected；
The input terminal of the low power consumption comparator inputs the output voltage VCC of USB power source and the output voltage of battery supply respectively
VBAT；
The low power consumption comparator exports the first control logic level (SC1) and the second control logic level (SC2)；First control
Logic level (SC1) end is connected with the grid of the 29th PMOS switch pipe (M29), the second control logic level (SC2) and
The grid of 30th PMOS switch pipe (M30) is connected.
3. dynamic power supplies path selecting circuit as claimed in claim 2, it is characterised in that: when the voltage of VCC is much smaller than VBAT
Voltage value, the supply path that the 30th PMOS switch pipe (M30), the conducting of the 4th PMOS switch pipe (M4) are VMAX；When VCC with
VBAT voltage value is close, then compares the voltage of VCC and VBAT by the low power consumption comparator in VMAX voltage generation circuit, generates
First control logic level (SC1) and the second control logic level (SC2) control the 29th PMOS switch pipe (M29) and
The switch of 30 PMOS switch pipes (M30) generates height control logic according to comparison voltage to select the 29th PMOS switch
Manage the supply path of (M29) or the 30th PMOS switch pipe (M30) as VMAX, third PMOS switch pipe (M3), the 4th
PMOS switch pipe (M4) is closed.
4. dynamic power supplies path selecting circuit as claimed in claim 2, it is characterised in that:
The low power consumption comparator is a differential comparator, comprising: (M7 is extremely for the 7th PMOS transistor to the 12nd PMOS transistor
M12), the 16th PMOS switch pipe (M16), the 18th PMOS switch pipe (M18)；5th NMOS transistor (M5), the 6th NMOS
Transistor (M6), the 13rd NMOS transistor to the 15th NMOS transistor (M13 to M15), the 17th NMOS switch pipe
(M17), the 19th NMOS switch pipe (M19)；
7th PMOS transistor (M7)~the 12nd PMOS transistor (M12), the 16th PMOS switch pipe (M16) and the 18th
The source electrode of PMOS switch pipe (M18) is connected, the maximum voltage VMAX output end as low power consumption comparator；11st PMOS is brilliant
The drain and gate and the 14th NMOS transistor (M14) of the drain electrode of body pipe (M11) and the 13rd NMOS transistor (M13)
Grid be connected；The grid of 11st PMOS transistor (M11) and grid and the drain electrode, the 7th of the 9th PMOS transistor (M9)
The grid phase of the drain electrode of PMOS transistor (M7), the drain electrode of the 5th NMOS transistor (M5) and the 8th PMOS transistor (M8)
Connection；The drain electrode of the grid of 7th PMOS transistor (M7) and the 8th PMOS transistor (M8), the tenth PMOS transistor (M10)
Grid is connected with drain electrode, the drain electrode of the grid, the 6th NMOS transistor (M6) of the 12nd PMOS transistor (M12)；
The source electrode and the 15th NMOS transistor (M15) of the source electrode of 5th NMOS transistor (M5), the 6th NMOS transistor (M6)
Drain electrode be connected；The output voltage VBAT of the grid input battery supply of 5th NMOS transistor (M5), the 6th NMOS crystal
Manage the output voltage VCC of the grid input USB power source of (M6)；The grid of 15th NMOS transistor (M15) inputs VB；12nd
The drain electrode of PMOS transistor (M12), the drain electrode of the 14th NMOS transistor (M14), the 16th PMOS switch pipe (M16) grid
It is connected with the grid of the 17th NMOS switch pipe (M17)；The drain electrode of 16th PMOS switch pipe (M16), the 17th NMOS are opened
The grid for closing the drain electrode of pipe (M17), the grid of the 18th PMOS switch pipe (M18) and the 19th NMOS switch pipe (M19) is connected
It connects；And the output end as the first control logic level (SC1)；The drain electrode and the 19th of 18th PMOS switch pipe (M18)
The drain electrode of NMOS switch pipe (M19) is connected, and the output end as the second control logic level (SC2)；13rd NMOS is brilliant
Body pipe (M13) is to the source electrode of the 15th NMOS transistor (M15), the source electrode and the 19th of the 17th NMOS switch pipe (M17)
The source electrode of NMOS switch pipe (M19) is grounded.
5. dynamic power supplies path selecting circuit as claimed in claim 4, it is characterised in that:
Further include a biasing circuit, for generating VB voltage, controls the bias current of the low power consumption comparator；Comprising: one
Start-up circuit, the 24th to the 26th PMOS transistor (M24 to M26), the 20th to the 23rd NMOS transistor
(M20 to M23) and the 27th NMOS transistor (M27) and the 28th NMOS transistor (M28)；
24th to the 26th PMOS transistor (source electrode of M24 to M26) is connected with start-up circuit, then with the low function
The maximum voltage VMAX output end of consumption comparator is connected；24th to the 26th PMOS transistor (grid of M24 to M26)
Pole is connected with the drain electrode of the 25th PMOS transistor (M25), the drain electrode of the 23rd NMOS transistor (M23) and start-up circuit
It connects；The drain electrode of 24th PMOS transistor (M24), the drain and gate of the 20th bi-NMOS transistor (M22), the 23rd
The grid of NMOS transistor (M23) is connected, and is then connected again with start-up circuit；20th bi-NMOS transistor (M22)
Source electrode is connected with the grid of the grid of the 20th NMOS transistor (M20), the 21st NMOS transistor (M21)；20th
The source electrode of three NMOS transistors (M23) is connected with the drain electrode of the 21st NMOS transistor (M21)；21st NMOS crystal
(source electrode of M21 is connected pipe with the drain electrode of the 28th NMOS transistor (M28)；The leakage of 26th PMOS transistor (M26)
Pole is connected with the grid of the grid of the 27th NMOS transistor (M27) and drain electrode, the 28th NMOS transistor (M28)；
The source electrode and the 28th NMOS transistor of the source electrode of 20th NMOS transistor (M20), the 27th NMOS transistor (M27)
(M28) source electrode ground connection.
6. dynamic power supplies path selecting circuit as described in claim 1, it is characterised in that: the VCC selection circuit, comprising:
Whether one electrification reset circuit powers on according to VCC, generates high level or low level；
One first digit buffer, is connected with the electrification reset circuit, powers on flag signal for generating VCC；
One delay circuit, input terminal are connected with the output end of the electrification reset circuit, output end and the first phase inverter
Input terminal be connected, the output end of first phase inverter is connected with the grid of the first PMOS switch pipe (PM1)；It is described to power on
The logic level that reset circuit generates is after delay circuit postpones a period of time, then by controlling the after the first inverter
One PMOS switch pipe (PM1)；
One third phase inverter, input terminal are connected with the output end of the electrification reset circuit, output end and the 4th reverse phase
The input terminal of device is connected；The logic level that the electrification reset circuit generates passes through third phase inverter and the 4th inverter
After generate gate control signal.
7. dynamic power supplies path selecting circuit as claimed in claim 6, it is characterised in that: the VBAT selection circuit, comprising:
One second phase inverter, input terminal input signal Power_on, which is to power on flag bit by VBAT
The signal that VBAT flag is generated by chip interior delay, when battery power supply, after switching on and shutting down key is closed for the first time,
Power_on=1, until switching on and shutting down key is closed again, system cut-off, Power_on=0；
One or two input terminals and door, one input end are connected with the output end of second phase inverter, another input terminal with it is described
The other end of switching on and shutting down key, one end of the second capacitor, pull-up resistor one end be connected with the input terminal of the second digit buffer
It connecing, the other end ground connection of the second capacitor, the other end of pull-up resistor is connected with the source electrode of the second PMOS switch pipe (PM2), the
The output end of two digit buffers exports switching on and shutting down key flag bit signal；
One 2 select 1 circuit, and one input end is connected with two input terminal with the output end of door, another input terminal input voltage
Maximum value VMAX, gating control terminal input gate control signal；The grid phase of its output end and the second PMOS switch pipe (PM2)
Connection；
The second PMOS switch pipe (PM2) is controlled by switching on and shutting down key or power on signal；When switching on and shutting down key is closed
Or VBAT flag is 1, the second PMOS switch pipe (PM2) is opened, and VBAT powers to the load；Otherwise, VBAT stops power supply, is
System enters off-mode；When switching on and shutting down key is pressed, switching on and shutting down key flag bit on-off flag sets 1.
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| CN107204642A (en) * | 2017-05-23 | 2017-09-26 | 红河学院 | The method of supplying power to and device of flowmeter radio meter register instrument |
| CN107395170A (en) * | 2017-08-18 | 2017-11-24 | 无锡力芯微电子股份有限公司 | Power selection circuit |
| CN108259030A (en) * | 2017-09-11 | 2018-07-06 | 杰夫微电子（四川）有限公司 | A kind of switching device automatically according to input selection power path |
| WO2021031164A1 (en) | 2019-08-21 | 2021-02-25 | Power Integrations, Inc. | Current sharing for multi-output charging device |
| CN111224657A (en) * | 2019-12-25 | 2020-06-02 | 曙光信息产业(北京)有限公司 | Power supply switching circuit of computer USB port |
| CN111555427B (en) * | 2020-06-05 | 2023-05-26 | 电子科技大学 | Dual-source energy management circuit with dual-energy source input |
| CN114583824B (en) * | 2022-05-05 | 2022-07-22 | 北京紫光青藤微系统有限公司 | Power switch selection circuit |
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| CN102263434A (en) * | 2010-05-26 | 2011-11-30 | 飞兆半导体公司 | VBUS power switch |
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