CN205263697U - Take recoverable low -power consumption voltage reference source of replying position by cable - Google Patents

Abstract

The utility model discloses a take recoverable low -power consumption voltage reference source of replying position by cable, including last electric reset circuit, starting circuit, reference voltage source core circuit, reference voltage correction circuit, snubber circuit. The utility model discloses taking and replying the bit function by cable, whether detectable mains voltage is effective operating voltage, the utility model discloses a starting circuit has fast characteristics of toggle speed, and the reference voltage correction circuit has adopted digital technique to repair the accent to the MOS pipe, have rectify convenient, the area is little, the characteristics of low power dissipation, the utility model has the advantages of high accuracy, low -power consumption, little, the operating voltage scope width of area.

Description

A kind of recoverable low power consumption voltage a reference source with electrification reset

Technical field

The utility model relates to power technique fields, is specifically related to a kind of recoverable low-power consumption electricity with electrification resetPress a reference source.

Background technology

Reference voltage source in the circuit such as memory, D and D/A converter and power management, be apply the widestGeneral a kind of analog circuit. Reference voltage source is for providing a stable voltage, and its magnitude of voltage is not with power supply electricityPressure, temperature, technique change.

Along with constantly reducing of integrated circuit technology size and developing rapidly of portable set, electronic product pairThe requirement of power consumption is more and more higher, therefore the reference voltage source of the low-power consumption ever more important that seems. In integrated circuit manufactureIn process, due to the impact of the factor such as process corner and mismatch, can make the reference voltage finally obtaining depart from idealA reference value, therefore need to output reference voltage proofread and correct.

Traditional reference voltage source utilizes the base-emitter voltage U of triode_BEWith bias voltage Δ U_BEWith different powerOverlappingly add the reference voltage that obtains zero temp shift, but such reference voltage source power consumption is larger. Traditional benchmarkVoltage correction circuit is all that resistance is trimmed, and therefore needs more resistance, but the corresponding large area of more resistance,Large area means expensive. Traditional voltage-reference is not with electrify restoration circuit, therefore cannot judge currentWhether supply voltage value is effective operational voltage value.

Utility model content

The problems referred to above that exist for prior art, the utility model provide a kind of band electrification reset, recoverable,Reference voltage source low in energy consumption, area is little, temperature coefficient is low. The utility model band electrification reset function, can examineWhether survey supply voltage is effective operating voltage; Start-up circuit of the present utility model has the fast spy of toggle speedPoint, reference voltage correcting circuit has adopted digital technology to trim metal-oxide-semiconductor, has and proofreaies and correct convenient, areaFeature little, low in energy consumption; Thereby the utlity model has that high accuracy, low-power consumption, area are little, operating voltage modelEnclose wide advantage.

With a recoverable low power consumption voltage a reference source for electrification reset, comprise electrify restoration circuit, start-up circuit,Reference voltage source core circuit, reference voltage correcting circuit, buffer circuit;

Whether described electrify restoration circuit reaches the required minimum electricity of the normal work of circuit for detection of supply voltagePress, if export a low level reset signal lower than minimum voltage. Electrify restoration circuit comprises PMOS pipe M_P1、PMOS manages M_P3, PMOS manages M_P4With NOMS pipe M_P2, resistance R_P1, resistance R_P2, resistance R_P3And resistance R_P4, anti-Phase device INV₁, phase inverter INV₂With phase inverter INV₃; PMOS manages M_P1Source electrode and resistance R_P1The first terminalAccess power supply vdd terminal, PMOS manages M_P1Grid and phase inverter INV₂Output connect, PMOS manages M_P1'sDrain electrode and resistance R_P1The second terminal and resistance R_P2The first terminal interconnect, resistance R_P2The second terminalWith NOMS pipe M_P2Grid and resistance R_P3The first terminal interconnect, resistance R_P3The second terminal ground connection,NOMS manages M_P2Source electrode pass through resistance R_P4Ground connection, NOMS manages M_P2Drain electrode and PMOS pipe M_P3Drain electrode and anti-Phase device INV₁Input interconnect, PMOS manages M_P3Grid and the second bias voltage V_P2Connect PMOSPipe M_P3Source electrode and PMOS pipe M_P4Drain electrode connect, PMOS manages M_P4Grid and the first bias voltage V_P1ConnectConnect, PMOS manages M_P4Source electrode access power supply vdd terminal, phase inverter INV₁Output connect phase inverter INV₂Input, phase inverter INV₂Output connect phase inverter INV₃Input, phase inverter INV₃OutputEnd is the output signal POR of whole electrify restoration circuit.

Described start-up circuit is used for providing starting current, avoids zero current (degeneracy) state, common startup electricityRoad can be suitable for. The utility model provides toggle speed start-up circuit faster, comprises PMOS pipe M_S1、PMOS manages M_S2, PMOS manages M_S3And capacitor C_S; Described PMOS pipe M_S1, PMOS manages M_S2, PMOS manages M_S3SourceThe utmost point all accesses power vd D, and PMOS manages M_S1Grid connect the first bias voltage V_P1, PMOS manages M_S1Drain electrode,PMOS manages M_S2Grid, PMOS manage M_S3Grid and capacitor C_SThe first terminal interconnect, capacitor C_S'sThe second terminal ground connection; PMOS manages M_S2Drain electrode be the first enabling signal V_N1Output, PMOS manages M_S3Drain electrodeThe second enabling signal V_N2Output.

Described reference voltage correcting circuit is used for correction reference voltage due to factor shadows such as process corner, imbalance, temperatureRing the error producing, common reference voltage correcting circuit can be suitable for. The invention provides correction more convenient,The reference voltage correcting circuit that power consumption is lower, comprises 3-8 line decoder, M_C1、M_C2、M_C3、M_C4、M_C5、M_C6、M_C7、M_C8, and M_K1、M_K2、M_K3、M_K4、M_K5、M_K6、M_K7、M_K8; Described 3-8 line decoder first is inputtedEnd is connected with the first input correction signal (Trim<0>), and 3-8 line decoder the second input and second is inputted schoolPositive signal (Trim<1>) connect, 3-8 line decoder the 3rd input and the 3rd input correction signal (Trim<2>)Connect 3-8 line decoder the first output and M_K1Grid connects, 3-8 line decoder the first output and M_K1Grid connects, 3-8 line decoder the second output and M_K2Grid connect, 3-8 line decoder the 3rd output withM_K3Grid connects, 3-8 line decoder the 4th output and M_K4Grid connects, 3-8 line decoder the 5th outputWith M_K5Grid connects, 3-8 line decoder the 6th output and M_K6Grid connects, and 3-8 line decoder the 7th is defeatedGo out end and M_K7Grid connects, 3-8 line decoder the 8th output and M_K8Grid connects, M_K1Source electrode, M_K2'sSource electrode, M_K3Source electrode, M_K4Source electrode, M_K5Source electrode, M_K6Source electrode, M_K7Source electrode and M_K8Source ground,M_K1Drain electrode and M_C1Source electrode connect, M_K2Drain electrode and M_C2Source electrode connect, M_K3Drain electrode and M_C3Source electrodeConnect M_K4Drain electrode and M_C4Source electrode connect, M_K5Drain electrode and M_C5Source electrode connect, M_K6Drain electrode and M_C6Source electrode connect, M_K7Drain electrode and M_C7Source electrode connect, M_K8Drain electrode and M_C8Source electrode connect, M_C1GridThe utmost point, M_C1Drain electrode, M_C2Grid, M_C2Drain electrode, M_C3Grid, M_C3Drain electrode, M_C4Grid, M_C4Drain electrode, M_C5Grid, M_C5Drain electrode, M_C5Grid, M_C5Drain electrode, M_C6Grid, M_C6Drain electrode,M_C7Grid, M_C7Drain electrode, M_C8Grid, M_C8Drain electrode be connected with correction output signal (Control); ItsIn: M_C1、M_C2、M_C3、M_C4、M_C5、M_C6、M_C7、M_C8And M_K1、M_K2、M_K3、M_K4、M_K5、M_K6、M_K7、M_K8It is all respectively NMOS pipe.

Described reference voltage source core circuit is for generation of a reference voltage, and reference voltage source core circuit producesOutput voltage (U_REF1) be connected with described buffer circuit, improve reference voltage (U_REF) bringing onto load energyPower.

Brief description of the drawings

Fig. 1 is the electrify restoration circuit connection layout in the utility model.

Fig. 2 is the start-up circuit connection layout in the utility model.

Fig. 3 is reference voltage source core circuit, the buffer circuit connection layout in the utility model.

Fig. 4 is the reference voltage correcting circuit connection layout in the utility model.

Fig. 5 is the utility model circuit connection diagram.

Fig. 6 is the utility model electrify restoration circuit voltage-transfer characteristic analogous diagram.

Fig. 7 is the utility model reference voltage correcting circuit correction chart.

Fig. 8 is the utility model benchmark output voltage temperature characterisitic analogous diagram.

Detailed description of the invention

Below in conjunction with drawings and Examples, the technical solution of the utility model is described in detail, is convenient to obtainBetter understand.

Shown in Fig. 5, it is the circuit of a kind of recoverable low power consumption voltage a reference source with electrification reset of the utility modelConnection layout, comprises electrify restoration circuit, start-up circuit, reference voltage source core circuit, reference voltage correction electricityRoad, buffer circuit. The utility model utilizes the low feature of sub-threshold region metal-oxide-semiconductor electric current, has designed a bringingReset, recoverable, the reference voltage source that low in energy consumption, area is little, temperature coefficient is low.

Figure 3 shows that reference voltage source core circuit and buffer circuit, transistor M₁With M₄、M₃With M₆PointDo not form cascode structure, effectively improved the PSRR of reference voltage source. Choose appropriate sizeMetal-oxide-semiconductor (M_1,2,5,7) and resistance (R_1,2), makeCan obtain a temperature independent benchmarkVoltage U_REF1, Fig. 8 is output voltage U_REFTemperature characterisitic simulation result, can show that by Fig. 8 this practicality is newThe reference voltage temperature coefficient of type is 24ppm/ DEG C, the utlity model has the feature of low-temperature coefficient.

Reference voltage U_REF1Connect capacitor C₁To ground, can filtering U_REF1In higher hamonic wave, reference voltage U_REF1ConnectAfter entering buffer circuit, can improve output voltage U_REFCarrying load ability.

Figure 1 shows that electrify restoration circuit, comprise PMOS pipe M_P1、M_P3、M_P4, NOMS manages M_P2, resistance R_P1、R_P2、R_P3、R_P4, phase inverter INV₁、INV₂、INV₃ Whether upper reset circuit reaches for detection of supply voltageThe required minimum voltage of the normal work of circuit.

Start from scratch and rise still lower than detected value V when supply voltage_DD1Time, PDET is high level, POR_B isHigh level, M_P1Close R_P1Place in circuit, V_DDPass through resistance R_P1、R_P2、R_P3Give M_P2Grid power supply, outputPOR be low level; When supply voltage is greater than detected value V_DD1Time, PDET is low level, the POR of output isHigh level, POR_B is low level, M_P1Conducting, R_P1By short circuit; When supply voltage by height start decline but higher thanDetected value V_DD2Time, V_DDPass through resistance R_P2、R_P3Give M_P2Grid power supply, defeated PDET is low level, outputPOR is high level; When supply voltage is lower than detected value V_DD2Time, PDET is high level, the POR of output is lowLevel. Detected value V_DD1＝U_TH(R_P1+R_P2+R_P3)/R_P3, detected value V_DD2＝U_TH(R_P2+R_P3)/R_P3, whereinU_THDirectly be added in M for making PDET that upset occur_P2Grid voltage, it is exactly anti-that two objects that detect voltage are setWhen only supply voltage fluctuates near detecting voltage, the reset signal POR of output constantly overturns.

The voltage-transfer characteristic simulation result of electrify restoration circuit as shown in Figure 6, can draw inspection from simulation resultSurvey voltage and have hysteresis window, near reset signal can effectively prevent that supply voltage fluctuates minimum operating voltage time(POR) constantly upset, the utility model is that low level resets.

Figure 2 shows that start-up circuit, comprise PMOS pipe M_S1、M_S2、M_S3, capacitor C_S, powered on moment, allMetal-oxide-semiconductor electric current is zero, capacitor C_SOn voltage be 0, M_S2And M_S3Grid is low level, and M_S2And M_S3Source class be high level, M_S2And M_S3Drain electrode is for low level, therefore M_S2And M_S3Starting conducting is a reference source main body electricityRoad provides electric current, makes circuit slowly depart from nought state, final normal work. M in power up_S1The electricity producingStream is to capacitor C_SCharging, finally can make capacitor C_STop crown voltage reaches VDD, now, and M_S2And M_S3GridFor high level, M_S2And M_S3Source electrode is also high level, M_S2And M_S3Close.

Start-up circuit has been realized powered on moment for reference circuit provides starting current, makes circuit depart from zero current shapeState, after the normal work of circuit, start-up circuit cuts out again automatically. Circuit powered on moment, start-up circuit provides at onceStarting current, therefore this start-up circuit has the fast feature of toggle speed.

Due to the impact of metal-oxide-semiconductor and resistance mismatch and process corner, the reference voltage of output can depart from desirable baseAccurate value, thus make output voltage produce error. The error producing in order to eliminate output voltage, need to design schoolPositive circuit is corrected to reference voltage near ideal value. Figure 4 shows that reference voltage correction electricity of the present utility modelRoad, comprises 3-8 line decoder, and NMOS manages M_C1、M_C2、M_C3、M_C4、M_C5、M_C6、M_C7、M_C8, when switch is doneWith NMOS pipe M_K1、M_K2、M_K3、M_K4、M_K5、M_K6、M_K7、M_K8. Whole reference voltage correcting circuit is used for replacingChange the metal-oxide-semiconductor M in Fig. 3_C。

M_K1～M_K8Play on-off action, when playing the metal-oxide-semiconductor (M of on-off action_K1～M_K8) when conducting, be attached theretoMetal-oxide-semiconductor (M_C1～M_C8) in place in circuit, if play the metal-oxide-semiconductor (M of on-off action_K1～M_K8) turn-off time, withConnected metal-oxide-semiconductor (M_C1～M_C8) not in place in circuit. By three bit digital correction signals (Trim<0>～Trim<1>) can control M_C1～M_C8In which MOS place in circuit, when Trim<0>～Trim<1>while being 000,Only has M_C1In place in circuit; When Trim<0>～Trim<1>while being 000, only have M_C1In place in circuit; WhenTrim<0>～Trim<1>be 001 o'clock, only have M_C2In place in circuit; When Trim<0>～Trim<1>be 010Time, only have M_C3In place in circuit; When Trim<0>～Trim<1>while being 011, only have M_C4In place in circuit;When Trim<0>～Trim<1>while being 100, only have M_C5In place in circuit; When Trim<0>～Trim<1>be, only has M at 101 o'clock_C6In place in circuit; When Trim<0>～Trim<1>while being 110, only have M_C7Place in circuitIn; When Trim<0>～Trim<1>while being 111, only have M_C7In place in circuit, access different metal-oxide-semiconductorsCan obtain different reference voltages.

The simulation result of reference voltage correcting circuit as shown in Figure 7, can draw by controlling school from simulation resultPositive signal (Trim<0>～Trim<1>) can obtain different reference voltages, acquiescence is encoded to 011. If losingAdjust with the impact of process corner under output reference voltage larger than ideal value, can regulate toward 111 directions; If in imbalanceLess than ideal value with output reference voltage under the impact of process corner, can regulate toward 000 direction. The utility modelReference voltage correcting circuit there is convenient, the area feature little, low in energy consumption of proofreading and correct.

Claims (4)

1. the recoverable low power consumption voltage a reference source with electrification reset, comprises power supply, it is characterized in that: at least also comprise electrify restoration circuit; Described electrify restoration circuit comprises PMOS pipe M_P1, PMOS manages M_P3, PMOS manages M_P4With NOMS pipe M_P2, resistance R_P1, resistance R_P2, resistance R_P3And resistance R_P4, phase inverter INV₁, phase inverter INV₂With phase inverter INV₃; PMOS manages M_P1Source electrode and resistance R_P1The first terminal access power supply vdd terminal, PMOS manages M_P1Grid and phase inverter INV₂Output connect, PMOS manages M_P1Drain electrode and resistance R_P1The second terminal and resistance R_P2The first terminal interconnect, resistance R_P2The second terminal and NOMS pipe M_P2Grid and resistance R_P3The first terminal interconnect, resistance R_P3The second terminal ground connection, NOMS manages M_P2Source electrode pass through resistance R_P4Ground connection, NOMS manages M_P2Drain electrode and PMOS pipe M_P3Drain electrode and phase inverter INV₁Input interconnect, PMOS manages M_P3Grid and the second bias voltage V_P2Connect, PMOS manages M_P3Source electrode and PMOS pipe M_P4Drain electrode connect, PMOS manages M_P4Grid and the first bias voltage V_P1Connect, PMOS manages M_P4Source electrode access power vd D, phase inverter INV₁Output connect phase inverter INV₂Input, phase inverter INV₂Output connect phase inverter INV₃Input, phase inverter INV₃The output output signal POR that is whole electrify restoration circuit.

2. voltage-reference according to claim 1, is characterized in that: also comprise start-up circuit; Described start-up circuit comprises PMOS pipe M_S1, PMOS manages M_S2, PMOS manages M_S3And capacitor C_S; Described PMOS pipe M_S1, PMOS manages M_S2, PMOS manages M_S3Source electrode all access power supply vdd terminal, PMOS manages M_S1Grid connect the first bias voltage V_P1, PMOS manages M_S1Drain electrode, PMOS manage M_S2Grid, PMOS manage M_S3Grid and capacitor C_SThe first terminal interconnect, capacitor C_SThe second terminal ground connection; PMOS manages M_S2Drain electrode be the first enabling signal V_N1Output, PMOS manages M_S3Drain electrode be the second enabling signal V_N2Output.

3. voltage-reference according to claim 1 and 2, is characterized in that: also comprise reference voltage correcting circuit; Described reference voltage correcting circuit comprises 3-8 line decoder, M_C1、M_C2、M_C3、M_C4、M_C5、M_C6、M_C7、M_C8, and M_K1、M_K2、M_K3、M_K4、M_K5、M_K6、M_K7、M_K8; Described 3-8 line decoder first input end and the first input correction signal (Trim<0>) are connected, 3-8 line decoder the second input and the second input correction signal (Trim<1>) are connected, 3-8 line decoder the 3rd input and the 3rd input correction signal (Trim<2>) are connected 3-8 line decoder the first output and M_K1Grid connects, 3-8 line decoder the first output and M_K1Grid connects, 3-8 line decoder the second output and M_K2Grid connects, 3-8 line decoder the 3rd output and M_K3Grid connects, 3-8 line decoder the 4th output and M_K4Grid connects, 3-8 line decoder the 5th output and M_K5Grid connects, 3-8 line decoder the 6th output and M_K6Grid connects, 3-8 line decoder the 7th output and M_K7Grid connects, 3-8 line decoder the 8th output and M_K8Grid connects, M_K1Source electrode, M_K2Source electrode, M_K3Source electrode, M_K4Source electrode, M_K5Source electrode, M_K6Source electrode, M_K7Source electrode and M_K8Source ground, M_K1Drain electrode and M_C1Source electrode connect, M_K2Drain electrode and M_C2Source electrode connect, M_K3Drain electrode and M_C3Source electrode connect, M_K4Drain electrode and M_C4Source electrode connect, M_K5Drain electrode and M_C5Source electrode connect, M_K6Drain electrode and M_C6Source electrode connect, M_K7Drain electrode and M_C7Source electrode connect, M_K8Drain electrode and M_C8Source electrode connect, M_C1Grid, M_C1Drain electrode, M_C2Grid, M_C2Drain electrode, M_C3Grid, M_C3Drain electrode, M_C4Grid, M_C4Drain electrode, M_C5Grid, M_C5Drain electrode, M_C5Grid, M_C5Drain electrode, M_C6Grid, M_C6Drain electrode, M_C7Grid, M_C7Drain electrode, M_C8Grid, M_C8Drain electrode be connected with correction output signal (Control); Wherein: M_C1、M_C2、M_C3、M_C4、M_C5、M_C6、M_C7、M_C8And M_K1、M_K2、M_K3、M_K4、M_K5、M_K6、M_K7、M_K8It is all respectively NMOS pipe.

4. voltage-reference according to claim 3, is characterized in that: also comprise reference voltage source core circuit and buffer circuit, the output voltage that described reference voltage source core circuit produces is connected with described buffer circuit.