CN106532912A - Dynamic power path selection circuit of USB and battery dual-source power supply - Google Patents
Dynamic power path selection circuit of USB and battery dual-source power supply Download PDFInfo
- Publication number
- CN106532912A CN106532912A CN201611030240.1A CN201611030240A CN106532912A CN 106532912 A CN106532912 A CN 106532912A CN 201611030240 A CN201611030240 A CN 201611030240A CN 106532912 A CN106532912 A CN 106532912A
- Authority
- CN
- China
- Prior art keywords
- switch pipe
- pmos switch
- pmos
- vbat
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/061—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for DC powered loads
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/068—Electronic means for switching from one power supply to another power supply, e.g. to avoid parallel connection
Abstract
The invention discloses a dynamic power path selection circuit of USB and battery dual-source power supply. VCC comes from output of a USB power source and VBAT comes from output of a battery power source. A VMAX voltage generation circuit can determine sizes of VCC voltages and VBAT voltages in real time and automatically selects a maximum value in the two as output. A VCC selection circuit generates digital logic capable of controlling a PM1 tube switch. A VBAT selection circuit generates digital logic capable of controlling a PM2 tube switch. A power path satisfying a power supply scene and a demand is selected through the two switches for a load circuit inside a chip, i.e., a unique power supply source is selected from the VCC or the VBAT. The integration of the circuit is facilitated, and the external material cost of a control type SOC energized by dual sources or multiple sources.
Description
Technical field
The present invention relates to field of power management, ((USB) and battery dual power supply are supplied more particularly to a kind of USB
The dynamic power supplies path selecting circuit of electricity.
Background technology
Control class SOC (system level chip) chip (inside carries microcontroller) common at present, the meeting in on-line Application
Powered using USB power source；And in mobile environment, then powered using battery.So chip will not only support that USB power source is powered,
But also to support that battery is powered.System needs to carry out both power supply supply paths dynamic in real time selection.In the past this two
The path management for planting power supply typically uses what discrete component was realized in PCB (printed circuit board) plates level, by chip exterior
Chip internal load circuit is selected to need the live electrical power for using plus switching on and shutting down button, diode and switching tube.So
The Material Cost of system integrator can be greatly increased.
With reference to shown in Fig. 1, USB that the outer discrete device of traditional piece is built and battery dual power supply path management circuit realiration
Function is that load supplying only is from when USB power source is effective (i.e. chip obtains electric energy from external equipment by USB interface)
In USB power source but regardless of now whether switching on and shutting down button is opened or whether battery has electricity；When invalid (the i.e. USB interface of USB power source
Disconnect or do not power), and if only if when external switch machine button is pressed, and load obtains the power supply for coming from battery.Such as Fig. 1
Shown, VCC is USB power source, and VBAT is battery supply.When VCC (USB power source) powers, Q1 pipes are by the conducting of Q3 pipes, Q2 pipes are led
Logical, no matter whether VBAT has electricity, and load supplying comes from VCC；When VCC power-off, the conducting of Q1 pipes, Q3 pipes are by whether Q2 pipes lead
It is logical whether to close depending on switching on and shutting down button SWE.When SWE is closed, then Q2 pipes conducting, VBAT powers to the load, while Power_
On signals are changed into high level.SWE is touch switch machine button, and button is automatically springed open through 5 milliseconds of meetings after pressing, and its behavior is not
The supply path of chip is affected to select.When system enters shutdown setting, SWE is pressed again, and Power_on signals are changed into low electricity
Flat, circuit enters off-mode, and load no longer receives VBAT and powers.Diode D1-D5 in circuit be used for do voltage domain every
From.USB and the dynamic power supplies path selecting circuit of battery dual power supply that outside traditional piece shown in Fig. 1, discrete device is built, adopt
With multiple discrete metal-oxide-semiconductors, resistance and diode component and a switching on and shutting down button, the material of SOC is considerably increased
Cost.
The content of the invention
The technical problem to be solved in the present invention is to provide the dynamic power supplies Path selection of a kind of USB and battery dual power supply
Circuit, is conducive to the integrated level of circuit, reduces the outside Material Cost of control class SOC of dual power supply and multiple feed.
To solve the dynamic power supplies path selecting circuit of above-mentioned technical problem, USB of the invention and battery dual power supply,
Including：
One VMAX voltage generation circuits, its input are connected with VCC ends and VBAT ends respectively, for real time discriminating VCC
With the size of VBAT voltages, the maximum in the two is automatically selected as output；Wherein, VCC comes from the output electricity of USB power source
Pressure, VBAT come from the output voltage of battery supply；VMAX represents voltage max；
One VCC selection circuits, its input are connected with the output end at VCC ends and VMAX voltage generation circuits respectively, are used
In the Digital Logic for producing control the first PMOS switch pipe PM1 switches；
One VBAT selection circuits, its input are connected with the output end of VMAX voltage generation circuits, for producing control
The Digital Logic of the second PMOS switch pipe PM2 pipes switch；
One first PMOS switch pipe PM1, its source electrode are connected with VCC ends, the output end of grid and the VCC selection circuits
It is connected；
One second PMOS switch pipe PM2, its source electrode are connected with VBAT ends, the output of grid and the VBAT selection circuits
End is connected；
The substrate of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2 is defeated with VMAX voltage generation circuits
Go out end to be connected；The drain electrode of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2 and one end of one first electric capacity C1
It is connected, the other end ground connection of first electric capacity C1；
Can be the negative of chip internal by the switching of the first PMOS switch pipe PM1 and the second PMOS switch pipe PM2
Carry circuit to select to meet the power source path of power supply scene and demand, i.e., a unique power supply electricity is selected from VCC or VBAT
Source.
The present invention realizes the function that power source path is selected using the integrated digital control logic of chip internal and switching tube,
The switching on and shutting down button outside a piece is only needed to, and does not use discrete device outside other pieces, changed traditional in chip exterior PCB
The selection of two and above power source path is realized using multiple discrete devices, the outside of many power supply SOCs of control class is reduced
Device requirement, greatly reduces the cost of system.
Description of the drawings
The present invention is further detailed explanation with specific embodiment below in conjunction with the accompanying drawings：
Fig. 1 is the dynamic power supplies path selecting circuit figure of the USB of traditional discrete device and battery dual power supply.
Fig. 2 is the dynamic power supplies path selecting circuit figure of improved integrated circuit USB and battery dual power supply.
Fig. 3 is the dynamic power supplies path selecting circuit figure of multiple feed.
Fig. 4 is the dynamic power supplies path selecting circuit logic control flow process using improved USB and battery dual power supply
Figure.
Fig. 5 is the one embodiment circuit theory diagrams of control circuit for realizing Fig. 4 logic control flow processs.
Fig. 6 is one embodiment circuit theory diagrams of VMAX voltage generation circuits in Fig. 2.
Fig. 7 is one embodiment circuit theory diagrams of low power consumption comparator in Fig. 6.
Fig. 8 is the one embodiment schematic diagram of low power consumption comparator biasing circuit of Fig. 7.
Specific embodiment
The present invention is implemented under CMOS technology.
When chip application is in the system of dual power supply, when being powered using USB power source, no matter switching on and shutting down button whether open or
Whether battery has electricity, only uses USB power source to be load supplying；And when USB power source is disconnected, then only in switching on and shutting down by bonded
In the case of logical, load could obtain the power supply from battery.Power for more than tactful, in the following embodiments using figure
2 circuit structure and the control logic flow process of Fig. 4, realize these functions in chip.
With reference to shown in Fig. 2, in the present embodiment, VCC comes from the output voltage of USB power source, and VBAT comes from electricity
The output voltage of pond power supply, VMAX voltage generation circuits can automatically select the two with the size of real time discriminating VCC and VBAT voltage
In maximum as output.VCC selection circuits produce the Digital Logic that can control the first PMOS switch pipe PM1 switches.
VBAT selection circuits produce the Digital Logic that can control the second PMOS switch pipe PM2 switches.First PMOS switch pipe PM1 and
The output end (being input into maximum voltage VMAX) for connecting VMAX voltage generation circuits is prevented from producing by the substrate of two PMOS switch pipe PM2
Raw electric leakage.Select to meet power supply scene and need by the load circuit that the switching of the two PMOS switch pipes can be chip internal
The power source path asked, i.e., select a unique power supply from VCC or VBAT.C1 is decoupling capacitance, can smooth VCC
Burr voltage when switching with VBAT.
Fig. 3 is the dynamic power supplies path selecting circuit structure diagram that multiple feed is extended to by Fig. 2, V1, V2 ..., Vn
Come from different power supplys to chip power supply, VMAX voltage generation circuits differentiate the voltage swing of n power supply, generation one is maximum
Threshold voltage VMAX be power selection circuit and PMOS switch pipe PM1, PM2 ... the substrate of PMn is powered.Power selection circuit is provided
PMOS switch pipe PM1, PM2 ... the control logic of PMn.By PMOS switch pipe PM1, PM2 ... the switch of PMn is electric from n
Select wherein to power for load circuit all the way in source, in synchronization, PMOS switch pipe PM1, PM2 ... can only have one in PMn
Individual pipe is opened, and remaining pipe is all closed.C1 is decoupling capacitance, can smooth burr voltage when multiple power supplys switch.N is
Integer more than 2.
Fig. 4 is the logic control flow process figure of the dynamic power supplies path selecting circuit using USB and battery dual power supply, this
The function that logic flow is realized is that, when USB power source is effective, load supplying only is from USB power source but regardless of now switching
Whether machine button is opened or whether battery has electricity；When USB power source power-off (i.e. USB interface disconnect or do not power), when and only
When external switch machine button is pressed, load obtains the power supply for coming from battery.After system enters initial state, initially judge
Whether the upper electrosemaphore position VCC flag of USB are 1 (high level), if high level then system enter USB power supply states, first
PMOS switch pipe PM1 is turned on, and the second PMOS switch pipe PM2 cut-offs, the upper electrosemaphore position VBAT flag of VBAT set to 0 (low level)；It is no
Then system enters battery-powered state, now continues to judge whether switching on and shutting down key flag bit on-off flag is 1, if on-
Off flag=1, then system boot, the first PMOS switch pipe PM1 cut-offs, the second PMOS switch pipe PM2 conductings, VBAT flag
Put 1；If on-off is flag=0, the first PMOS switch pipe PM1, the second PMOS switch pipe PM2 cut-off, system come back to out
Machine initial decision state；When on-off flag put height again, show that VBAT powers and enter off-mode, now a PMOS is opened
Pipe PM1, the second PMOS switch pipe PM2 cut-off is closed, VBAT flag set to 0；After VBAT normal power supplies, may proceed to judge VCC
Whether flag is high, and when VCC flag are 1, then to USB power supply states, PM1 is turned on the battery-powered state transition of system, PM2
Cut-off, VBAT flag set to 0.So move in circles.Delay200 μ s in Fig. 4, after representing that default postpones 200S, under continuation
One step judges.
Fig. 5 is the control circuit embodiment done according to Fig. 4 logic control flow process figures, and VCC is USB power supplies,
VBAT is battery power supply.
The VCC selection circuits, including：One electrification reset circuit SDF, one first digit buffer SH1, a delay circuit
YS, the first phase inverter FX1, the 3rd phase inverter FX3 and the 4th phase inverter FX4.
The VBAT selection circuits, including：One second phase inverter FX2, a switching on and shutting down button SW1, one or two inputs and door
AND, pull-up resistor R1, the second electric capacity C2, the second digit buffer SH2 and 1 select 1 circuit.
Whether electrification reset circuit SDF goes up electricity according to VCC, produces high level or low level, through a digital buffer
Device SH1 produces electrosemaphore position signal VCC flag on VCC and gives internal MCU logical process.Logic level Jing that VCC POR are produced
Cross delay circuit YS and postpone a period of time again by phase inverter FX1 the first PMOS switch pipe PM1 of control, the output of VCC POR is also
Control signal CTRL is produced by two phase inverters FX3, FX4 goes gating 2 to select 1 circuit XT.When CTRL is high level, second
PMOS switch pipe PM2 connects VMAX voltages, i.e. the second PMOS switch pipe PM2 shut-offs, and now the first PMOS switch pipe PM1 beats
Open, system enters USB power supply states；CTRL=0, the first PMOS switch pipe PM1 disconnect, and the second PMOS switch pipe PM2 is by switching
The Power_on signals that electrosemaphore position VBAT flag are produced through internal latency on machine button or VBAT, control.So working as
Switching on and shutting down button SW1 is closed or VBAT flag are 1, and the second PMOS switch pipe PM2 is opened, and VBAT powers to the load.Otherwise,
VBAT stops power supply, and system enters off-mode.When switching on and shutting down button SW1 is pressed, switching on and shutting down key flag bit on-
Off flag put 1.Pull-up resistors of the resistance R1 for switching on and shutting down button SW1, filter capacitors of the electric capacity C2 for switching on and shutting down button SW1,
The addition of electric capacity C2 can avoid the false triggering that switching on and shutting down button SW1 is caused due to electrostatic interference or shake.Work as battery in Fig. 5
During power supply, after SW1 is closed for the first time, Power_on=1, until SW1 is closed again, system cut-off, Power_on=0.
With reference to shown in Fig. 6, the VMAX voltage generation circuits include four PMOS switch pipes in the following embodiments
M29, M30, M3, M4, and a low power consumption comparator.The source electrode of the 29th PMOS switch pipe M29, the 3rd PMOS switch pipe M3
The grid of source electrode and the 4th PMOS switch pipe M4 is connected with the output voltage VCC ends of USB power source；30th PMOS switch pipe
The output voltage of the grid and battery supply of the source electrode of M30, the source electrode of the 4th PMOS switch pipe M4 and the 3rd PMOS switch pipe M3
VBAT ends are connected.The drain electrode of the 29th PMOS switch pipe M29, the drain electrode of the 30th PMOS switch pipe M30, the 3rd PMOS are opened
Close the maximum voltage VMAX output end phases of the drain electrode of pipe M3 and the drain electrode of the 4th PMOS switch pipe M4 and the low power consumption comparator
Connection.The input of the low power consumption comparator is input into the output voltage VCC and the output voltage of battery supply of USB power source respectively
VBAT.The low power consumption comparator exports the first control logic level SC1 and the second control logic level SC2；First control is patrolled
Collect level SC1 ends to be connected with the grid of the 29th PMOS switch pipe M29, the second control logic level SC2 and the 30th
The grid of PMOS switch pipe M30 is connected.
VMAX voltage generation circuits select the peak of voltage in VCC and VBAT as the power supply electricity of digital control circuit
Source.When the voltage of VCC is much larger than VBAT magnitudes of voltage, supply path of PMOS switch pipe M29, M3 conducting for VMAX；When the electricity of VCC
Pressure is much smaller than VBAT magnitudes of voltage, supply path of PMOS switch pipe M30, M4 conducting for VMAX；When VCC and VBAT magnitudes of voltage very
It is close to, then compares the voltage of VCC and VBAT by the low power consumption comparator in VMAX voltage generation circuits, produces control logic electricity
Flat SC1 and SC2 produces height control logic to select according to comparison voltage controlling the switch of PMOS switch pipe M29 and M30
Supply paths of the PMOS switch pipe M29 or M30 as VMAX, PMOS switch pipe M3, M4 are closed.
With reference to shown in Fig. 7, the low power consumption comparator is a differential comparator in the following embodiments, is a kind of typical case
Open loop comparator.Which includes：PMOS transistor M7-12, PMOS switch pipe M16, M18；Nmos pass transistor M5, M6, M13-15,
Nmos switch pipe M17, M19.7th PMOS transistor M7～the 12nd PMOS transistor M12, the 16th PMOS switch pipe M16 and
The source electrode of the 18th PMOS switch pipe M18 is connected, used as the maximum voltage VMAX output ends of low power consumption comparator；11st
The drain electrode of PMOS transistor M11 and the drain and gate of the 13rd nmos pass transistor M13, and the 14th nmos pass transistor M14
Grid be connected；The grid and drain electrode, the 7th PMOS of the grid and the 9th PMOS transistor M9 of the 11st PMOS transistor M11
The grid of the drain electrode of transistor M7, the drain electrode of the 5th nmos pass transistor M5 and the 8th PMOS transistor M8 is connected；7th
The drain electrode of the grid of PMOS transistor M7 and the 8th PMOS transistor M8, the grid of the tenth PMOS transistor M10 and drain electrode, the tenth
The grid of two PMOS transistors M12, the drain electrode of the 6th nmos pass transistor M6 are connected.The source electrode of the 5th nmos pass transistor M5,
The source electrode of six nmos pass transistor M6 is connected with the drain electrode of the 15th nmos pass transistor M15.The grid of the 5th nmos pass transistor M5
The output voltage VBAT of input battery supply, the grid of the 6th nmos pass transistor M6 are input into the output voltage VCC of USB power source.The
Grid input VB (current source bias voltage) of 15 nmos pass transistor M15.The drain electrode of the 12nd PMOS transistor M12, the tenth
The grid phase of the drain electrode of four nmos pass transistor M14, the grid of the 16th PMOS switch pipe M16 and the 17th nmos switch pipe M17
Connection.The drain electrode of the 16th PMOS switch pipe M16, the drain electrode of the 17th nmos switch pipe M17, the 18th PMOS switch pipe M18
Grid and the grid of the 19th nmos switch pipe M19 be connected；And as the output end of the first control logic level SC1.The
The drain electrode of 18 PMOS switch pipe M18 is connected with the drain electrode of the 19th nmos switch pipe M19, and as the second control logic electricity
The output end of flat SC2.The source electrode of the 13rd nmos pass transistor M15 of nmos pass transistor M13 to the 15th, the 17th nmos switch pipe
The source ground of the source electrode of M17 and the 19th nmos switch pipe M19.
5th nmos pass transistor M5 and the 6th nmos pass transistor M6 are main amplifier tubes, the 7th PMOS transistor M7 and the 9th
PMOS transistor M9, the 8th PMOS transistor M8 and the tenth PMOS transistor M10 these two pair load pipe can be produced for comparator
Certain hysteresis voltage window, to overcome because burr causes the saltus step back and forth of output voltage when comparing on power supply.13rd
The current mirror output of nmos pass transistor M13, the 14th nmos pass transistor M14 for comparator.16th PMOS switch pipe M16,
17 nmos switch pipe M17, the 18th PMOS switch pipe M18, the 19th nmos switch pipe M19 constitute two-stage phase inverter, contrast
The analog level relatively obtained compared with device carries out being converted to cmos digital logic level, anti-phase outputs of the wherein SC2 for SC1.Due to
The Main Function of VMAX voltage generation circuits is for the power digital logic circuitry in dynamic power supplies path selecting circuit, so base
In the demand for reducing power consumption, the comparator is typically designed as low consumption circuit.Wherein main method for designing is to reduce comparator
Bias current, i.e., mainly by reducing bias current that the 15th nmos pass transistor M15 provides realizing.
Fig. 8 is the low-power consumption biasing circuit of comparator, and this circuit produces VB voltages to control the bias current of comparator.With
Conventional Constant-g m biasing circuit difference is to be biased in linear zone to replace resistance by the 28th nmos pass transistor M28 pipes
The other electric current of na level is realized, can avoid reaching same effect and causing the waste of large-area chips using resistance.
The low-power consumption biasing circuit includes：One start-up circuit, the 24th to the 26th PMOS transistor M24 to M26,
20th to the 23rd nmos pass transistor M20 to M23, and the 27th nmos pass transistor M27 and the 28th NMOS is brilliant
Body pipe M28.
The source electrode of the 24th to the 26th PMOS transistor M24 to M26 is connected with start-up circuit, then low with described
The maximum voltage VMAX output ends of power consumption comparer are connected.The grid of the 24th to the 26th PMOS transistor M24 to M26
The drain electrode of pole and the 25th PMOS transistor M25, the drain electrode of the 23rd nmos pass transistor M23 and start-up circuit are connected.
The drain electrode of the 24th PMOS transistor M24, the drain and gate of the 20th bi-NMOS transistor M22, the 23rd NMOS are brilliant
The grid of body pipe M23 is connected, and is then connected with start-up circuit again.The source electrode and second of the 20th bi-NMOS transistor M22
The grid of ten nmos pass transistor M20, the grid of the 21st nmos pass transistor M21 are connected.23rd nmos pass transistor M23
Source electrode be connected with the drain electrode of the 21st nmos pass transistor M21.The source electrode and the 20th of the 21st nmos pass transistor M21
The drain electrode of eight nmos pass transistor M28 is connected.The drain electrode of the 26th PMOS transistor M26 and the 27th nmos pass transistor
The grid of M27 is connected with the grid of drain electrode, the 28th nmos pass transistor M28.The source electrode of the 20th nmos pass transistor M20,
The source ground of the source electrode and the 28th nmos pass transistor M28 of the 27th nmos pass transistor M27.
Although the present invention is illustrated using specific embodiment, the explanation to embodiment is not intended to limit the present invention's
Scope.Explanation of the one skilled in the art by reference to the present invention, without departing substantially from the spirit and scope of the present invention
In the case of, easily carry out various modifications or embodiment can be combined.
Claims (9)
1. the dynamic power supplies path selecting circuit of a kind of USB and battery dual power supply, it is characterised in that include：
One VMAX voltage generation circuits, its input are connected with VCC ends and VBAT ends respectively, for real time discriminating VCC and
The size of VBAT voltages, automatically selects the maximum in the two as output；Wherein, VCC comes from the output electricity of USB power source
Pressure, VBAT come from the output voltage of battery supply；VMAX represents voltage max；
One VCC selection circuits, its input are connected with the output end at VCC ends and VMAX voltage generation circuits respectively, for producing
The Digital Logic that the first PMOS switch pipe (PM1) of raw control is switched；
One VBAT selection circuits, its input are connected with the output end of VMAX voltage generation circuits, for producing control second
The Digital Logic that PMOS switch pipe (PM2) is switched；
One first PMOS switch pipe (PM1), its source electrode are connected with VCC ends, the output end phase of grid and the VCC selection circuits
Connection；
One second PMOS switch pipe (PM2), its source electrode are connected with VBAT ends, the output end of grid and the VBAT selection circuits
It is connected；
The substrate of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2) is defeated with VMAX voltage generation circuits
Go out end to be connected；The drain electrode of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2) and one first electric capacity (C1)
One end be connected, the other end of first electric capacity (C1) ground connection；
By the switching of the first PMOS switch pipe (PM1) and the second PMOS switch pipe (PM2), it can be the load of chip internal
Circuit selects the power source path for meeting power supply scene and demand, i.e., a unique power supply is selected from VCC or VBAT.
2. dynamic power supplies path selecting circuit as claimed in claim 1, it is characterised in that：After system enters initial state, first
Judge whether VCC flag in electrosemaphore position are 1 on USB, if VCC flag=1 system enter USB power supply states, first
PMOS switch pipe (PM1) is turned on, and the cut-off of the second PMOS switch pipe (PM2), the upper electrosemaphore position VBAT flag of VBAT set to 0；Otherwise it is
System enters battery-powered state, now continues to judge whether switching on and shutting down key flag bit on-off flag is 1, if on-off
Flag=1, then system boot, the cut-off of the first PMOS switch pipe (PM1), the conducting of the second PMOS switch pipe (PM2), VBAT flag
Put 1；If on-off is flag=0, the first PMOS switch pipe (PM1), the cut-off of the second PMOS switch pipe (PM2), system are returned again
To start initial decision state；When on-off flag put height again, show that VBAT powers and enter off-mode, now first
PMOS switch pipe (PM1), the cut-off of the second PMOS switch pipe (PM2), VBAT flag set to 0；After VBAT normal power supplies, may proceed to
Judge that whether VCC flag are high, when VCC flag are 1, then the battery-powered state transition of system is to USB power supply states, first
PMOS switch pipe (PM1) is turned on, and the cut-off of the second PMOS switch pipe (PM2), VBAT flag set to 0：So move in circles.
3. dynamic power supplies path selecting circuit as claimed in claim 1, it is characterised in that the VMAX voltage generation circuits,
Including four PMOS switch pipes (M29, M30, M3, M4), and a low power consumption comparator；29th PMOS switch pipe (M29)
The output voltage VCC of the grid and USB power source of source electrode, the source electrode of the 3rd PMOS switch pipe (M3) and the 4th PMOS switch pipe (M4)
End is connected；The source electrode of the 30th PMOS switch pipe (M30), the source electrode of the 4th PMOS switch pipe (M4) and the 3rd PMOS switch pipe
(M3) grid is connected with the output voltage VBAT ends of battery supply；The drain electrode of the 29th PMOS switch pipe (M29), the 3rd
Drain electrode, the drain electrode of the 3rd PMOS switch pipe (M3) and the drain electrode of the 4th PMOS switch pipe (M4) of ten PMOS switch pipes (M30) with
The maximum voltage VMAX output ends of the low power consumption comparator are connected；
The input of the low power consumption comparator is input into the output voltage VCC and the output voltage of battery supply of USB power source respectively
VBAT；
The low power consumption comparator exports the first control logic level (SC1) and the second control logic level (SC2)；First control
Logic level (SC1) end be connected with the grid of the 29th PMOS switch pipe (M29), the second control logic level (SC2) and
The grid of the 30th PMOS switch pipe (M30) is connected.
4. dynamic power supplies path selecting circuit as claimed in claim 3, it is characterised in that：When the voltage of VCC is much smaller than VBAT
Magnitude of voltage, the 30th PMOS switch pipe (M30), the supply path that the conducting of the 4th PMOS switch pipe (M4) is VMAX；When VCC with
VBAT magnitudes of voltage are close to, then compare the voltage of VCC and VBAT by the low power consumption comparator in VMAX voltage generation circuits, produce
First control logic level (SC1) and the second control logic level (SC2) are controlling the 29th PMOS switch pipe (M29) and
The switch of 30 PMOS switch pipes (M30), produces height control logic to select the 29th PMOS switch according to comparison voltage
The supply path of pipe (M29) or the 30th PMOS switch pipe (M30) as VMAX, the 3rd PMOS switch pipe (M3), the 4th
PMOS switch pipe (M4) is closed.
5. dynamic power supplies path selecting circuit as claimed in claim 3, it is characterised in that：
The low power consumption comparator is a differential comparator, including：PMOS transistor M7-12, PMOS switch pipe M16, M18；
Nmos pass transistor M5, M6, M13-15, nmos switch pipe M17, M19；
7th PMOS transistor (M7)～the 12nd PMOS transistor (M12), the 16th PMOS switch pipe (M16) and the 18th
The source electrode of PMOS switch pipe (M18) is connected, used as the maximum voltage VMAX output ends of low power consumption comparator；11st PMOS is brilliant
The drain electrode of body pipe (M11) and the drain and gate of the 13rd nmos pass transistor (M13), and the 14th nmos pass transistor (M14)
Grid be connected；The grid of the grid and the 9th PMOS transistor (M9) of the 11st PMOS transistor (M11) and drain electrode, the 7th
The grid phase of the drain electrode of PMOS transistor (M7), the drain electrode of the 5th nmos pass transistor (M5) and the 8th PMOS transistor (M8)
Connection；The drain electrode of the grid and the 8th PMOS transistor (M8) of the 7th PMOS transistor (M7), the tenth PMOS transistor (M10)
The drain electrode of grid and drain electrode, the grid of the 12nd PMOS transistor (M12), the 6th nmos pass transistor (M6) is connected；
The source electrode of the 5th nmos pass transistor (M5), the source electrode of the 6th nmos pass transistor (M6) and the 15th nmos pass transistor (M15)
Drain electrode be connected；The grid of the 5th nmos pass transistor (M5) is input into the output voltage VBAT of battery supply, the 6th NMOS crystal
The grid of pipe (M6) is input into the output voltage VCC of USB power source；The grid input VB of the 15th nmos pass transistor (M15)；12nd
The drain electrode of PMOS transistor (M12), the drain electrode of the 14th nmos pass transistor (M14), the grid of the 16th PMOS switch pipe (M16)
It is connected with the grid of the 17th nmos switch pipe (M17)；The drain electrode of the 16th PMOS switch pipe (M16), the 17th NMOS are opened
The grid for closing the drain electrode, the grid of the 18th PMOS switch pipe (M18) and the 19th nmos switch pipe (M19) of pipe (M17) is connected
Connect；And as the output end of the first control logic level (SC1)；The drain electrode and the 19th of the 18th PMOS switch pipe (M18)
The drain electrode of nmos switch pipe (M19) is connected, and as the output end of the second control logic level (SC2).13rd NMOS is brilliant
Source electrode of the body pipe (M13) to the 15th nmos pass transistor (M15), the source electrode and the 19th of the 17th nmos switch pipe (M17)
The source ground of nmos switch pipe (M19).
6. dynamic power supplies path selecting circuit as claimed in claim 5, it is characterised in that：
Also include a biasing circuit, for producing VB voltages, control the bias current of the low power consumption comparator；Which includes：One
Start-up circuit, the 24th to the 26th PMOS transistor (M24 to M26), the 20th to the 23rd nmos pass transistor
(M20 to M23), and the 27th nmos pass transistor (M27) and the 28th nmos pass transistor (M28)；
The source electrode of the 24th to the 26th PMOS transistor (M24 to M26) is connected with start-up circuit, then with the low work(
The maximum voltage VMAX output ends of consumption comparator are connected；The grid of the 24th to the 26th PMOS transistor (M24 to M26)
The drain electrode of pole and the 25th PMOS transistor (M25), the drain electrode of the 23rd nmos pass transistor (M23) and start-up circuit are connected
Connect；The drain electrode of the 24th PMOS transistor (M24), the drain and gate of the 20th bi-NMOS transistor (M22), the 23rd
The grid of nmos pass transistor (M23) is connected, and is then connected with start-up circuit again；20th bi-NMOS transistor (M22)
Source electrode is connected with the grid of the 20th nmos pass transistor (M20), the grid of the 21st nmos pass transistor (M21)；20th
The source electrode of three nmos pass transistors (M23) is connected with the drain electrode of the 21st nmos pass transistor (M21)；21st NMOS crystal
(source electrode of M21 is connected pipe with the drain electrode of the 28th nmos pass transistor (M28)；The leakage of the 26th PMOS transistor (M26)
Pole is connected with the grid and drain electrode, the grid of the 28th nmos pass transistor (M28) of the 27th nmos pass transistor (M27)；
The source electrode of the 20th nmos pass transistor (M20), the source electrode of the 27th nmos pass transistor (M27) and the 28th nmos pass transistor
(M28) source ground.
7. dynamic power supplies path selecting circuit as claimed in claim 1, it is characterised in that：The VCC selection circuits, including：
Whether one electrification reset circuit, go up electricity according to VCC, produces high level or low level；
One first digit buffer, is connected with the electrification reset circuit, for producing electrosemaphore position signal on VCC；
One delay circuit, its input are connected with the output end of the electrification reset circuit, its output end and the first phase inverter
Input be connected, the output end of first phase inverter is connected with the grid of the first PMOS switch pipe (PM1)；The upper electricity
The logic level that reset circuit is produced is after delay circuit postpones a period of time, then the is controlled after the first inverter
One PMOS switch pipe (PM1)；
One the 3rd phase inverter, its input are connected with the output end of the electrification reset circuit, and its output end is anti-phase with the 4th
The input of device is connected；The logic level that the electrification reset circuit is produced is through the 3rd phase inverter and the 4th inverter
After produce gate control signal.
8. dynamic power supplies path selecting circuit as claimed in claim 7, it is characterised in that：The VBAT selection circuits, including：
One second phase inverter, its input input signal Power_on, the Power_on signals are by electrosemaphore position on VBAT
VBAT flag postpone the signal for producing through chip internal, when battery is powered, after switching on and shutting down button is closed for the first time,
Power_on=1, until switching on and shutting down button is closed again, system cut-off, Power_on=0；
One or two inputs and door, one input end are connected with the output end of second phase inverter, another input with it is described
The other end of switching on and shutting down button, one end of the second electric capacity, one end of pull-up resistor are connected with the input of the second digit buffer
Connect, the other end ground connection of the second electric capacity, the other end of pull-up resistor are connected with the source electrode of the second PMOS switch pipe (PM2), the
The output end output switch machine key flag bit signal of two digit buffers；
One 2 select 1 circuit, one input end to be connected with the output end of door with described, another input input voltage maximum
VMAX, its gating control end input gate control signal；Its output end is connected with the grid of the second PMOS switch pipe (PM2)；
The second PMOS switch pipe (PM2) is controlled by switching on and shutting down button or power on signals；When switching on and shutting down button is closed
Or VBAT flag are 1, the second PMOS switch pipe (PM2) is opened, and VBAT powers to the load；Otherwise, VBAT stops power supply, and is
System enters off-mode；When switching on and shutting down button is pressed, switching on and shutting down key flag bit on-off flag puts 1.
9. the dynamic power supplies path selecting circuit of a kind of multiple feed, it is characterised in that include：
Multiple PMOS switch pipes, be designated as respectively PM1, PM2 ... PMn, VMAX voltage generation circuits, a power selection circuit；
V1, V2 ..., Vn be from different power supplys to chip power supply, VMAX voltage generation circuits differentiate V1, V2 ..., Vn it is electric
The voltage swing in source, produce maximum value voltage VMAX be power selection circuit and PMOS switch pipe PM1, PM2 ... PMn's
Substrate is powered；
Power selection circuit provide PMOS switch pipe PM1, PM2 ... the control logic of PMn；By PMOS switch pipe PM1,
PM2 ... the switch of PMn from V1, V2 ..., select wherein to power for load circuit all the way in Vn power supplys, in synchronization,
PMOS switch pipe PM1, PM2 ... can only have switching tube to open in PMn, remaining switching tube is all closed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611030240.1A CN106532912B (en) | 2016-11-16 | 2016-11-16 | The dynamic power supplies path selecting circuit of USB and battery dual power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611030240.1A CN106532912B (en) | 2016-11-16 | 2016-11-16 | The dynamic power supplies path selecting circuit of USB and battery dual power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106532912A true CN106532912A (en) | 2017-03-22 |
| CN106532912B CN106532912B (en) | 2019-01-25 |
Family
ID=58352901
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611030240.1A Active CN106532912B (en) | 2016-11-16 | 2016-11-16 | The dynamic power supplies path selecting circuit of USB and battery dual power supply |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106532912B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107204642A (en) * | 2017-05-23 | 2017-09-26 | 红河学院 | The method of supplying power to and device of flowmeter radio meter register instrument |
| CN107395170A (en) * | 2017-08-18 | 2017-11-24 | 无锡力芯微电子股份有限公司 | Power selection circuit |
| CN108259030A (en) * | 2017-09-11 | 2018-07-06 | 杰夫微电子（四川）有限公司 | A kind of switching device automatically according to input selection power path |
| CN111224657A (en) * | 2019-12-25 | 2020-06-02 | 曙光信息产业(北京)有限公司 | Power supply switching circuit of computer USB port |
| CN111555427A (en) * | 2020-06-05 | 2020-08-18 | 电子科技大学 | Double-source energy management circuit with double-energy-source input |
| CN114583824A (en) * | 2022-05-05 | 2022-06-03 | 北京紫光青藤微系统有限公司 | Power switch selection circuit |
| US11799311B2 (en) | 2019-08-21 | 2023-10-24 | Power Integrations, Inc. | Current sharing for multi-output charging device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030133263A1 (en) * | 2002-01-17 | 2003-07-17 | H.L.L. Investment, Ltd. | Uninterruptible power supply (UPS) with built-in USB hub |
| CN1960110A (en) * | 2005-11-01 | 2007-05-09 | 中兴通讯股份有限公司 | Method and device for switching supply power and protecting batteries |
| CN102263434A (en) * | 2010-05-26 | 2011-11-30 | 飞兆半导体公司 | VBUS power switch |
| CN102468684A (en) * | 2010-11-11 | 2012-05-23 | 三星半导体(中国)研究开发有限公司 | Switching control circuit for switching power supply between universal serial bus (USB) power source and battery |
| CN102769447A (en) * | 2012-07-12 | 2012-11-07 | 东南大学 | Fully-differential high-speed low-power-consumption comparator |
-
2016
- 2016-11-16 CN CN201611030240.1A patent/CN106532912B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030133263A1 (en) * | 2002-01-17 | 2003-07-17 | H.L.L. Investment, Ltd. | Uninterruptible power supply (UPS) with built-in USB hub |
| CN1960110A (en) * | 2005-11-01 | 2007-05-09 | 中兴通讯股份有限公司 | Method and device for switching supply power and protecting batteries |
| CN102263434A (en) * | 2010-05-26 | 2011-11-30 | 飞兆半导体公司 | VBUS power switch |
| CN102468684A (en) * | 2010-11-11 | 2012-05-23 | 三星半导体(中国)研究开发有限公司 | Switching control circuit for switching power supply between universal serial bus (USB) power source and battery |
| CN102769447A (en) * | 2012-07-12 | 2012-11-07 | 东南大学 | Fully-differential high-speed low-power-consumption comparator |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107204642A (en) * | 2017-05-23 | 2017-09-26 | 红河学院 | The method of supplying power to and device of flowmeter radio meter register instrument |
| CN107395170A (en) * | 2017-08-18 | 2017-11-24 | 无锡力芯微电子股份有限公司 | Power selection circuit |
| CN108259030A (en) * | 2017-09-11 | 2018-07-06 | 杰夫微电子（四川）有限公司 | A kind of switching device automatically according to input selection power path |
| US11799311B2 (en) | 2019-08-21 | 2023-10-24 | Power Integrations, Inc. | Current sharing for multi-output charging device |
| CN111224657A (en) * | 2019-12-25 | 2020-06-02 | 曙光信息产业(北京)有限公司 | Power supply switching circuit of computer USB port |
| CN111555427A (en) * | 2020-06-05 | 2020-08-18 | 电子科技大学 | Double-source energy management circuit with double-energy-source input |
| CN111555427B (en) * | 2020-06-05 | 2023-05-26 | 电子科技大学 | Dual-source energy management circuit with dual-energy source input |
| CN114583824A (en) * | 2022-05-05 | 2022-06-03 | 北京紫光青藤微系统有限公司 | Power switch selection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106532912B (en) | 2019-01-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106532912B (en) | The dynamic power supplies path selecting circuit of USB and battery dual power supply | |
| CN102291109B (en) | Power-on reset circuit of digital integrated circuit supplied with power by chip internal regulator | |
| CN205017207U (en) | Switching on and shutting down control circuit and switching power supply | |
| CN107835006A (en) | Low-power consumption electrification reset power-off reset circuit | |
| CN208508605U (en) | A kind of main secondary power switching circuit | |
| WO2021143448A1 (en) | Key wake-up circuit and electronic device | |
| CN103199842A (en) | Key control circuit for single-battery power supply system | |
| CN104917982A (en) | Standby circuit and television set with same | |
| CN101577537B (en) | Relaxation oscillator | |
| CN109245276A (en) | Guarantee not power down power circuit and the method being integrated in microcontroller chip | |
| CN105958632B (en) | A kind of power supply switch circuit and signal transfer method | |
| CN100553143C (en) | The N trap potential switching circuit | |
| CN205753623U (en) | A kind of power supply switch circuit | |
| CN104410403B (en) | Twin voltage sub-threshold level converter | |
| CN204795336U (en) | Stand -by circuit and have TV set of this circuit | |
| CN107908220A (en) | A kind of generating circuit from reference voltage suitable for wide power voltage scope | |
| CN203086434U (en) | Key control circuit for single-battery power supply system | |
| CN114756078B (en) | High-precision voltage-stabilizing power supply circuit of integrated circuit chip | |
| CN109412436A (en) | A kind of synchronous rectification control chip and circuit | |
| CN205263697U (en) | Take recoverable low -power consumption voltage reference source of replying position by cable | |
| CN207588827U (en) | A kind of self-locking power switch device | |
| CN206594557U (en) | A kind of power supply circuit and electronic equipment for electronic equipment | |
| CN109586698A (en) | A kind of electrification reset circuit | |
| CN101667740B (en) | Output driving circuit in lithium battery charge and discharge protective chip | |
| CN205121403U (en) | Supplementary LDO circuit and switching supply circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |