CN106517082B - A kind of graphical preparation method of MEMS getters - Google Patents

A kind of graphical preparation method of MEMS getters Download PDF

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Publication number
CN106517082B
CN106517082B CN201610998157.7A CN201610998157A CN106517082B CN 106517082 B CN106517082 B CN 106517082B CN 201610998157 A CN201610998157 A CN 201610998157A CN 106517082 B CN106517082 B CN 106517082B
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China
Prior art keywords
silicon
mask pattern
cavity
mask
passivation layer
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CN201610998157.7A
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CN106517082A (en
Inventor
刘磊
陈博
喻磊
王帆
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Anhui North Microelectronics Research Institute Group Co ltd
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North Electronic Research Institute Anhui Co., Ltd.
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00277Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
    • B81C1/00285Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS using materials for controlling the level of pressure, contaminants or moisture inside of the package, e.g. getters

Abstract

The present invention discloses a kind of graphical preparation method of MEMS getters, comprises the following steps:Silicon block is made, and wafer scale bonding ring is made in silicon block top surface;Mask pattern in silicon base, making is taken, upper mask pattern is identical with the cavity pattern of silicon block;Lower mask pattern is made, lower mask pattern and upper mask pattern are staggered;It is two-sided to silicon base progress to logical corrosion using KOH techniques in upper mask pattern position and lower mask pattern position, obtain the stereo mask being adapted with silicon cap cavity;Stereo mask is embedded in silicon block using self-registered technology, MEMS getters are prepared in silicon cap cavity bottom;Stereo mask is removed, the preparation of graphical Fe Getter Films Prepared is completed;Without extra Alignment Process and stationary fixture, preparation cost is greatly reduced;And when depositing getter, it can effectively control the figure of silicon cap cavity bottom to spread, it is to avoid to be bonded ring around Fe Getter Films Prepared pollution silicon cap cavity, the service behaviour of device getter is greatly improved.

Description

A kind of graphical preparation method of MEMS getters
Technical field
The present invention relates to micro-electronic mechanical skill field, specifically a kind of graphical preparation method of MEMS getters.
Background technology
MEMS(Micro Electro-Mechanical Systems,MEMS)Be with microelectronics, micromechanics with And based on material science, the micro device of research, design, manufacture with specific function, including microsensor, microactrator Many advantages, such as there is small volume, lightweight, low in energy consumption, mass production Deng, MEMS.
Vacuum directly affects device performance in device after the MEMS wafer-level vacuum package such as accelerometer, gyro Stability and reliability.At present, the method for vacuum being kept inside MEMS is to prepare Fe Getter Films Prepared in device block. Fe Getter Films Prepared for MEMS wafer level packagings has highly porous and good mechanical stability, meanwhile, in order to ensure MEMS is operated effectively under adverse circumstances, and Fe Getter Films Prepared is also needed to substrate with preferable adhesion.For The getter preparation method of MEMS Vacuum Packages is mainly magnetron sputtering technique or evaporation technology, air-breathing prepared by magnetron sputtering method Agent film has higher film-forming accuracy, and thickness is generally hundreds of nanometers to several microns.
Because Fe Getter Films Prepared needs to prepare in the block of MEMS wafer scale level Vacuum Package, conventional getter Film patterning method is stripping method(lift off)And mask method(shadow mask).Deep chamber stripping technology can para-linkage face Damage is caused, can influence subsequently to be bonded processing quality;And there is alignment control, mask clamping, deep chamber bottom diagram in conventional mask method The problems such as bonding environmental pollution contaminates around shape diffusion and deep chamber.
The content of the invention
It is an object of the invention to provide a kind of graphical preparation method of MEMS getters, this method can avoid para-linkage Face pollutes and damaged, it is ensured that postorder bonding quality, in addition, the figure diffusion of block deep bottom of chamber portion can be controlled effectively, realizes More preferable MEMS wafer level Vacuum Package.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of graphical preparation method of MEMS getters, comprises the following steps:
S1, the cavity pattern for meeting design requirement using photoetching process making on a silicon substrate, retain photoetching process in silicon The passivation layer of substrate surface formation;
S2, using KOH techniques cavity pattern position corrode silicon substrate, formed cavity;
S3, the passivation layer removed on silicon substrate, obtain silicon block;
S4, silicon block top surface make wafer scale bonding ring;
S5, silicon base is taken, mask pattern, upper mask pattern and cavity figure are made using photoetching process in silicon base top surface Shape is identical, retains the upper passivation layer that photoetching process is formed in silicon base top surface;
S6, using KOH techniques upper mask pattern position corrode silicon base, formed upper cavity;
S7, the mask pattern in the case where silicon base bottom surface is using photoetching process making, lower mask pattern intersect with upper mask pattern Mistake, retains the lower passivation layer that photoetching process is formed in silicon base bottom surface;
S8, using KOH techniques in upper mask pattern position and lower mask pattern position, silicon base is carried out two-sided to logical corruption Erosion, corrosion stops to during lower passivation layer;
Passivation layer and lower passivation layer on S9, removal, obtain the stereo mask being adapted with silicon cap cavity;Stereo mask Thickness is the depth of the upper cavity;
S10, using self-registered technology by stereo mask be embedded in silicon cap cavity, using physical gas-phase deposition in silicon lid Cap cavity bottom prepares MEMS getters;
S11, stereo mask removed from silicon block, complete the preparation of graphical Fe Getter Films Prepared.
The beneficial effects of the invention are as follows:
Give up traditional plane mask, will using self-registered technology using the stereo mask being adapted with silicon cap cavity Stereo mask is closely embedded in silicon cap cavity, without extra Alignment Process and stationary fixture, greatly reduces preparation cost; And when depositing getter, it can effectively control the figure of silicon cap cavity bottom to spread, it is to avoid Fe Getter Films Prepared pollutes silicon Ring is bonded around cap cavity, the service behaviour of device getter is greatly improved;In addition, the preparation tool of this method stereo mask There is higher uniformity and reliability, technique is easily achieved, is easy to be extended and applied.
Brief description of the drawings
The present invention is further described with reference to the accompanying drawings and examples:
Fig. 1 is step S1 of the present invention schematic diagram;
Fig. 2 is step S2 of the present invention schematic diagram;
Fig. 3 is step S3 of the present invention schematic diagram;
Fig. 4 is step S4 of the present invention schematic diagram;
Fig. 5 is step S5 of the present invention schematic diagram;
Fig. 6 is step S6 of the present invention schematic diagram;
Fig. 7 is step S7 of the present invention schematic diagram;
Fig. 8 is step S8 of the present invention schematic diagram;
Fig. 9 is step S9 of the present invention schematic diagram;
Figure 10 is step S10 of the present invention schematic diagram;
Figure 11 is step S11 of the present invention schematic diagram.
Embodiment
The present invention provides a kind of graphical preparation method of MEMS getters, comprises the following steps:
S1, as shown in figure 1, being made on silicon substrate 1 using photoetching process meet the cavity pattern 2 of design requirement, retain The passivation layer 3 that photoetching process is formed in the top surface of silicon substrate 1;
S2, with reference to shown in Fig. 2, using KOH techniques cavity pattern 2 position corrode silicon substrate 1, formed cavity 4;
S3, with reference to shown in Fig. 3, remove silicon substrate 1 on passivation layer 3, obtain silicon block 5;
S4, with reference to shown in Fig. 4, the top surface of silicon block 5 make wafer scale bonding ring 6;
S5, with reference to shown in Fig. 5, take silicon base 7, the top surface of silicon base 7 using photoetching process make on mask pattern 8, on Mask pattern 8 is identical with cavity pattern 2, retains the upper passivation layer 9 that photoetching process is formed in the top surface of silicon base 7;
S6, with reference to shown in Fig. 6, using KOH techniques upper mask pattern 8 position corrode silicon base 7, formed upper cavity 10;
S7, with reference to shown in Fig. 7, the bottom surface of silicon base 7 using photoetching process make under mask pattern 11, lower mask pattern 11 It is staggered with upper mask pattern 8, retain the lower passivation layer 12 that photoetching process is formed in the bottom surface of silicon base 7;
S8, with reference to shown in Fig. 8, using KOH techniques in the upper position of mask pattern 8 and the lower position of mask pattern 11, to silicon substrate Bottom 7 carries out two-sided to logical corrosion, corrosion to stopping during lower passivation layer 12;
S9, with reference to shown in Fig. 9, passivation layer 9 and lower passivation layer 12 in removal, are obtained and that silicon cap cavity 4 is adapted is vertical Body mask 13;The thickness of stereo mask 13 is the depth of the upper cavity 10;
S10, with reference to shown in Figure 10, stereo mask 13 is embedded in silicon cap cavity 4 using self-registered technology, using physics gas Phase depositing operation prepares MEMS getters in the bottom of silicon cap cavity 4;
S11, with reference to shown in Figure 11, stereo mask 13 is removed from silicon block 5, the system of graphical Fe Getter Films Prepared 14 is completed It is standby.
The above described is only a preferred embodiment of the present invention, not making any formal limitation to the present invention;Appoint What those skilled in the art, without departing from the scope of the technical proposal of the invention, all using the side of the disclosure above Method and technology contents make many possible variations and modification to technical solution of the present invention, or are revised as the equivalent reality of equivalent variations Apply example.Therefore, every content without departing from technical solution of the present invention, the technical spirit according to the present invention is done to above example Any simple modification, equivalent substitution, equivalence changes and modification, still fall within technical solution of the present invention protection in the range of.

Claims (1)

1. a kind of graphical preparation method of MEMS getters, it is characterised in that comprise the following steps:
S1, the cavity pattern for meeting design requirement using photoetching process making on a silicon substrate, retain photoetching process in silicon substrate The passivation layer of top surface formation;
S2, using KOH techniques cavity pattern position corrode silicon substrate, formed cavity;
S3, the passivation layer removed on silicon substrate, obtain silicon block;
S4, silicon block top surface make wafer scale bonding ring;
S5, silicon base is taken, mask pattern, upper mask pattern and cavity pattern phase are made using photoetching process in silicon base top surface Together, the upper passivation layer that photoetching process is formed in silicon base top surface is retained;
S6, using KOH techniques upper mask pattern position corrode silicon base, formed upper cavity;
S7, the mask pattern in the case where silicon base bottom surface is using photoetching process making, lower mask pattern and upper mask pattern are staggered, protect The lower passivation layer for staying photoetching process to be formed in silicon base bottom surface;
S8, using KOH techniques in upper mask pattern position and lower mask pattern position, silicon base is carried out it is two-sided to logical corrosion, Corrosion stops to during lower passivation layer;
Passivation layer and lower passivation layer on S9, removal, obtain the stereo mask being adapted with silicon cap cavity;Stereo mask horizontal part The thickness divided is the depth of the upper cavity;
S10, using self-registered technology stereo mask is embedded in silicon cap cavity, it is empty in silicon block using physical gas-phase deposition Bottom of chamber portion prepares MEMS getters;
S11, stereo mask removed from silicon block, complete the preparation of graphical Fe Getter Films Prepared.
CN201610998157.7A 2016-11-14 2016-11-14 A kind of graphical preparation method of MEMS getters Active CN106517082B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101291873A (en) * 2005-12-06 2008-10-22 工程吸气公司 Process for manufacturing micromechanical devices containing a getter material and devices so manufactured
CN102275863A (en) * 2010-06-08 2011-12-14 北京广微积电科技有限公司 Wafer-level vacuum encapsulating method for micro-electromechanical device
CN205262665U (en) * 2015-06-22 2016-05-25 意法半导体股份有限公司 Pressure sensor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6969635B2 (en) * 2000-12-07 2005-11-29 Reflectivity, Inc. Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
JP5298047B2 (en) * 2010-02-26 2013-09-25 日立オートモティブシステムズ株式会社 Manufacturing method of composite sensor
CN105428256B (en) * 2014-07-30 2018-07-20 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method and electronic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101291873A (en) * 2005-12-06 2008-10-22 工程吸气公司 Process for manufacturing micromechanical devices containing a getter material and devices so manufactured
CN102275863A (en) * 2010-06-08 2011-12-14 北京广微积电科技有限公司 Wafer-level vacuum encapsulating method for micro-electromechanical device
CN205262665U (en) * 2015-06-22 2016-05-25 意法半导体股份有限公司 Pressure sensor

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Address after: No. 2016, Tanghe Road, economic development zone, Bengbu City, Anhui Province 233030

Patentee after: Anhui North Microelectronics Research Institute Group Co.,Ltd.

Address before: No. 2016, Tanghe Road, economic development zone, Bengbu City, Anhui Province 233030

Patentee before: NORTH ELECTRON RESEARCH INSTITUTE ANHUI Co.,Ltd.