CN106517082A - Graphical preparation method for MEMS getter - Google Patents

Abstract

The invention discloses a graphical preparation method for an MEMS getter. The method comprises the following steps of preparing a silicon cap and preparing a wafer level bonding ring on the top surface of the silicon cap; taking a silicon substrate and preparing an upper mask pattern, wherein the upper mask pattern is the same as a cavity pattern of the silicon cap; preparing a lower mask pattern, wherein the lower mask pattern and the upper mask pattern are interleaved; utilizing a KOH process to carry out double-faced through corrosion on the silicon substrate at the position of the upper mask pattern and the position of the lower mask pattern in order to obtain a stereoscopic mask matched with the cavity of the silicon cap; utilizing a self-aligning process to embed the stereoscopic mask into the silicon cap and preparing the MEMS getter at the bottom of the cavity of the silicon cap; and taking the stereoscopic mask down to complete preparation of a graphical getter film. The method does not need additional aligning process and fixed clamp, so that the preparation cost is greatly reduced; and when the getter is deposited, the diffusion of the pattern at the bottom of the cavity of the silicon cap can be effectively controlled, the getter film cannot pollute the bonding ring at the periphery of the cavity of the silicon cap, and the working performance of the device getter is greatly improved.

Description

A kind of graphical preparation method of MEMS getteies

Technical field

The present invention relates to micro-electronic mechanical skill field, the graphical preparation method of specifically a kind of MEMS getteies.

Background technology

MEMS（Micro Electro-Mechanical Systems,MEMS）Be with microelectronics, micromechanics with And based on material science, research, design, micro device of the manufacture with specific function, including microsensor, microactrator Deng MEMS has many advantages, such as small volume, lightweight, low in energy consumption, mass production.

After the MEMS wafer-level vacuum package such as accelerometer, gyro, in device, vacuum directly affects device performance Stability and reliability.At present, the method for vacuum being kept inside MEMS is in device block to prepare Fe Getter Films Prepared. Fe Getter Films Prepared for MEMS wafer level packagings has highly porous and good mechanical stability, meanwhile, in order to ensure MEMS is operated effectively under adverse circumstances, and Fe Getter Films Prepared is also needed to substrate with preferable adhesion.For The getter preparation method of MEMS Vacuum Packages is mainly magnetron sputtering technique or evaporation technology, air-breathing prepared by magnetron sputtering method Agent film has higher film-forming accuracy, and thickness is generally hundreds of nanometer to several microns.

As Fe Getter Films Prepared needs to prepare in the block of MEMS wafer scale level Vacuum Package, conventional getter Film patterning method is stripping method（lift off）And mask method（shadow mask）.Deep chamber stripping technology can para-linkage face Cause to damage, can affect subsequently to be bonded processing quality；And there is alignment control, mask clamping, deep chamber bottom diagram in conventional mask method The problems such as bonding environmental pollution contaminates around shape diffusion and deep chamber..

The content of the invention

It is an object of the invention to provide a kind of graphical preparation method of MEMS getteies, the method can avoid para-linkage Face pollutes and damages, it is ensured that postorder bonding quality, in addition, can the figure diffusion of effective control block depth bottom of chamber portion, realize More preferable MEMS wafer level Vacuum Package.

The technical solution adopted for the present invention to solve the technical problems is：

A kind of graphical preparation method of MEMS getteies, comprises the following steps：

S1, the cavity pattern for meeting design requirement on a silicon substrate using photoetching process making, retain photoetching process in silicon substrate The passivation layer that top surface is formed；

S2, using KOH techniques cavity pattern position corrode silicon substrate, formed cavity；

S3, the passivation layer removed on silicon substrate, obtain silicon block；

S4, silicon block top surface make wafer scale bonding ring；

S5, silicon base is taken, mask pattern, upper mask pattern and cavity pattern phase on silicon base top surface is made using photoetching process Together, retain the upper passivation layer that photoetching process is formed in silicon base top surface；

S6, using KOH techniques upper mask pattern position corrode silicon base, formed upper cavity；

S7, in the case where silicon base bottom surface is using photoetching process making mask pattern, lower mask pattern is staggered with upper mask pattern, protects The lower passivation layer for staying photoetching process to be formed in silicon base bottom surface；

S8, using KOH techniques in upper mask pattern position and lower mask pattern position, silicon base is carried out it is two-sided to logical corrosion, Stop when corroding to lower passivation layer；

Passivation layer and lower passivation layer on S9, removal, obtain the stereo mask being adapted with silicon cap cavity；The thickness of stereo mask The depth of as described upper cavity；

S10, using self-registered technology by stereo mask embedded silicon cap cavity, it is empty in silicon block using physical gas-phase deposition Bottom of chamber portion prepares MEMS getteies；

S11, stereo mask is removed from silicon block, complete the preparation of graphical Fe Getter Films Prepared.

The invention has the beneficial effects as follows：

Give up traditional plane mask, using the stereo mask being adapted with silicon cap cavity, using self-registered technology by solid Mask is closely embedded in silicon cap cavity, without the need for extra Alignment Process and stationary fixture, greatly reduces preparation cost；And When getter is deposited, it is capable of the figure diffusion of effective control silicon cap cavity bottom, it is to avoid Fe Getter Films Prepared pollutes silicon block Ring is bonded around cavity, the service behaviour of device getter is greatly improved；In addition, the preparation of this method stereo mask with compared with High concordance and reliability, technique are easily achieved, and are easy to be extended and applied.

Description of the drawings

The present invention is further described with reference to the accompanying drawings and examples：

Fig. 1 is the schematic diagram of step S1 of the present invention；

Fig. 2 is the schematic diagram of step S2 of the present invention；

Fig. 3 is the schematic diagram of step S3 of the present invention；

Fig. 4 is the schematic diagram of step S4 of the present invention；

Fig. 5 is the schematic diagram of step S5 of the present invention；

Fig. 6 is the schematic diagram of step S6 of the present invention；

Fig. 7 is the schematic diagram of step S7 of the present invention；

Fig. 8 is the schematic diagram of step S8 of the present invention；

Fig. 9 is the schematic diagram of step S9 of the present invention；

Figure 10 is the schematic diagram of step S10 of the present invention；

Figure 11 is the schematic diagram of step S11 of the present invention.

Specific embodiment

The present invention provides a kind of MEMS getteies graphical preparation method, comprises the following steps：

S1, meet the cavity pattern 2 of design requirement as shown in figure 1, making using photoetching process on silicon substrate 1, retain photoetching The passivation layer 3 that technique is formed in 1 top surface of silicon substrate；

S2, with reference to shown in Fig. 2, using KOH techniques cavity pattern 2 position corrosion silicon substrate 1, formed cavity 4；

S3, with reference to shown in Fig. 3, remove silicon substrate 1 on passivation layer 3, obtain silicon block 5；

S4, with reference to shown in Fig. 4,5 top surface of silicon block make wafer scale bonding ring 6；

S5, with reference to shown in Fig. 5, take silicon base 7,7 top surface of silicon base using photoetching process make on mask pattern 8, upper mask Figure 8 is identical with cavity pattern 2, retains the upper passivation layer 9 that photoetching process is formed in 7 top surface of silicon base；

S6, with reference to shown in Fig. 6, using KOH techniques upper mask pattern 8 position corrosion silicon base 7, formed upper cavity 10；

S7, with reference to shown in Fig. 7,7 bottom surface of silicon base using photoetching process making under mask pattern 11, lower mask pattern 11 with it is upper Mask pattern 8 is staggered, retains the lower passivation layer 12 that photoetching process is formed in 7 bottom surface of silicon base；

S8, with reference to shown in Fig. 8, using KOH techniques in 8 position of upper mask pattern and lower 11 position of mask pattern, silicon base 7 is entered Row is two-sided to logical corrosion, stops when corroding to lower passivation layer 12；

S9, with reference to shown in Fig. 9, passivation layer 9 and lower passivation layer 12 in removal, obtain with silicon cap cavity 4 be adapted solid cover Film 13；The thickness of stereo mask 13 is the depth of the upper cavity 10；

S10, with reference to shown in Figure 10, stereo mask 13 is embedded in into silicon cap cavity 4 using self-registered technology, it is heavy using physical vapor Product technique prepares MEMS getteies in 4 bottom of silicon cap cavity；

S11, with reference to shown in Figure 11, stereo mask 13 is removed from silicon block 5, the preparation of graphical Fe Getter Films Prepared 14 is completed.

The above, is only presently preferred embodiments of the present invention, not makees any pro forma restriction to the present invention；Appoint What those of ordinary skill in the art, under without departing from technical solution of the present invention ambit, all using the side of the disclosure above Method and technology contents make many possible variations and modification, or the equivalent reality for being revised as equivalent variations to technical solution of the present invention Apply example.Therefore, every content without departing from technical solution of the present invention, is done to above example according to the technical spirit of the present invention Any simple modification, equivalent, equivalence changes and modification, still fall within the range of technical solution of the present invention protection.

Claims (1)

1. the graphical preparation method of a kind of MEMS getteies, it is characterised in that comprise the following steps：

S1, the cavity pattern for meeting design requirement on a silicon substrate using photoetching process making, retain photoetching process in silicon substrate The passivation layer that top surface is formed；

S2, using KOH techniques cavity pattern position corrode silicon substrate, formed cavity；

S3, the passivation layer removed on silicon substrate, obtain silicon block；

S4, silicon block top surface make wafer scale bonding ring；

S5, silicon base is taken, mask pattern, upper mask pattern and cavity pattern phase on silicon base top surface is made using photoetching process Together, retain the upper passivation layer that photoetching process is formed in silicon base top surface；

S6, using KOH techniques upper mask pattern position corrode silicon base, formed upper cavity；

S7, in the case where silicon base bottom surface is using photoetching process making mask pattern, lower mask pattern is staggered with upper mask pattern, protects The lower passivation layer for staying photoetching process to be formed in silicon base bottom surface；

S8, using KOH techniques in upper mask pattern position and lower mask pattern position, silicon base is carried out it is two-sided to logical corrosion, Stop when corroding to lower passivation layer；

Passivation layer and lower passivation layer on S9, removal, obtain the stereo mask being adapted with silicon cap cavity；The thickness of stereo mask The depth of as described upper cavity；

S10, using self-registered technology by stereo mask embedded silicon cap cavity, it is empty in silicon block using physical gas-phase deposition Bottom of chamber portion prepares MEMS getteies；

S11, stereo mask is removed from silicon block, complete the preparation of graphical Fe Getter Films Prepared.