CN106452454B - Data change sequence and transmit and receive interpretation method and device - Google Patents
Data change sequence and transmit and receive interpretation method and device Download PDFInfo
- Publication number
- CN106452454B CN106452454B CN201510469562.5A CN201510469562A CN106452454B CN 106452454 B CN106452454 B CN 106452454B CN 201510469562 A CN201510469562 A CN 201510469562A CN 106452454 B CN106452454 B CN 106452454B
- Authority
- CN
- China
- Prior art keywords
- storage unit
- data
- storage
- sequence
- log
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
Sequence, which is changed, the present invention provides a kind of data transmits and receives interpretation method and device, it is characterized in that, it include: that will transmit the log-likelihood ratio of each bit in data to make receiving end concurrently to store in order in the storage unit with predetermined amount of storage of predetermined number, transmitting terminal, which makes a reservation for transmission data to change sequence interval change after sequence rearranges, to be retransmited；And receiving end decodes the log-likelihood ratio exported via storage unit.
Description
Technical field
The present invention relates to broadcast and field of wireless communications, be more particularly to a kind of data change sequence send, the reception of data
Interpretation method and device.
Background technique
LDPC error correcting code (Low Density Parity Check Code) is the core of channel coding in the information transmission system
Center portion point, to meet higher and higher performance requirement, proposes higher performance requirement to LDPC code.
It is illustrated for combining HINOC technology (High performance Network Over Coax),
HINOC technology is a kind of broadband access technology that high-performance two-way communication is realized based on cable tv coax, Neng Goutong
When provide a user high definition, digital video, high-speed data access etc. integrated services.HINOC agreement utilizes existing coaxial cable
Network realizes the high-peed connection of user in the case where not doing any transformation to existing route, reduces cost of implementation, simultaneously
The bidirectional transfer of information of high speed can be provided again for user.Currently, HINOC1.0 system research is over, the standard of complete set
It has formulated completion and has proposed, production is also put into corresponding chip design.To further increase transmission rate, HINOC2.0
Upgrade version as HINOC1.0 system is suggested and enters development phase, and the design object of the system is in many aspects all
Higher than existing system.
Currently, the communication standard system using LDPC code has: European second generation digital television transfer standard DVB_T2/
C2/S2, IEEE 802.11n WLAN standard, IEE 802.11e wireless wide area network standard, China Digital TV it is wide
It broadcasts standard (DTMB), the near-earth of U.S. CCSDS and deep space communication system etc..But in these standards, LDPC code word and
Decoder is not to design for HINOC2.0 system performance, and be unsatisfactory for HINOC2.0 system for high-throughput yet
The requirement of (1Gbps) and error floor (1E-12).So for example required in HINOC2.0 system: high code rate 0.9, and accidentally
Code leveling will be lower than 1E-12；Code length is 1920；Information throughput reaches 1Gbps, wherein ultralow error floor, superelevation gulp down
The amount of spitting proposes the realizability of the error-correcting performance of LDPC code, the degree of parallelism of decoder, convergence, the number of iterations and complexity
Very high requirement.
In the prior art, mainly there are two modules to form for ldpc decoder: storage unit and decoder core.The decoding utensil
The operating process of body is explained as follows: storage list is written in the log-likelihood ratio LLR for transmitting each bit in data by prime in order
In member, decoder core therefrom reads the log-likelihood ratio in order, and is decoded.
It is a length of to meet LDPC code in HINOC2.0 system by taking specific value scheme in a HINOC2.0 system as an example
1920, handling capacity is higher than the requirement of 1Gps, and storage section is pre-designed to be made of 80 i.e. storage units of sub- RAM, each
((random access memory, random access memory) depth is 24 to sub- RAM, bit wide 10.Here sub- RAM number 80, it is deep
Degree 24, bit wide 10 are all based on efficiency of transmission required by HINOC2.0 system and determine.So, the existing read-write sequence of sub- RAM
As shown in figure 3, being explained as follows: when prime transmits the code block that a code length is 1920, the log-likelihood ratio of each bit is
LLR1, LLR2 ..., LLR1920.Information bit LLR1~LLR1728 is written in a vertical direction, and the address 0 that sub- RAM1 is first written is single
The address 1 of member, 1 unit ... of address of sub- RAM1, Unit 79, address of sub- RAM1, Unit 0, address of sub- RAM2, sub- RAM2 is single
Member ..., and so on.Check bit LLR1729~LLR1920 is written by horizontal direction, Unit 0, address of sub- RAM73, son
The address 1 of 0 unit ... of address of RAM74, Unit 0, address of sub- RAM80, Unit 1, address of sub- RAM73, sub- RAM74 is single
Member ..., and so on.After storage unit is all write completely, decoder core starts therefrom to read data by row, until 24 rows are all read
It is complete, start to decode.
However, above-mentioned design can be led to the problem of when LLR high-speed parallel is written, since the different address position of sub- RAM can not
It is written simultaneously, therefore concurrently log-likelihood ratio corresponding to transmitted data can not be written in order and formed with sub- RAM
Storage unit in, for this problem, it has been suggested that a solution be storage unit is realized with register, but this will
A large amount of storage resource is expended, and generates complicated position and selects logic.Therefore, need a kind of high-throughput for meeting predetermined design,
High-transmission efficiency saves the realization of decoding scheme of storage resource.
Summary of the invention
To solve the above-mentioned problems, sequence is changed the present invention provides a kind of data transmit and receive interpretation method and device, purpose
It is to provide the high-throughput for meeting predetermined design, high-transmission efficiency, saves the realization of decoding scheme of storage resource.
Sequence is changed the present invention provides a kind of data and transmits and receives interpretation method characterized by comprising in order to make receiving end
Concurrently the log-likelihood ratio for transmitting each bit in data, which store in order to predetermined number, has predetermined amount of storage
In storage unit, transmitting terminal to the transmission data with it is predetermined change sequence interval and change after sequence rearranges retransmit；And it connects
Receiving end decodes the log-likelihood ratio exported via the storage unit.
Further, wherein the predetermined interval digit for changing sequence interval is associated with the described predetermined of the storage unit
Amount of storage, the transmission data use quasi-cyclic LDPC code, and the predetermined amount of storage of the storage unit is associated with the standard and follows
The predetermined number of the sub-block size of ring LDPC code, the storage unit is associated with the code length and sub-block of the quasi-cyclic LDPC code
Size.
Further, wherein the predetermined number of storage unit based on the code length of quasi-cyclic LDPC code divided by sub-block size and
It determines.
Further, wherein under the premise of the code length of quasi-cyclic LDPC code is determined, the predetermined number of storage unit with
And determines amount of storage and determined when being pre-designed based on efficiency of transmission required by Transmission system.
Further, wherein efficiency of transmission required by Transmission system is associated with the reading rate of storage unit, decoding speed
Rate.
Further, wherein receiving end concurrently by the log-likelihood ratio of bit each in the data transmitted in order
Store in storage unit, include following writing mode: the sum of digit of information bit and check bit is predetermined a with storage unit
Number is corresponding and is defined as a cycle, and log-likelihood ratio is sequentially written in the storage cell of predetermined number periodically one by one
In.
Further, wherein the sum of digit of information bit and check bit and quilt corresponding with the predetermined number of storage unit
It is defined as a cycle, when exporting log-likelihood ratio from storage unit, is read one week from storage unit immediately while respectively
The log-likelihood ratio of phase is completed to read one by one periodically to be decoded.
In addition, changing sequence the present invention also provides a kind of data transmits and receives code translator characterized by comprising change sequence
Transmission unit, logarithm make a reservation for change sequence interval and change after sequence rearranges to retransmit accordingly；Predetermined number has predetermined storage
The log-likelihood ratio of bit each in the data received is concurrently written the storage unit of amount in order；And decoding is single
Member, by reading log-likelihood ratio from storage unit simultaneously periodically to decoding.
In addition, the present invention also provides a kind of data to change sequence sending device characterized by comprising sequence transmission unit is changed,
Logarithm makes a reservation for change sequence interval and change after sequence rearranges to retransmit accordingly, the data for transmitting receiving end concurrently will
In the log-likelihood ratio of each bit stored in the storage unit with predetermined amount of storage of predetermined number in order.
In addition, changing sequence the present invention also provides a kind of data receiver code translator to data as claimed in claim 9 and sending dress
It sets the data sent out and carries out reception decoding characterized by comprising the storage list with predetermined amount of storage of predetermined number
The log-likelihood ratio of bit each in the data received is concurrently written member in order；And decoding unit, by week
Log-likelihood ratio is read from storage unit simultaneously phase to decode.
The function and effect of the present invention
Provided data change sequence and transmit and receive interpretation method and device according to the present invention, are able to solve in high-speed transfer
When, in order to make receiving end concurrently by the log-likelihood ratio of bit each in the data transmitted write storage unit in order,
Transmitting terminal changes sequence to the data and rearranges, and it is such change sequence and rearrange operation be easy to, it is extra without occupying
It resource and time, only exports and is sequentially adjusted, but the effect for saving resource can be played.
Detailed description of the invention
Fig. 1 is that data change the flow chart that sequence transmits and receives interpretation method in the embodiment of the present invention；
Fig. 2 is that data change the structure chart that sequence transmits and receives code translator in the embodiment of the present invention；
Fig. 3 is the schematic diagram of the write sequence of storage unit in prior art；And
Fig. 4 is the schematic diagram of the write sequence of storage unit in the embodiment of the present invention.
Specific embodiment
Inventor has found in prior art, in the write-in of LLR high-speed parallel, since the different address position of sub- RAM can not be by
It is written simultaneously, therefore can not concurrently log-likelihood ratio corresponding to transmitted data be written in order and to be formed with sub- RAM
Problem in storage unit.
It changes sequence in view of the above-mentioned problems, inventor after study, provides a kind of data and transmits and receives interpretation method and device,
Be able to solve in high-speed transfer, in order to make receiving end concurrently by the log-likelihood ratio of bit each in the data transmitted by
Be sequentially written in storage unit, transmitting terminal changes sequence to the data and rearranges, and it is such change sequence rearrange operation hold very much
Easily, it without occupying extra resource and time, only exports and is sequentially adjusted, but the effect for saving resource can be played
Fruit.
It is understandable in order to enable the above objects, features and advantages of the present invention to become apparent, with reference to the accompanying drawing to this hair
Bright specific embodiment is described in detail.
Fig. 1 is that data change the flow chart that sequence transmits and receives interpretation method in the embodiment of the present invention.In the present embodiment, as schemed
Shown in 1, data change sequence and transmit and receive interpretation method, which comprises the following steps:
In order to store receiving end concurrently in order the log-likelihood ratio for transmitting each bit in data to predetermined
In several storage units with predetermined amount of storage, transmitting terminal to transmission data with it is predetermined change sequence interval and carry out changing sequence rearrange
After retransmit；And
Receiving end decodes the log-likelihood ratio exported via storage unit.
Wherein, the predetermined interval digit for changing sequence interval is associated with the predetermined amount of storage of storage unit.
Specifically, in the present embodiment, transmission data use quasi-cyclic LDPC code, then, the storage unit it is described
Predetermined amount of storage is associated with the sub-block size of the quasi-cyclic LDPC code, and the predetermined number of storage unit is associated with quasi- circulation
The code length and sub-block size of LDPC code, it is, the predetermined number of storage unit is based on the code length of quasi-cyclic LDPC code divided by son
Block size and determination.
Under the premise of the code length of quasi-cyclic LDPC code is determined, the predetermined number of storage unit and amount of storage is determined pre-
It is determined when first designing based on efficiency of transmission required by Transmission system.Wherein, efficiency of transmission required by Transmission system is associated with
The reading rate of storage unit, decoding rate.
Wherein, receiving end is concurrently by the log-likelihood ratio storage to storage in order of bit each in the data transmitted
Include following writing mode in unit:
The sum of the digit of information bit and check bit is corresponding with the predetermined number of storage unit and is defined as a cycle,
Log-likelihood ratio is sequentially written in the storage cell of predetermined number periodically one by one.
Wherein, the sum of digit of information bit and check bit is corresponding with the predetermined number of storage unit and is defined as one
Period reads the logarithm in a period seemingly immediately while respectively when exporting log-likelihood ratio from storage unit from storage unit
Right ratio is completed to read one by one periodically to be decoded.
In conjunction with Fig. 4, continues with for transmission data shown in Fig. 3 and be illustrated.To solve the above problems, step
It is rapid as follows:
Step 1: transmitting terminal to the log-likelihood ratio LLR in transmission data with it is predetermined change sequence interval and carry out changing sequence arrange again
It is retransmited after column.It is illustrated with citing 1, i.e., transmitting terminal is first by 0,1,2,3 ..., and 1919 code words are changed for 24 according to interval
Sequence indicates that 1920 code words are used to be illustrated sequential transformations using number 0~1919 herein, then after rearranging,
Code word becomes 0,24,48 ..., and 1704,1728,1729 ..., 1735,1,25,49 ..., 1705 ..., 23,47,71 ..., 1919
Such sequence.Predetermined interval digit 24 for changing sequence interval are associated with sub-block size i.e. depth 24, deposit this in the present embodiment
The predetermined number of storage unit is determined as 80, is to be determined based on the code length 1920 of quasi-cyclic LDPC code divided by sub-block size 24.
Step 2: will concurrently change the data after sequence and be written in the RAM of each storage unit i.e. 80 in order, and RAM1~
RAM80.It is illustrated with citing 1, as shown in Figure 3: Unit 0, address of RAM1 is sequentially written in by row, the address 0 of sub- RAM2 is single
The address 1 of member ..., Unit 0, address of RAM80, Unit 1, address of sub- RAM1, address 1 unit ... the, sub- RAM80 of RAM2 is single
Member ..., Unit 23, address of sub- RAM80.
Step 3: after storage unit is fully written, decoder core immediately begins to therefrom be successively read data by row.With citing
1 illustrates, that is, sequential reads out 80 LLR of every row, totally 24 rows can all be run through.
Wherein, in code word corresponding to 80 LLR, the sum of digit of information bit 72 and check bit 8 80 and storage unit
Predetermined number 80 it is corresponding and be defined as a cycle, when exporting log-likelihood ratio from storage unit, simultaneously immediately
The log-likelihood ratio in a period is read from storage unit respectively to be decoded, completes to read one by one periodically, thus often
72 information bits of group and the 8 bit check positions to match can be read together as a cycle.
It by this method, can solve in high-speed transfer, make receiving end concurrently will be each in the data transmitted
The log-likelihood ratio of bit in order write storage unit the problem of.Transmitting terminal changes operation that sequence rearranges very to the data
It is easy to carry out, without occupying extra resource and time, only exports and be sequentially adjusted, but saving resource can be played
The effect of storage resource.
In addition, changing sequence the present invention also provides a kind of data transmits and receives code translator characterized by comprising change sequence
Transmission unit, to the data with it is predetermined change sequence interval and change after sequence rearranges retransmit；Having for predetermined number is predetermined
The log-likelihood ratio of each bit in the data received is concurrently written the storage unit of amount of storage in order；With
And decoding unit, by log-likelihood ratio being read from the storage unit to decoding simultaneously periodically.
In addition, the present invention also provides a kind of data to change sequence sending device characterized by comprising sequence transmission unit is changed,
To the data with it is predetermined change sequence interval and change after sequence rearranges retransmit, will be transmitted for making receiving end concurrently
The log-likelihood ratio of each bit is stored in order in the storage unit with predetermined amount of storage of predetermined number in data.
In addition, changing sequence sending device the present invention also provides a kind of data receiver code translator to such as above-mentioned data and sending
Data out carry out reception decoding characterized by comprising the storage unit with predetermined amount of storage of predetermined number will connect
The log-likelihood ratio of each bit is concurrently written in order in the data received；And decoding unit, by same periodically
When log-likelihood ratio is read from the storage unit to decoding.
Data provided in this implementation change sequence transmit and receive code translator, data change sequence sending device, data receiver is translated
What code device changed that sequence transmits and receives interpretation method or transmitting terminal with data in above-described embodiment respectively changes sequence sending method, receiving end
Reception interpretation method it is corresponding, then possessed structure and technology essential factor can accordingly convert shape by generation method in device
At repeating no more in this description will be omitted.
Although the invention has been described by way of example and in terms of the preferred embodiments, but it is not for limiting the present invention, any this field
Technical staff without departing from the spirit and scope of the present invention, may be by the methods and technical content of the disclosure above to this hair
Bright technical solution makes possible variation and modification, therefore, anything that does not depart from the technical scheme of the invention, and according to the present invention
Technical spirit any simple modifications, equivalents, and modifications to the above embodiments, belong to technical solution of the present invention
Protection scope.
Claims (9)
1. a kind of data change sequence and transmit and receive interpretation method characterized by comprising
Predetermined number is arrived in order to store receiving end concurrently in order the log-likelihood ratio for transmitting each bit in data
In storage unit with predetermined amount of storage, transmitting terminal to the transmission data with it is predetermined change sequence interval and carry out changing sequence rearrange
After retransmit；And
Receiving end decodes the log-likelihood ratio exported via the storage unit；
Wherein, the predetermined interval digit for changing sequence interval is associated with the predetermined amount of storage of the storage unit,
The transmission data use quasi-cyclic LDPC code,
The predetermined amount of storage of the storage unit is associated with the sub-block size of the quasi-cyclic LDPC code,
The predetermined number of the storage unit is associated with the code length and sub-block size of the quasi-cyclic LDPC code.
2. data as described in claim 1 change sequence and transmit and receive interpretation method characterized by comprising
Wherein, the predetermined number of the storage unit is based on the code length of the quasi-cyclic LDPC code divided by the sub-block size
And it determines.
3. data as described in claim 1 change sequence and transmit and receive interpretation method characterized by comprising
Wherein, under the premise of the code length of the quasi-cyclic LDPC code is determined, the predetermined number of the storage unit with
And the predetermined amount of storage is determined when being pre-designed based on efficiency of transmission required by Transmission system.
4. data as claimed in claim 3 change sequence and transmit and receive interpretation method characterized by comprising
Wherein, efficiency of transmission required by Transmission system is associated with the reading rate of storage unit, decoding rate.
5. data as described in claim 1 change sequence and transmit and receive interpretation method characterized by comprising
Wherein, receiving end is concurrently stored the log-likelihood ratio of bit each in the data transmitted in order to the storage
Include following writing mode in unit:
The sum of digit of information bit and check bit is corresponding with the predetermined number of the storage unit and is defined as one
Log-likelihood ratio is sequentially written in the storage unit of the predetermined number by the period periodically one by one.
6. data as described in claim 1 change sequence and transmit and receive interpretation method characterized by comprising
Wherein, the sum of digit of information bit and check bit is corresponding with the predetermined number of the storage unit and is defined as
A cycle,
When exporting log-likelihood ratio from the storage unit, read from the storage unit period immediately while respectively
Log-likelihood ratio is completed to read one by one periodically to be decoded.
7. a kind of data change sequence and transmit and receive code translator characterized by comprising
Change sequence transmission unit, to transmission data with it is predetermined change sequence interval and change after sequence rearranges retransmit；
The storage unit with predetermined amount of storage of predetermined number, by the log-likelihood of each bit in the data received
Than being concurrently written in order；And
Decoding unit, by reading log-likelihood ratio from the storage unit simultaneously periodically to decoding；
Wherein, the predetermined interval digit for changing sequence interval is associated with the predetermined amount of storage of the storage unit,
The transmission data use quasi-cyclic LDPC code,
The predetermined amount of storage of the storage unit is associated with the sub-block size of the quasi-cyclic LDPC code,
The predetermined number of the storage unit is associated with the code length and sub-block size of the quasi-cyclic LDPC code.
8. a kind of data change sequence sending device characterized by comprising
Change sequence transmission unit, logarithm, which makes a reservation for change sequence interval accordingly change after sequence rearranges, to be retransmited, for making receiving end simultaneously
Row ground, which stores the log-likelihood ratio of bit each in the data transmitted in order to predetermined number, has predetermined amount of storage
Storage unit in；
Wherein, the predetermined interval digit for changing sequence interval is associated with the predetermined amount of storage of the storage unit,
The transmission data use quasi-cyclic LDPC code,
The predetermined amount of storage of the storage unit is associated with the sub-block size of the quasi-cyclic LDPC code,
The predetermined number of the storage unit is associated with the code length and sub-block size of the quasi-cyclic LDPC code.
9. a kind of data receiver code translator, to data as claimed in claim 8 change data that sequence sending device is sent out into
Row receives decoding characterized by comprising
The storage unit with predetermined amount of storage of predetermined number, simultaneously by the log-likelihood ratio of bit each in the data received
Row ground is written in order；And
Decoding unit, by reading log-likelihood ratio from the storage unit simultaneously periodically to decoding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510469562.5A CN106452454B (en) | 2015-08-04 | 2015-08-04 | Data change sequence and transmit and receive interpretation method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510469562.5A CN106452454B (en) | 2015-08-04 | 2015-08-04 | Data change sequence and transmit and receive interpretation method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106452454A CN106452454A (en) | 2017-02-22 |
| CN106452454B true CN106452454B (en) | 2019-09-27 |
Family
ID=59216419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510469562.5A Active CN106452454B (en) | 2015-08-04 | 2015-08-04 | Data change sequence and transmit and receive interpretation method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106452454B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108809325B (en) * | 2017-05-05 | 2022-01-28 | 上海数字电视国家工程研究中心有限公司 | LDPC decoder |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101106381A (en) * | 2007-08-09 | 2008-01-16 | 上海交通大学 | Hierarchical low density check code decoder and decoding processing method |
| CN101938325A (en) * | 2009-06-29 | 2011-01-05 | 中兴通讯股份有限公司 | Rate de-matching method and device for finite length circular buffering rate matching |
| CN101953077A (en) * | 2008-03-28 | 2011-01-19 | 高通股份有限公司 | The deinterleaving mechanism that relates to many row LLR buffers |
| CN102075197A (en) * | 2010-12-29 | 2011-05-25 | 北京遥测技术研究所 | LDPC (low-density parity-check) decoding method |
| CN103532569A (en) * | 2013-08-09 | 2014-01-22 | 上海数字电视国家工程研究中心有限公司 | Decoding device and analytic data decoding method |
-
2015
- 2015-08-04 CN CN201510469562.5A patent/CN106452454B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101106381A (en) * | 2007-08-09 | 2008-01-16 | 上海交通大学 | Hierarchical low density check code decoder and decoding processing method |
| CN101953077A (en) * | 2008-03-28 | 2011-01-19 | 高通股份有限公司 | The deinterleaving mechanism that relates to many row LLR buffers |
| CN101938325A (en) * | 2009-06-29 | 2011-01-05 | 中兴通讯股份有限公司 | Rate de-matching method and device for finite length circular buffering rate matching |
| CN102075197A (en) * | 2010-12-29 | 2011-05-25 | 北京遥测技术研究所 | LDPC (low-density parity-check) decoding method |
| CN103532569A (en) * | 2013-08-09 | 2014-01-22 | 上海数字电视国家工程研究中心有限公司 | Decoding device and analytic data decoding method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106452454A (en) | 2017-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101800619B (en) | Interleaver or deinterleaver method and device thereof based on block interleaver | |
| CN109075799A (en) | The coding and decoding method and device of polarization Polar code | |
| CN101820288A (en) | Information processing method of low-density check codes | |
| CN102164026A (en) | Fountain code compiling method based on deep space communication environment | |
| WO2014090045A1 (en) | Td-scdma uplink transmission channel processing method | |
| CN102271033A (en) | Hybrid automatic repeat request memory dynamic scheduling method and device | |
| JP2022506735A (en) | Data transmission method and communication equipment | |
| CN101521807B (en) | Method and system for smoothly processing transmission stream and front-end equipment of digital television | |
| CN106452454B (en) | Data change sequence and transmit and receive interpretation method and device | |
| CN102892142A (en) | Relay transmission system and method capable of adaptively selecting relay schemes | |
| CN102215097B (en) | A kind of method and device for managing hybrid automatic repeat request cache | |
| CN102340742A (en) | Data processing method and access point equipment | |
| TWI520521B (en) | Method and device for storing harq transmission block | |
| WO2022089429A1 (en) | Decoding method and apparatus | |
| WO2019047947A1 (en) | Method and apparatus for interleaving data in wireless communication system | |
| WO2022012032A1 (en) | Harq transmission apparatus and method based on shared cache | |
| CN102468902A (en) | Method for Turbo coding of rate match/de-rate match in LTE (long term evolution) system | |
| WO2021213219A1 (en) | Encoding and decoding methods and apparatuses, and device | |
| CN103516478A (en) | Method and device for information sending | |
| CN209659495U (en) | A kind of pattern of fusion equipment for supporting 5G and IPTV | |
| CN103152141A (en) | Cooperation space-time network coding method in multisource distributed cooperative network | |
| US9185727B2 (en) | Access point for wireless LAN and medium access control method thereof | |
| CN101977063B (en) | General LDPC decoder | |
| CN101534172B (en) | A realizing device and method of bit interleaving in china mobile multimedia broadcasting | |
| CN101500099B (en) | Wireless communication receiver, wireless communication receiving method and television receiver |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |