WO2014090045A1

WO2014090045A1 - Td-scdma uplink transmission channel processing method

Info

Publication number: WO2014090045A1
Application number: PCT/CN2013/085827
Authority: WO
Inventors: 徐琪
Original assignee: 中兴通讯股份有限公司
Priority date: 2012-12-11
Filing date: 2013-10-23
Publication date: 2014-06-19
Also published as: CN103873186B; CN103873186A

Abstract

Disclosed is a TD-SCDMA uplink transmission channel processing method. An uplink transmission channel processing method provided by the present invention sequentially completes processing of every 10 ms for each transmission channel and does not need size-based ordering processing for TTIs of 8 transmission channels, thereby reducing the complexity of processing logic. By adopting the present invention, data of all transmission channels do not need to be saved in a large memory to choose 10 ms for processing, and instead only data of 10 ms that needs to be processed currently is directly stored, and the memory is used to choose data, so that the implementation not only is visual and convenient, but also reduces the logic processing difficulty of determining a data storage position, and lowers the requirement for the storage space of a primary interleaved memory, thereby achieving an optimization effect for an entire uplink area.

Description

TD-SCDMA uplink transmission channel processing method

TECHNICAL FIELD The present invention relates to the field of wireless mobile communication and signal processing systems, and in particular to a TD-SCDMA (Time Division Duplex-Synchronous Code Division Multiple Access) uplink transmission channel processing. The method is applied to the processing of an uplink transmission channel of a TD-SCDMA baseband chip processing system. BACKGROUND OF THE INVENTION In a wireless mobile communication and signal processing system, an uplink is a signal transmission link from a terminal UE to a base station NodeB, and for the uplink, its main processing includes processing of a transmission channel portion and processing of a physical channel portion. The transmission channel processing mainly includes Cyclic Redundancy Code (CRC) addition, channel coding, first interleaving, rate matching, and transmission channel multiplexing. The physical channel performs second interleaving, physical channel mapping, QPSK debugging, Data spreading, Data scrambling, I&Q separation operation on the data sent by the transmission channel, and the processed data and the midamble Midamble, uplink pilot physics The channel UpPTS uplink synchronization code SYNCJJL constructs an uplink burst in chronological order. The following focuses on the process of transport channel processing closely related to the present invention, and its related content is in the third generation mobile communication system international standard 3GPP TS25.221-TS25.224 (TDD), TS25.306, TS34.108, etc. Specific explanation. First, the data of each transport channel is transmitted in units of transport blocks and transmitted according to a Transmit Time Interval (abbreviated as ΤΉ). For services with different delay requirements, different lengths can be used. According to 3GPP, they can be one of 10ms, 20ms, 40ms and 80ms respectively. Then, in order to provide reliability of data transmission, CRC addition and channel coding are performed at the transmitting end in units of data blocks. The channel coding may be convolutional coding or turboscopic Turbo coding. The encoded data stream is subjected to radio frame length equalization, for example, the dummy bits are padded at the end of the last frame so that the number of data bits of each frame in one frame is equal. Again, the data stream that has been subjected to radio frame length equalization is interleaved for the first time, that is, inter-frame interleaving. The main purpose of interleaving is to turn the burst error into a random error to facilitate the decoder to correct the error, thereby improving the ability to resist fading. Finally, when a ΤΉ is greater than 10 ms, the data bit sequence needs to be segmented to be mapped to multiple radio frames for transmission. In the uplink, when the number of bits varies between different turns, the data bits will be retransmitted or punctured to ensure the total bit rate after the transport channel multiplexing and the total bit rate of the assigned dedicated physical channel. the same. After the above processing, one frame of data is taken out from each transmission channel, and multiplexed into one coded composite transmission channel, and then mapped to one or more physical channels for transmission by the second interleaving, that is, the intraframe interleaving process. The patent document disclosed in US Patent No. US2006251001 (Rate matching method in mobile communication system) provides a method suitable for uplink rate matching, which includes various encoding methods of turbo coding and convolutional coding. Rate matching, the uplink rate matching method adopted by the method is: first, performing transmission channel coding; then dividing the data into multiple sequences to generate an interleaved image; and determining a position in the data that needs to be punched and repeated according to the calculated data bit shift value, Therefore, the data required for subsequent processing is selected and stored in the memory for subsequent processing. However, through research, it is found that the logic complexity of this method is relatively large. Chinese Patent CN200610138212 (The invention patent name is a method for uplink transmission channel multiplexing) The published patent document provides a method for uplink transmission channel multiplexing, which mainly includes the following implementation steps: First, current All transport blocks of multiple transport channels that need to be transmitted simultaneously in a 10 ms time interval are sequentially completed in order of TTI, including cyclic redundancy check code addition, concatenation of transport blocks, and coding block segmentation, coding processing, The channel-encoded data word stream is sequentially written into the first interleaved random access memory. Then, the data of each transport channel is taken out from the first interleaved random memory in the order of the original serial number of the transport channel, and the interleaving and rate matching are performed, and the multiplexing of the transport channel is implemented, and the processed data is written to the first Secondary interleaved random access memory. The technical solution stores all the data of the transmission channel into a large memory, and after all the transmission channels complete the storage, the 10 ms data after the completion of the interleaving is selected and processed for subsequent processing, so that the implementation of the one-time interleaving is compared. Convenient and intuitive, however, it still has such a disadvantage: it does not take into account that one interleaving is actually carried out in units of 10ms. With this technical solution, the memory is undoubtedly increased. Overhead, in addition, when the solution is implemented, it is necessary to make multiple judgments on the specific storage location of the data, thereby increasing the logical processing difficulty of the hardware to some extent. SUMMARY OF THE INVENTION In order to reduce memory overhead and reduce hardware logic processing, embodiments of the present invention provide a TD-SCDMA uplink transmission channel processing method. The embodiment of the present invention adopts the following technical solutions: A TD-SCDMA uplink transmission channel processing method includes:

A. Cyclic redundancy check code CRC addition and cascading of transport blocks are sequentially performed in the order of trcW trchl ... trch(Nl) for all transmission time intervals TTI in the current N transmission channels to be processed. And the segmentation processing of the coding block, if there is no transmission block to be processed at this time, and the first interleaved memory RAM (on-chip random access memory) has data to be processed, directly execute step E;

B. Transmitting the processed coding block, suspending the operation of the step B after each time the data stream of one coding block is transmitted, performing step ^ and waiting for the appearance of the coding completion flag signal of the channel coding of the coding block fed back in step C After the above code completion flag appears, the data stream of the next code block is transmitted, and so on, until all the code blocks are transmitted;

C, channel coding the data stream of the coding block formed in step B, after completion, generating a data word stream and generating an encoding completion flag, and feeding back the coding completion flag step B;

D. Determine whether the channel-coded data stream needs to be selected according to the TTI size. If ΤΉ is 5ms or 10ms, the data stream is directly stored in the first interleaving RAM. Otherwise, according to the channel coding type of the data stream. The data is selected by a 24-bit mobile register, and then the data stream is stored in the first interleaved RAM;

E. The data is sequentially read out in the order in which the data is stored in the first interleave RAM, and rate matching and multiplexing of the transport channels are performed, and then the processed data is written into the second interleave RAM. Preferably, in the step A, the N≤8. Preferably, in the step A, the ΤΉ is one of 5 ms, 10 ms, 20 ms, 40 ms or 80 ms. Preferably, in the step B, when the coding type of the channel coding is cotw 1/3 convolutional coding, and ΤΉ is 20 ms, a variable selector _C y _C l _e _sel is added to the coding control module, and When the state machine in the code control module is in the non-initial state, it automatically flips. More preferably, when the variable selector cy _C l _e _sel is high, other related variables in the program change in the original mechanism. Preferably, in the step C, the channel coding comprises convolutional coding and turboscopic turbo coding. Preferably, in the step D, the data writing sequence of storing the data stream into the first interleaving RAM is consistent with the serial processing sequence of the transmission channel in step A until the data of the last transmission channel is written. flow. Preferably, in the step D, the first interleaved RAM has a storage space of 10 ms. Preferably, in the step D, the 24 bit mobile register adopts a ping-pong buffer structure. Preferably, in the step D, the data is selected by the 24-bit mobile register according to the channel coding type of the data stream: using two 24-bit shift registers, the coded data is cross-written into the two shift registers. Among them, when any one of the shift registers 24 bits is written, the bit data belonging to the same frame is selected from the shift register according to the one-time interleaving pattern. As shown in the foregoing technical solution of the embodiment of the present invention, the uplink transmission channel processing method provided by the embodiment of the present invention sequentially performs processing for each 10 ms of each transmission channel, and does not need to sort the TTIs of the eight transmission channels according to the size. Reduce the complexity of processing logic. Specifically, the uplink transmission channel processing method provided by the embodiment of the present invention utilizes the characteristics of one-time interleaving processing: it is performed in units of 10 ms, so that it is not necessary to store all the transmission channel data in one large memory to select 10ms for processing, but directly store only one 10ms of data to be processed, and use memory to complete the selection of data, which is not only intuitive and convenient to implement, but also reduces the logical processing difficulty of data storage location judgment, and reduces The requirement of interleaving the memory storage space is optimized, so that the optimized area is achieved for the entire uplink area. 1 is a schematic diagram of an operation sequence of an uplink transmission channel in an embodiment of the present invention; FIG. 2 is a schematic structural diagram of an implementation of an uplink hardware module in an embodiment of the present invention; FIG. 3 is a schematic diagram of selecting the number of bits to be processed when the size of the UI is 40 ms in the embodiment of the present invention. Further description will be made below in conjunction with the specific embodiments and the accompanying drawings. The technical solutions of the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments, so that those skilled in the art can understand the present invention and can be practiced, but the embodiments are not Limitation of the invention. The core idea of the embodiment of the present invention is:

(1) The embodiment of the present invention does not need to sort the 8 transmission channels according to the size, but sequentially completes each 10 ms processing of each transmission channel. (2) The embodiment of the present invention utilizes the characteristics of one-time interleaving processing: That is, it is performed in units of 10ms each, so it is not necessary to store all the data of the transmission channel in one large memory and select 10ms for processing, and directly store only one 10ms of data to be processed currently, which will be the first time. The capacity of the interleaved memory is reduced from the original data of the eight transport channels to the capacity of storing only one 10ms of data in one transport channel. In addition, in the implementation of the embodiment of the present invention, the first deposit is required. The selection logic of the number of sub-interleaved memory bits. The design of the TD-SCDMA uplink transmission channel processing method in the embodiment of the present invention is described in detail below. Referring to FIG. 1, an embodiment of the present invention sequentially performs CRC attaching and encoding operations on data to be processed on a transport channel, and determines which data needs to be performed in the next step after performing an interleaving according to the size of the ΤΉ and the interleaving rule, and then takes a 10 ms operation. The data is pre-selected and stored in a small RAM that can be stored in 10ms of data, and then subjected to subsequent rate matching operations. The selection of each 10ms data is similar until the processing of all the data of the transmission channel is completed. Specifically, the implementation steps of the uplink transmission channel processing method provided by the embodiment of the present invention specifically include the following steps: Step 1. All TTIs in the eight transmission channels to be processed are according to trch0, t _rc hl .. ..... The order of trch7, in turn CRC addition, cascading of transport blocks and segmentation of coded blocks. If no transport block needs to be processed at this time, and there is data to be processed in the first interleaved RAM, step 5 is directly executed. Step 2: transmitting the processed coding block, suspending the step 2 after each transmission of the data stream of the coding block, performing step 3, waiting for the occurrence of the coding completion flag signal of the channel coding of the coding block fed back in step 3, After the above-mentioned coding completion flag appears, the data stream of the next coding block is transmitted, and so on, until all the coding blocks have been transmitted. Step 3: Perform channel coding on the data stream of the coding block formed in step 2. After completion, generate a data word stream and generate a code completion flag, and feedback the above code completion flag to step 2. Step 4: According to whether the TTI size needs to be selected through the 24-bit mobile register, if it is 5ms or 10ms, it is directly stored in the first interleaving RAM, wherein, in this embodiment, the first interleaved RAM has 10ms storage. space. If the above two cases are not used, that is, the TTI is not 5ms or 10ms, the data needs to be selected according to the channel coding type and stored in the first interleaved RAM. The order in which data is written to the first interleaved RAM is the same as the serial processing sequence of the transport channel in step 1, until the data word stream of the last transport channel is written. Step 5: sequentially read out the data stored in the first interleave RAM, perform rate matching, implement multiplexing of the transmission channel, and write the processed data to the second interleave RAM. The uplink transmission channel processing method in the embodiment of the present invention can still process data streams of up to eight transmission channels in the same manner as the TD-SCDMA uplink transmission channel processing method in the prior art, but unlike the prior art, in the present invention In the embodiment, it is first determined which are the 10ms data of the interleaved output, and the timing diagram thereof is shown in FIG. 1. The implementation architecture of the entire hardware module is shown in FIG. 2, wherein the data selection process needs to be based on the size of the 以及 and the channel coding manner. determine. According to Table 1, for the encoded output combined into serial data, the interval between the bits belonging to the same radio frame does not exceed eight bits, BP : TTI = 20 ms, and the bits with interval 2 must belong to the same radio frame. Therefore, the optimization scheme provided by the embodiment of the present invention uses the feature to directly select a number of bits belonging to the same frame from the encoded data. Table 1 Inter-column permutation mode of the first interleaving

For TTI=5/10ms, there is essentially no interleaving process at this time, and the encoding rate may have 1/2, 1/3 respectively, so how to select data from the encoded result data and ensure the validity of the data requires Consider the following:

(1) TTI=5/10ms For the special case without one interleaving, each coding enables 2/3 output bits corresponding to each other, and then combines them into one word data and stores them in the first interleaving RAM. After all coding blocks are encoded, Data is read from the RAM for rate matching scrambling processing.

(2) TTI=20/40/80ms At this time, it is necessary to select bit data belonging to the same frame from the coded output data. Since there are several combinations of TTI and coding rate, if considering 2 to 3 bits after each encoding, One bit, then for all combinations of ΤΉ, the selection process has no special strong rules to follow, so consider using two 24-bit shift registers, using ping-pong operation, the coded data is cross-written into two shift registers, After writing 24 bits of any one of the registers, the bit data belonging to the same frame is selected from one interleaving pattern. The reason why the size of 24bit is selected is based on: Whether it is 1/2 or 1/3 encoding, the number of encodings can always be guaranteed, and the data can just fill the register; whether it is 20, 40, 80ms, 24 bits There must be an integer number of bits belonging to the same wireless. Taking TTI=40ms as an example, the schematic diagram of the process of selecting a bit after interleaving is shown in FIG. 3, Frm_vld represents a valid bit in 24 bits corresponding to a certain radio frame, and directly corresponds to the interleaving pattern table 1, and the bit interval belonging to the same radio frame can be seen. For 4, the specific implementation can be implemented by a counter. When TTI=20/80ms, the law is similar to the above example, which is directly corresponding to the interleaving pattern table 1. For the case where ΤΉ is not equal to 5ms or 10ms, the encoded data cannot be directly stored in the first interleaved RAM that has only opened 10ms of space, but is first stored in the 24-bit shift register, and then according to the interleaving rule. With the size of ΤΉ, select the first 10ms to process. For ping-pong operations, you need to consider the time characteristics of the read and write operations to prevent data overflow or loss. The time characteristics of the write or read-out 24Bit shift register include: number of write cycles, determined by the encoding type, enable type output; The number of cycles, determined by the size of ΤΉ, the read/write time characteristics are shown in Table 2, expressed in the format of the number of write cycles/read cycles, as follows: Table 2 shift register read and write time characteristics

It can be seen from Table 2 that the selection process for the ping-pong operation, except for 1/3 conv and TTI=20ms, can satisfy the process of ping-pong operation fast write slow reading. Therefore, additional considerations need to be made in this case in the coding control module. The solution is to add a variable selector cy _C l _e _sel in the encoding control module, which automatically flips when the state machine in the encoding control module is not in the initial state. Other related variables in the program change only in the original mechanism when cy _C l _e _sel is high, which forms a loop with a processing period of 2. The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the invention, and the equivalent structure or equivalent flow transformation made by the specification and the drawings of the present invention may be directly or indirectly applied to other related The technical field is equally included in the scope of patent protection of the present invention. INDUSTRIAL APPLICABILITY As described above, a TD-SCDMA uplink transmission channel processing method provided by an embodiment of the present invention has the following beneficial effects: It is not only intuitive and convenient to implement, but also reduces the logical processing difficulty of data storage location judgment, and reduces The requirement of interleaving the memory storage space is optimized, so that the optimized area is achieved for the entire uplink area.

Claims

A request for rights, a TD-SCDMA uplink transmission channel processing method, including:

A. Cyclic redundancy check code CRC addition and cascading of transport blocks are sequentially performed in the order of trcW trchl ... trch(Nl) for all transmission time intervals TTI in the current N transport channels to be processed. And the segmentation processing of the coding block, if there is no transmission block to be processed at this time, and the first interleave memory RAM has data to be processed, directly perform step E;

B. The processed coded block is transmitted, and the operation of the step B is suspended every time the data stream of one coded block is transmitted, step C is performed, and the coded completion flag signal of the channel code of the coded block fed back in step C is awaited. Appears, after the above code completion flag appears, the data stream of the next code block is transmitted, and so on, until all the code blocks are transmitted;

C, channel encoding the data stream of the coding block formed in step B, after completion, generating a data word stream and generating a code completion flag, and feeding back the code completion flag to step B;

D. Determine whether the channel-coded data stream needs to be selected according to the TTI size. If the TTI is 5ms or 10ms, the data stream is directly stored in the first interleaved RAM. Otherwise, according to the channel coding type of the data stream. The data is selected by a 24-bit mobile register, and then the data stream is stored in the first interleaved RAM;

E. The data is sequentially read out in the order in which the data is stored in the first interleave RAM, and rate matching and multiplexing of the transport channels are performed, and then the processed data is written into the second interleave RAM. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step A, the N is ≤ 8. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step A, the TTI is one of 5 ms, 10 ms, 20 ms, 40 ms or 80 ms. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step B, when the coding type of the channel coding is conv 1/3 convolutional coding, and the ΤΉ is 20 ms, the coding control A variable selector cy _C l _e _sel is added to the module, and the state machine in the code control module is automatically flipped when it is in a non-initial state. The TD-SCDMA uplink transmission channel processing method according to claim 4, wherein when the variable selector _C y _C l _e _sel is high, other related variables in the program change in the original mechanism. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step C, the channel coding comprises convolutional coding and turboscopic turbo coding. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step D, the data stream is stored in the data interleaving sequence in the first interleave RAM and the transmission channel sequence in step A The row processing order is consistent until the data stream of the last transport channel is written. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step D, the first interleaved RAM has a storage space of 10 ms. The TD-SCDMA uplink transmission channel processing method according to claim 1, wherein in the step D, the 24-bit mobile register adopts a ping-pong buffer structure. The TD-SCDMA uplink transmission channel processing method according to claim 9, wherein in the step D, the method of selecting data by using a 24-bit mobile register according to a channel coding type of the data stream is: using two 24 bits The shift register cross-writes the encoded data into two shift registers. When any of the shift registers 24 bits is written, the bit data belonging to the same frame is selected from the shift register according to the one-time interleaving pattern.