CN101174937A - Method for transmission channel multiplexing of ascending link route - Google Patents
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Abstract
The present invention provides a method for the uplink transmission channel multiplexing; the method comprises the following steps that: firstly, all transmission blocks of a plurality of transmission channels which need to be transmitted at the same time within the interval of 10ms are processed; secondly, the processed coding blocks are transmitted, the step pauses after the data flow of one coding block is emitted, then the next step is implemented, the data flow of the next coding block is continue to emit when the completion mark of coding process appears; thirdly, the data flow formed in the second step is implemented with the process of channel coding, the coding completion mark is fed back to the second step after completion; fourthly, the data flow formed after the process of channel coding is read in the random memory of a first interweaving machine; fifthly, the data of every transmission channel is taken out and read in the random memory of a second interweaving machine after processing; sixthly, the data is read out from the random memory of the second interweaving machine and then is interwoven for the second time and implemented with the process of physical channel mapping; the present invention is characterized by the direct simple processing and algorithm and saving the address decoding logic and energy consumption.
Description
Technical field
The present invention relates to a kind of method that realizes that transmission channel is multiplexing, be specifically related to the transmission channel coding of the up link of wireless communication system, interweave for the first time, rate-matched and the multiplexing method of transmission channel.
Background technology
In the wireless communication system code multiplexing of transmission channel handle comprise mainly that cyclic redundancy check (CRC) code (Cyclic Redundancy Code is hereinafter to be referred as CRC) is additional, chnnel coding, interweave for the first time, rate-matched and transmission channel are multiplexing etc.Stipulated the transmission channel multiplexing process structure of Wideband Code Division Multiple Access (WCDMA) (Wideband Code Division Multiple Access is hereinafter to be referred as WCDMA) band processing system up link among the 3-G (Generation Three mobile communication system) international standard 3GPP 25.212.
Detailed description about the multiplexing of up link and coding sees also 3-G (Generation Three mobile communication system) international standard 3GPP 25.212.Only just make brief description herein with the closely related part of the present invention.Usually, the data of each transmission channel are unit with the transmission block, according to Transmission Time Interval (TransmitTime Interval, hereinafter to be referred as TTI) transmit, business for the different delay requirement, can use different TTI, 3GPP regulation, TTI can be a kind of among 10ms, 20ms, 40ms and the 80ms.In order to improve reliability of data transmission, data block is carried out the additional and chnnel coding of CRC at transmitting terminal.Chnnel coding can be convolutional encoding or special rich (to call Turbo in the following text) coding.To through the data flow after the error correction coding, carry out wireless frame length equilibrium, for example in the end the afterbody of a frame is filled dummy bits, so that the data bit number of each frame in TTI equates.Data flow through wireless frame length equilibrium is carried out interweaving the first time, and promptly interframe interweaves.The main purpose that interweaves is burst error to be upset become random error and be beneficial to decoder and carry out error correction, improves the anti fading ability.As a TTI during, the input bit sequence need be carried out segmentation and transmit to be mapped to a plurality of radio frames greater than 10ms.Bit number on transmission channel is along with different TTI may change, in up link when bit number changes between different TTI, data bit will be retransmitted or punch, and is identical with total bit rate of the DPCH of distribution to guarantee the total bit rate after transmission channel is multiplexing.Through after the above-mentioned processing, take out frame data from each transmission channel, end to endly be multiplexed into a coded composite transport channel, be to be mapped on one or more physical channels after intra-frame interleaving is handled to send by interweaving for the second time.
Application number is 01136715.6, publication number is CN1347219A, invention is artificial uncommon perhaps refined, the Chinese patent application that name is called " a kind of method of the WCDMA of realization up channel demultiplexing " has proposed a kind of multiplexing method of quick realization uplink transmission channels, main feature is only to use random asccess memory (Random Access Memory in the A-class picture, hereinafter to be referred as RAM), to reduce to handle time-delay and processing buffer memory.From subrange, the method that above-mentioned patent application relates to can be saved some resources really and be reduced some processing times.
Yet, from the processing of whole up link, comprise processing such as spread spectrum, scrambling and modulation (handling) to call TX in the following text, in this processing method, after realizing the interleaving treatment second time, to carry out second level buffer memory inevitably from the ram in slice sense data.Otherwise because the result that TX handles is the continuous data stream that forms 10ms, it has been full of whole 10ms.Also do not run through before the data of previous coding compound channel in the TX processing, the data of next coding compound channel may need to write the RAM that interweaves for the first time, may override the data of present frame like this.Therefore generally, still need two-level cache, so as if do not save the RAM resource.This is first deficiency.
Secondly, the method that above-mentioned patent application proposes, the addressing system complexity realizes for hardware, can increase extra expense.
In addition, RAM adopts the RAM (above-mentioned patent application is to the word length not specified (NS) of RAM) of 1bit width word length if interweave for the first time, at this moment the scope of address space is maximum, so the area that address decoding logic at this moment takies is maximum, corresponding power consumption also must be maximum, and this unconventional RAM is not easy to back end design.
Based on the above-mentioned deficiency of described patent application, we propose a kind of multiplexing method of transmission channel of new up link.
Summary of the invention
The objective of the invention is for overcoming the multiplexing method of transmission channel that the problems referred to above propose a kind of simple and practical up link, it can overcome the shortcoming of the Processing Algorithm complexity of above-mentioned patent application, solves only to adopt level cache may cause the data of present frame by the problem that data covered of next frame.And adopt reasonably interweave RAM structure and gated clock that the power consumption of whole multiplexing process is reduced greatly.
In view of above-mentioned purpose, the invention provides a kind of multiplexing method of transmission channel of up link, may further comprise the steps:
Step 1): all transmission blocks that current 10ms needed a plurality of transmission channels of transmitting simultaneously in the time interval, according to the descending order of TTI, the transmission block of each transmission channel of serial process successively, above-mentioned processing comprise that CRC is additional, the cascade of transmission block and the segmentation of encoding block etc.; If do not have this moment transmission block to need to handle, and have data to need to handle in the random asccess memory that interweaves for the first time, then direct execution in step 5);
Step 2): transmit treated encoding block, just suspend this step 2 after each data flow that has transmitted an encoding block) operation, execution in step 3), wait is by the appearance of the coding complement mark signal of the chnnel coding of this encoding block of step 3) feedback, after above-mentioned coding complement mark occurs, just then transmit the data flow of next encoding block, the rest may be inferred, transmits up to all encoding blocks to finish;
The data flow of the encoding block that forms step 3): to step 2) is carried out chnnel coding, generates data word stream after finishing and produces a coding complement mark, and above-mentioned coding complement mark is fed back to step 2);
Step 4): will write the RAM that interweaves for the first time successively through the data word that generates after chnnel coding stream, the serial process of each transmission channel is consistent in proper order in the order that writes and the step 1), flows up to the data word of having write last transmission channel;
Step 5): the data of from the RAM that interweaves for the first time, taking out each transmission channel successively according to the order of the original sequence number of transmission channel, carry out that interweave with the first time and rate-matched, realize the multiplexing of transmission channel simultaneously, and the data after will handling are written to the RAM that interweaves for the second time;
Step 6): sense data carries out interweaving the second time and the physical channel mapping from the RAM that interweaves for the second time.
Wherein above-mentioned steps 3) in chnnel coding comprise convolutional encoding or Turbo coding.Above-mentioned steps 4) RAM in is single port RAM, and its word length is any one in 8 bits, 16 bits and 32 bits, its objective is to save address decoding logic and power consumption, is beneficial to back-end realization simultaneously.Will write successively when interweaving RAM for the first time through the data word stream that generates after the chnnel coding above-mentioned steps 4), it is continuous writing the address.Above-mentioned steps 5) random asccess memory that interweaves the second time in adopts the ping-pong buffer structure, its word length is 15 or 30 bits, adopt the 30 bit word lengths can the simplified addressing Processing Algorithm, and each 10ms reads frame data and handles, and can not cause the data of present frame to be override by the data of next frame.In step 4), each when writing the last character of handled transmission channel, if this word is not filled up by data bit, then insert 0 bit at vacant bit.Use gated clock during the transmission channel of above-mentioned up link is multiplexing, in the processing time, open clock signal, and close clock at one's leisure, that is to say and close the processing clock of step 1), when the next 10ms time interval begins to handle, open clock signal again up to each step of step 5).
Adopt the method for the invention, compared with prior art, simplified handling process, reduced the processing complexity, realized the multiplexing scheme of the transmission channel of complicated WCDMA up link with less cost.
The method of the invention is compared with foregoing patent application, has following advantage:
(1) Processing Algorithm is simply direct, and handling process is simply distinct;
(2) reasonably arrange to interweave for the first time structure of RAM helps saving address decoding logic and power consumption, also is convenient to back-end realization;
(3) adopt gated clock, reduce the power consumption of whole multiplexing process greatly;
(4) having solved the data that leave the present frame among the RAM that interweaves for the first time in may be by the problem of the data of next frame covering.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.For the person of ordinary skill in the field, from detailed description of the invention, above-mentioned and other purposes of the present invention, feature and advantage will be apparent.
Description of drawings
Fig. 1 is the multiplexing process chart of transmission channel coding that the present invention realizes the WCDMA up link.
Fig. 2 is first the interweave structure of RAM and the memory location of transmission channel that the present invention adopts.
Embodiment
Below in conjunction with the drawings and specific embodiments the multiplexing method of the transmission channel of a kind of up link of the present invention is described in further detail.
The flow chart of the processing that the transmission channel coding of up link of the present invention is multiplexing please refer to Fig. 1.At first execution in step 101, current 10ms is needed the N that transmits simultaneously at interval, and (N is the limited nature number, N=8 for example) all transmission blocks of individual transmission channel, according to the descending order of TTI, serially the transmission block of each transmission channel is carried out successively that CRC is additional, the cascade of transmission block and the segmentation of encoding block; After the transmission block of current transmission channel is handled, then handle the data of next transmission channel, to the last the data processing of a transmission channel finishes.If do not have this moment data to need to handle, and have data to need to handle in the random asccess memory that interweaves for the first time, then direct execution in step 105.
Execution in step 102 is for transmitting treated encoding block then, and the data flow of the intact encoding block of every transmission is just suspended the operation of this step, and wait is by the appearance of the coding complement mark signal of the chnnel coding of this encoding block of step 103 feedback.Treat that this coding complement mark occurs, just then transmit the data flow of next encoding block, the rest may be inferred, disposes up to all encoding blocks, forms the encoding block bit stream of a serial.Because the processing that chnnel coding will be inserted the tail bit, so can there be certain interval between each encoding block bit stream.
When step 102 was sent out data, step 103 was just carried out chnnel coding to the data flow of encoding block of input immediately.Chnnel coding can be convolutional encoding or Turbo coding.For convolutional encoding, code rate can be 1/2 or 1/3.For the Turbo coding, code rate is 1/3.Every coding finishes an encoding block, promptly produces the coding complement mark of this encoding block, feeds back to step 102, as the enabling signal of the data flow that transmits next encoding block.It is 2 that the data flow of channel coding back output converts word length to
nThe data word stream of (n=3,4 or 5) bit is sent into step 104.
Execution in step 104 is written to the RAM that interweaves for the first time successively to the data word stream behind the channel coding of step 103 generation.Clearly to write the order of the RAM that interweaves also be according to descending tactic of its TTI to each transmission channel.After having write the data of a transmission channel, then write the data of next transmission channel, up to the data of having write last transmission channel.Here RAM is single port RAM, and its word length is 16 bits, also can adopt the word length of 8 or 32 bits.Adopt the word length of 8,16 or 32 bits, help saving area and the power consumption that the address decoding logic takies, also be convenient to back-end realization.
The structure of RAM and position that each transmission channel is deposited interweave the first time in the step 104 as shown in Figure 2 in RAM.Wherein, the word length of RAM is 2
nBit, n can be 3,4 or 5, TrCH (Transport Channel) represents transmission channel.Among the figure, the original channel designator of transmission channel be i (i=1,2 ..., N), after each transmission channel sorted according to the descending order of its TTI, its channel designator still was numbered from small to large, with k (k=1,2 ..., N) represent.S (k) expression ordering back channel number is the original channel of channel before ordering number of k.In the process of writing the RAM that interweaves for the first time, can realize the radio frames equilibrium of transmission channel simultaneously.Because when writing the last character of handled transmission channel,, only need to insert ' 0 ' bit and get final product at vacant bit if this word is not filled up by data bit.
After the data of last transmission channel have been write, then enter step 105, realize interweaving for the first time, radio frame segmentation, rate-matched and transmission channel are multiplexing.From the RAM that interweaves for the first time, take out frame data (each 10ms only handles frame data of each transmission channel) of each transmission channel in order successively, carry out that interweave with first time and rate-matched, and the data after will handling are written to the RAM that interweaves the second time.Here to the processing sequence of transmission channel, carry out serially, promptly at first from the RAM that interweaves for the first time, read the data of first transmission channel, carry out that interweave with the first time and rate-matched according to the ascending order of its transmission number i.After handling the data of current transmission channel, then handle the data of next transmission channel, till the data of handling last transmission channel.Meanwhile, the bit stream after handling after becoming word length to be the word of 30 bits, serial to parallel conversion is deposited among the RAM that interweaves for the second time successively.In this process, also realized the multiplexing of radio frame segmentation and transmission channel automatically.
Clearly, the addressing system of the RAM that interweaves the first time here becomes very simple, and the data of certain transmission channel only need write in proper order or read and get final product.For interweaving for the first time, as long as according to its pattern that interweaves, choose corresponding bit and get final product, because word length just in time is 8 multiple, choosing of this bit becomes very simple.According to the rate-matched pattern, determine whether these bits need bit to retransmit or punching simultaneously.Moved in time among the RAM that interweaves for the second time owing to leave the data of the present frame among the RAM that interweaves for the first time in, therefore can not override by coming next frame data.
After the execution in step 105, then execution in step 106 promptly realizes physical channel segmentation and the interleaving treatment second time.The addressing of the RAM that interweaves here is also very simple, also is that order writes or calls over.To the data word of reading,, choose corresponding bit and get final product according to the pattern that interweaves for the second time.Carrying out physical channel mapping and TX then handles.The processing clock of step 106 is not the gated clock that above-mentioned steps is used.
The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; If do not break away from the spirit and scope of the present invention, the present invention is made amendment or is equal to replacement, all should be encompassed in the middle of the protection range of claim of the present invention.
Claims (7)
1. the multiplexing method of the transmission channel of a up link may further comprise the steps:
Step 1): all transmission blocks that current 10ms needed a plurality of transmission channels of transmitting simultaneously in the time interval, according to the descending order of Transmission Time Interval, the transmission block of each transmission channel of serial process successively, above-mentioned processing comprise that cyclic redundancy check (CRC) code is additional, the cascade of transmission block and the segmentation of encoding block; If do not have this moment transmission block to need to handle, and have data to need to handle in the random asccess memory that interweaves for the first time, then direct execution in step 5);
Step 2): transmit treated encoding block, just suspend this step 2 after each data flow that has transmitted an encoding block) operation, execution in step 3), wait is by the appearance of the coding complement mark signal of the chnnel coding of this encoding block of step 3) feedback, after above-mentioned coding complement mark occurs, just then transmit the data flow of next encoding block, the rest may be inferred, transmits up to all encoding blocks to finish;
The data flow of the encoding block that forms step 3): to step 2) is carried out chnnel coding, generates data word stream after finishing and produces a coding complement mark, and above-mentioned coding complement mark is fed back to step 2);
Step 4): will write the random asccess memory that interweaves for the first time successively through the data word that generates after chnnel coding stream, the serial process of each transmission channel is consistent in proper order in the order that writes and the step 1), flows up to the data word of having write last transmission channel;
Step 5): the data of from the random asccess memory that interweaves for the first time, taking out each transmission channel successively according to the order of the original sequence number of transmission channel, carry out that interweave with the first time and rate-matched, realize the multiplexing of transmission channel simultaneously, and the data after will handling are written to the random asccess memory that interweaves for the second time;
Step 6): sense data carries out interweaving the second time and the physical channel mapping from the random asccess memory that interweaves for the second time.
2. method according to claim 1 is characterized in that above-mentioned steps 3) in chnnel coding comprise convolutional encoding or special rich coding.
3. method according to claim 1 is characterized in that above-mentioned steps 4) in random asccess memory be the single port random asccess memory, its word length is any one in 8 bits, 16 bits and 32 bits.
4. method according to claim 1 is characterized in that above-mentioned steps 4) in will write successively when interweaving random asccess memory for the first time through the data word that generates after chnnel coding stream, it is continuous writing the address.
5. method according to claim 1 is characterized in that above-mentioned steps 5) in the random asccess memory that the interweaves second time adopt the ping-pong buffer structure, its word length is 15 or 30 bits.
6. method according to claim 1 is characterized in that in above-mentioned steps 4) in, each when writing the last character of handled transmission channel, if this word is not filled up by data bit, then insert 0 bit at vacant bit.
7. according to each described method among the claim 1-6, the multiplexing middle gated clock that uses of transmission channel that it is characterized in that above-mentioned up link, promptly in above-mentioned steps 5) finish after, close the processing clock of step 1), when the next 10ms time interval begins to handle, open clock signal again up to each step of step 5).
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| CN101488833B (en) * | 2009-01-20 | 2011-07-06 | 北京天碁科技有限公司 | Uplink channel encoding method and downlink channel decoding method for TD-SCDMA system |
| CN102340319A (en) * | 2010-07-21 | 2012-02-01 | 中兴通讯股份有限公司 | Turbo code rate matching method and device |
| CN103078702A (en) * | 2012-12-28 | 2013-05-01 | 华为技术有限公司 | Data interleaving processing method, device and system |
| CN103378940A (en) * | 2012-04-17 | 2013-10-30 | 马维尔国际有限公司 | Uplink channel coding method and device for TD-SCDMA system |
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| CN106936500A (en) * | 2015-12-30 | 2017-07-07 | 华为技术有限公司 | The transmission method and device of a kind of optical signal, system |
| CN106936500B (en) * | 2015-12-30 | 2020-02-14 | 华为技术有限公司 | Optical signal transmission method, device and system |
| CN109120373A (en) * | 2017-06-23 | 2019-01-01 | 华为技术有限公司 | A kind of channel coding method, data receiver method and relevant device |
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