CN106449915B - Growth method of light-emitting diode epitaxial wafer - Google Patents
Growth method of light-emitting diode epitaxial wafer Download PDFInfo
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- 239000010980 sapphire Substances 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
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Abstract
The invention discloses a growth method of a light-emitting diode epitaxial wafer, and belongs to the technical field of semiconductors. The growth method comprises the following steps: growing a low-temperature buffer layer, a high-temperature buffer layer, an N-type layer, an MQW layer and a P-type layer on a substrate in sequence, wherein the MQW layer comprises InGaN quantum well layers and GaN quantum barrier layers which are alternately stacked; the quantum well layer is divided into a first type quantum well, a second type quantum well and a third type quantum well, the growth temperature of the quantum well layer In the first type quantum well is reduced layer by layer, the In content of the quantum well layer In the second type quantum well is changed layer by layer, the ratio of the In content to the Ga content of the quantum well layer In the third type quantum well is reduced layer by layer, and all the quantum well layers sequentially belong to the first type quantum well, the second type quantum well and the third type quantum well along the growth direction of the light-emitting diode epitaxial wafer. The invention can effectively improve the overlapping degree of the electron wave function and the hole wave function, and finally improves the luminous efficiency of the LED.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of growing method of LED epitaxial slice.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is a kind of semi-conductor electricity that can be luminous
Subcomponent.As a kind of New Solid lighting source efficiently, environmentally friendly, green, LED is widely used in rapidly traffic signals
Lamp, automobile interior exterior lamp, landscape light in city, cell phone back light source etc..
The epitaxial wafer of existing LED includes substrate and stacks gradually low temperature buffer layer, high temperature buffer layer, N on substrate
Type layer, multiple quantum wells (English: Multiple Quantum Well, abbreviation: MQW) layer, P-type layer.Wherein, mqw layer includes alternating
The quantum well layer and quantum barrier layer of stacking, the growth conditions of each quantum well layer is identical, the growth conditions phase of each quantum barrier layer
Together.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The polarity effect of mqw layer can generate electric field in quantum well layer, enable band run-off the straight, change sub-band energy level and beam
State wave function is tied up, transition energy is caused to change with intensity.Electric field is spatially separating electrons and holes, reduces electron waves
Function is overlapping with hole wave functions, reduces the radiation recombination efficiency of electrons and holes, greatly reduces the luminous effect of LED
Rate.
Summary of the invention
In order to solve problems in the prior art, the embodiment of the invention provides a kind of growth sides of LED epitaxial slice
Method.The technical solution is as follows:
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, the growing method includes:
Successively growing low temperature buffer layer, high temperature buffer layer, N-type layer, mqw layer, P-type layer, the mqw layer include on substrate
Alternately stacked InGaN quantum well layer and GaN quantum barrier layer；
The quantum well layer is divided into first kind Quantum Well, the second class Quantum Well, three kinds of third class Quantum Well, the first kind
Quantum Well, the second class Quantum Well, the third class Quantum Well include at least two layers adjacent quantum well layer, described
The growth temperature of the quantum well layer in first kind Quantum Well is successively dropped along the direction of growth of the LED epitaxial slice
It is low, the In content of the quantum well layer in the second class Quantum Well along the LED epitaxial slice the direction of growth by
Layer changes, and the In content of the quantum well layer in the third class Quantum Well and the ratio of Ga content are along the light emitting diode
The direction of growth of epitaxial wafer successively reduces, all quantum well layers along the LED epitaxial slice the direction of growth successively
Belong to the first kind Quantum Well, the second class Quantum Well, the third class Quantum Well.
Optionally, the number of plies of the quantum well layer is at least 12 layers, and the number of plies of the quantum barrier layer is at least 12 layers.
Preferably, the number of plies of the quantum well layer is 12~16 layers, and the number of plies of the quantum barrier layer is 12~16 layers.
Optionally, the quantum barrier layer is divided into that first kind quantum is built and the second class quantum is built, the first kind quantum build and
The second class quantum barrier layer includes at least one layer of quantum barrier layer, the quantum barrier layer in the first kind quantum base
The growth temperature of intermediate region be higher than the growth temperature of two side areas, the first kind quantum build in the quantum barrier layer
The growth rate of intermediate region is higher than the growth rate of two side areas, the life of the quantum barrier layer in the second class quantum base
Long temperature remains unchanged, and the growth rate of the quantum barrier layer in the second class quantum base remains unchanged, all amounts
The part quantum barrier layer in sub- barrier layer belongs to the first kind quantum and builds, and the remaining quantum barrier layer belongs to described second
Class quantum is built.
Preferably, at least half of quantum barrier layer belongs to the first kind quantum base in all quantum barrier layers.
Preferably, the growth temperature of the two side areas of the quantum barrier layer in the first kind quantum base is higher than the amount
The maximum growth temperature of sub- well layer.
Preferably, the growth rate of the two side areas of the quantum barrier layer in the first kind quantum base is higher than the amount
The most fast growth rate of sub- well layer.
Optionally, the P-type layer includes electronic barrier layer and hole provides layer, and the electronic barrier layer is doping Mg
AlyGa1-yN layers, 0.15≤y≤0.25, it is the GaN layer that doping is higher than setting concentration Mg that the hole, which provides layer,.
Optionally, the N-type layer is the GaN layer that doping is higher than setting concentration Si.
Optionally, the growing method further include:
Substrate is pre-processed.
Technical solution provided in an embodiment of the present invention has the benefit that
By growing the amount that growth temperature is successively reduced along the direction of growth of LED epitaxial slice close to N-type layer section
Sub- well layer makes In distribution from less to more, is conducive to the stress release of InGaN and GaN；Close to P-type layer section growth In content and
The quantum well layer that the ratio of Ga content successively reduces along the direction of growth of LED epitaxial slice, gradually reduces In, InGaN
Stress between GaN is released；The two can act as the effect for reducing polarity effect, and then reduce the distortion journey of well layer
Degree improves the overlapping degree of electron wave function and hole wave functions, and it is multiple to effectively improve radiation of the electrons and holes in Quantum Well
Close efficiency.And the growth temperature of the intermediate region of the quantum barrier layer in first kind quantum base is higher than the growth temperature of two side areas
Degree, i.e., it is lower close to the temperature of well layer, it can protect quantum well layer, precipitation when reducing barrier layer high temperature to its In, and meanwhile it is intermediate
Crystal quality both can be improved in the barrier layer of high temperature, and very big destruction will not be caused to well layer.Quantum in first kind quantum base
The growth rate of the intermediate region of barrier layer is higher than the growth rate of two side areas, i.e., is lower than high temperature section close to the speed of growth of well layer
The growth rate of barrier layer, that is, the growth rate of high temperature section is high, can reduce destruction of the high temperature section to well layer, quantum barrier layer in this way
The luminous efficiency of LED is finally improved with the fit structure of quantum well layer.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of flow chart of the growing method of LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of mqw layer provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment
The embodiment of the invention provides a kind of growing methods of LED epitaxial slice, in the present embodiment, use
Veeco K465i or C4 metallo-organic compound chemical gaseous phase deposition (English: Metal Organic Chemical Vapor
Deposition, referred to as: MOCVD) equipment realize LED epitaxial wafer growing method.Using high-purity hydrogen (H2) or high pure nitrogen
(N2) or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As the source N, trimethyl gallium (TMGa) and triethyl-gallium
(TEGa) it is used as gallium source, trimethyl indium (TMIn) is used as indium source, and silane (SiH4) is used as N type dopant, trimethyl aluminium (TMAl)
As silicon source, two luxuriant magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is controlled in 100~600torr.
Referring to Fig. 1, which includes:
Step 201: substrate is pre-processed.
In the present embodiment, substrate is sapphire.
Specifically, which may include:
In a hydrogen atmosphere, 5~6min of high-temperature process substrate.
Wherein, reaction chamber temperature can be 1000~1100 DEG C, and chamber pressure can control in 200~500torr.
Step 202: growing low temperature buffer layer on substrate.
In the present embodiment, low temperature buffer layer is GaN layer, and thickness can be 15~30nm.When growing low temperature buffer layer, instead
Answering room temperature can be 530~560 DEG C, and chamber pressure can control in 200~500torr.
Specifically, low temperature buffer layer is grown on sapphire [0001] face.
Step 203: high temperature buffer layer is grown on low temperature buffer layer.
In the present embodiment, high temperature buffer layer is the GaN layer to undope, and thickness can be 2~3.5 μm.It is slow to grow high temperature
When rushing layer, reaction chamber temperature can be 1000~1100 DEG C, and chamber pressure can control in 200~600torr.
Step 204: N-type layer is grown on high temperature buffer layer.
In the present embodiment, N-type layer is the GaN layer that doping is higher than setting concentration Si, and thickness can be 1~2 μm.Grow N
When type layer, reaction chamber temperature can be 1000~1100 DEG C, and chamber pressure can control in 200~600torr.
Step 205: mqw layer is grown in N-type layer.
In the present embodiment, referring to fig. 2, mqw layer 50 includes that alternately stacked InGaN quantum well layer 510 and GaN quantum are built
Layer 520.
Quantum well layer 510 is divided into first kind Quantum Well 511, the second class Quantum Well 512,513 3 kinds of third class Quantum Well, the
A kind of Quantum Well 511, the second class Quantum Well 512, third class Quantum Well 513 include at least two layers adjacent quantum well layer 510,
The growth temperature of quantum well layer 510 in first kind Quantum Well 511 is successively reduced along the direction of growth of LED epitaxial slice,
The In content of quantum well layer 510 in second class Quantum Well 512 successively changes along the direction of growth of LED epitaxial slice, the
The In content of quantum well layer 510 in three classes Quantum Well 513 and the ratio of Ga content are along the growth side of LED epitaxial slice
Reduce to layer-by-layer, all quantum well layers 510 successively belong to first kind Quantum Well along the direction of growth of LED epitaxial slice
511, the second class Quantum Well 512, third class Quantum Well 513.
It should be noted that life of the growth temperature of the quantum well layer in first kind Quantum Well along LED epitaxial slice
Length direction successively reduces, and is distributed the In of the quantum well layer in first kind Quantum Well from less to more, is conducive to InGaN's and GaN
Stress release can effectively reduce stress to reduce defect concentration, prepare for the main trap that shines below close to P-type layer；The
The In content of quantum well layer in two class Quantum Well successively changes along the direction of growth of LED epitaxial slice, forms localized modes
Luminescent quantum dot, the recombination probability of electrons and holes can be improved to a certain extent；Quantum well layer in third class Quantum Well
In content and the ratio of Ga content successively reduce along the direction of growth of LED epitaxial slice, make in third class Quantum Well
The In content of quantum well layer gradually reduces, and can prevent the diffusion of In from causing the destruction to crystal quality.
Further, quantum barrier layer 520 is segmented into first kind quantum base 521 and the second class quantum builds 522, first kind amount
It includes at least one layer of quantum barrier layer 520 that son base 521 and the second class quantum, which build 522, and first kind quantum builds the quantum barrier layer in 521
The growth temperature of 520 intermediate region is higher than the growth temperature of two side areas, and first kind quantum builds the quantum barrier layer 520 in 521
Intermediate region growth rate be higher than two side areas growth rate, the second class quantum build 522 in quantum barrier layer 520 life
Long temperature remains unchanged, and the growth rate that the second class quantum builds the quantum barrier layer 520 in 522 remains unchanged, all quantum barrier layers
Part quantum barrier layer 520 in 520 belongs to first kind quantum and builds 521, and remaining quantum barrier layer 520 belongs to the second class quantum base
522。
Optionally, at least half of quantum barrier layer 520 may belong to first kind quantum base 521 in all quantum barrier layers 520.
This improves a lot to the crystal quality of entire MQW, it is contemplated that the complexity of growth, so not making all quantum barrier layers
Belong to first kind quantum base.
Optionally, the growth temperature that first kind quantum builds the two side areas of the quantum barrier layer 520 in 521 can be higher than quantum
The maximum growth temperature of well layer 510.In addition first kind quantum builds the growth temperature of the intermediate region of the quantum barrier layer 520 in 521
Higher than the growth temperature of two side areas, it can both guarantee that crystal quality will not cause biggish destruction to trap.According to constant temperature
Growth can be very small to the destruction of trap when being not much different with trap temperature, but will be greatly reduced the total quality of entire Quantum Well；
When larger with the temperature difference of trap temperature, the crystal quality of Quantum Well can be greatly improved, but also can destruction to trap it is very serious,
It finally can all cause the reduction of luminous efficiency.
Optionally, the growth rate that first kind quantum builds the two side areas of the quantum barrier layer 520 in 521 can be higher than quantum
The most fast growth rate of well layer 510.In addition first kind quantum builds the growth rate of the intermediate region of the quantum barrier layer 520 in 521
Higher than the growth rate of two side areas, it both will not be obviously corrupted to trap, also can guarantee that crystal quality is not deteriorated, while being also able to cooperate
The growth temperature that first kind quantum builds the intermediate region of the quantum barrier layer 520 in 521 is higher than the growth temperature of two side areas, high temperature
Duan Bijing is that have centainly to destroy to trap, so growth rate is fast, to reduce the growth time of high temperature section.
Optionally, the number of plies of quantum well layer 510 can be at least 12 layers, and the number of plies of quantum barrier layer 520 can be at least 12
Layer.If 12 layers are less than, since quantum well layer 510 is divided into first kind Quantum Well 511, the second class Quantum Well 512, third class Quantum Well
513 3 kinds, first kind Quantum Well 511, the second class Quantum Well 512, third class Quantum Well 513 include at least two layers adjacent amount
Sub- well layer 510, the effect of quantum well layer structure are poor.
Preferably, the number of plies of quantum well layer 510 can be 12~16 layers, and the number of plies of quantum barrier layer 520 can be 12~16
Layer.If being more than 16 layers, it on the one hand will increase more cost, on the other hand also will increase the polarity effect of trap, influence electronics and sky
The recombination luminescence efficiency in cave.The number of plies is more excellent at 12~16 layers, can both play quantum well layer structure bring beneficial effect, also not
It will increase more cost and increase polarity effect.
Step 206: the growing P-type layer on mqw layer.
In the present embodiment, P-type layer includes that electronic barrier layer and hole provide layer.Electronic barrier layer is doping Mg
AlyGa1-yN layers, 0.15≤y≤0.25, thickness can be 30~50nm.When growing electronic barrier layer, reaction chamber temperature can be
930~970 DEG C, chamber pressure can control in 100torr.It is the GaN layer that doping is higher than setting concentration Mg that hole, which provides layer,
Thickness can be 50~80nm.When growing hole and providing layer, reaction chamber temperature can be 940~980 DEG C, and chamber pressure can be with
Control is in 200~600torr.
Step 207: activation P-type layer.
Specifically, activation time can be 30min.Wherein, reaction chamber temperature can be 650~750 DEG C.
It should be noted that activation P-type layer is mainly to activate hole to provide the Mg adulterated in layer, generated more after activating Mg
More holes avoids causing Ohmic contact poor due to not activating, and causes chip brightness low and the high situation of voltage.
Plate the tin indium oxide metal oxygen of 110nm under identical process conditions to the first sample and the second sample separately below
Compound (English: Indium Tin Oxides, referred to as: ITO) layer, the Cr/Pt/Au electrode of 120nm and the SiO of 40nm2Protection
Layer, and respectively will treated the first sample and the second sample grinding and cutting at 305 μm * 635 μm (12mi*25mil) core particles
With the core particles of 229 μm * 559 μm (9mi*22mil).Wherein, the first sample is the life using traditional LED epitaxial slice
What long method obtained, the second sample is obtained using the growing method of LED epitaxial slice provided in this embodiment.
Then the same position of the first sample and the second sample after treatment respectively selects 200 crystal grain, identical
Under process conditions, it is packaged into white light LEDs.Using integrating sphere respectively under the conditions of driving current 120mA and 60mA test from
The photoelectric properties of the crystal grain of first sample and the crystal grain from the second sample.
The results show that from the second sample crystal grain compared with than from the crystal grain of the first sample, light intensity exists respectively
It is significantly improved under 120mA and 60mA driving current, illustrates that electron waves can be improved in growing method provided in this embodiment really
It the overlapping degree of function and hole wave functions and effectively reduces the formation of non-radiative recombination center and finally improves luminous efficiency.
The embodiment of the present invention is by growing growth temperature along the direction of growth of LED epitaxial slice close to N-type layer section
The quantum well layer successively reduced makes In distribution from less to more, is conducive to the stress release of InGaN and GaN；Close to P-type layer section
The quantum well layer that successively reduces along the direction of growth of LED epitaxial slice of ratio of growth In content and Ga content, make In by
Step is reduced, and the stress between InGaN and GaN is released；The two can act as the effect for reducing polarity effect, and then reduce
The degreeof tortuosity of well layer improves the overlapping degree of electron wave function and hole wave functions, effectively improves electrons and holes in quantum
Radiation recombination efficiency in trap.And the growth temperature of the intermediate region of the quantum barrier layer in first kind quantum base is higher than two lateral areas
The growth temperature in domain, i.e., it is lower close to the temperature of well layer, it can protect quantum well layer, analysis when reducing barrier layer high temperature to its In
Out, while crystal quality both can be improved in the barrier layer of intermediate high temperature, and very big destruction will not be caused to well layer.First kind quantum
The growth rate of the intermediate region of quantum barrier layer in base is higher than the growth rate of two side areas, i.e., close to the speed of growth of well layer
Lower than the growth rate of high temperature section barrier layer, that is, the growth rate of high temperature section is high, can reduce high temperature section in this way and break to well layer
Bad, the fit structure of quantum barrier layer and quantum well layer finally improves the luminous efficiency of LED.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of growing method of LED epitaxial slice, the growing method include:
Successively growing low temperature buffer layer, high temperature buffer layer, N-type layer, mqw layer, P-type layer, the mqw layer include alternating on substrate
The InGaN quantum well layer and GaN quantum barrier layer of stacking；
It is characterized in that, the quantum well layer is divided into first kind Quantum Well, the second class Quantum Well, three kinds of third class Quantum Well, institute
Stating first kind Quantum Well, the second class Quantum Well, the third class Quantum Well includes at least two layers adjacent quantum
Well layer, the growth temperature of the quantum well layer in the first kind Quantum Well is along the growth side of the LED epitaxial slice
It is reduced to layer-by-layer, the life of the In content of the quantum well layer in the second class Quantum Well along the LED epitaxial slice
Length direction successively changes, and the In content of the quantum well layer in the third class Quantum Well and the ratio of Ga content are along the hair
The direction of growth of optical diode epitaxial wafer successively reduces, growth of all quantum well layers along the LED epitaxial slice
Direction successively belongs to the first kind Quantum Well, the second class Quantum Well, the third class Quantum Well；
The quantum barrier layer is divided into first kind quantum and builds and the second class quantum base, the first kind quantum base and the second class amount
Sub- barrier layer includes at least one layer of quantum barrier layer, the intermediate region of the quantum barrier layer in the first kind quantum base
Growth temperature is higher than the growth temperature of two side areas, the life of the intermediate region of the quantum barrier layer in the first kind quantum base
Long rate is higher than the growth rate of two side areas, and the growth temperature of the quantum barrier layer in the second class quantum base is kept not
Become, the growth rate of the quantum barrier layer in the second class quantum base remains unchanged, the portion in all quantum barrier layers
Divide the quantum barrier layer to belong to the first kind quantum to build, the remaining quantum barrier layer belongs to the second class quantum and builds.
2. growing method according to claim 1, which is characterized in that the number of plies of the quantum well layer is at least 12 layers, institute
The number of plies for stating quantum barrier layer is at least 12 layers.
3. growing method according to claim 2, which is characterized in that the number of plies of the quantum well layer is 12~16 layers, institute
The number of plies for stating quantum barrier layer is 12~16 layers.
4. described in any item growing methods according to claim 1~3, which is characterized in that in all quantum barrier layers at least
The quantum barrier layer of half belongs to the first kind quantum and builds.
5. described in any item growing methods according to claim 1~3, which is characterized in that the institute in the first kind quantum base
The growth temperature for stating the two side areas of quantum barrier layer is higher than the maximum growth temperature of the quantum well layer.
6. described in any item growing methods according to claim 1~3, which is characterized in that the institute in the first kind quantum base
The growth rate for stating the two side areas of quantum barrier layer is higher than the most fast growth rate of the quantum well layer.
7. described in any item growing methods according to claim 1~3, which is characterized in that the P-type layer includes electronic barrier layer
Layer is provided with hole, the electronic barrier layer is the Al for adulterating MgyGa1-yN layers, 0.15≤y≤0.25, the hole provides layer
To adulterate the GaN layer for being higher than setting concentration Mg.
8. described in any item growing methods according to claim 1~3, which is characterized in that the N-type layer is that doping is higher than setting
The GaN layer of concentration Si.
9. described in any item growing methods according to claim 1~3, which is characterized in that the growing method further include:
Substrate is pre-processed.
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| CN108735864B (en) * | 2018-05-28 | 2019-08-23 | 华灿光电（浙江）有限公司 | A kind of preparation method of LED epitaxial slice |
| CN109545924B (en) * | 2018-09-26 | 2020-05-19 | 华灿光电(苏州）有限公司 | Light emitting diode epitaxial wafer and manufacturing method thereof |
| CN109671813B (en) * | 2018-11-07 | 2021-01-12 | 华灿光电（浙江）有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| CN109671814A (en) * | 2018-11-21 | 2019-04-23 | 华灿光电（浙江）有限公司 | A kind of LED epitaxial slice and its manufacturing method |
| CN109830578B (en) * | 2019-02-18 | 2020-06-09 | 湘能华磊光电股份有限公司 | Growth method of LED epitaxial structure |
| CN113328015B (en) * | 2021-06-04 | 2022-06-03 | 湘能华磊光电股份有限公司 | Method for manufacturing light emitting diode chip with improved brightness |
| CN114373838B (en) * | 2021-12-29 | 2024-02-09 | 南通同方半导体有限公司 | LED epitaxial wafer with quantum barrier layer silicon doping structure, growth method and manufacturing method thereof |
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