CN106405951B - Display substrate, manufacturing method thereof, display device and maintenance method thereof - Google Patents
Display substrate, manufacturing method thereof, display device and maintenance method thereof Download PDFInfo
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- CN106405951B CN106405951B CN201611025513.3A CN201611025513A CN106405951B CN 106405951 B CN106405951 B CN 106405951B CN 201611025513 A CN201611025513 A CN 201611025513A CN 106405951 B CN106405951 B CN 106405951B
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
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- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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Abstract
The invention relates to the technical field of display, and discloses a display substrate, a manufacturing method thereof, a display device and a maintenance method thereof. The display substrate includes gate lines and data lines for defining a plurality of pixel regions. The display substrate comprises a plurality of display units, each display unit comprises a pixel electrode and a thin film transistor which are arranged in the pixel area and corresponds to one pixel, wherein orthographic projection of a drain electrode of the thin film transistor on a plane of the display substrate is overlapped with orthographic projection of a grid line on the plane of the display substrate to form an overlapped area, so that welding can be performed in the overlapped area to short-circuit the pixel electrode and the grid line, and the drain electrode is cut, so that test signals on the grid line are transmitted to the pixel electrode, and pixel defects of the display device are maintained. In order to achieve the purpose of shorting the pixel electrode and the grid line, the drain electrode and the grid line are actually welded, and as the drain electrode and the grid line are made of metal materials, the welding success rate and the maintenance success rate are improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display substrate, a manufacturing method thereof, a display device, and a maintenance method thereof.
Background
In the technical field of flat panel display, a thin film transistor liquid crystal display device (Thin Film Transistor Liquid Crystal Display, TFT-LCD for short) has the advantages of small size, low power consumption, relatively low manufacturing cost and the like, and gradually takes the dominant role in the current flat panel display market.
The main structure of the TFT-LCD is an array substrate and a color film substrate of a pair box. The array substrate comprises a plurality of grid lines and a plurality of data lines which are distributed in a crossing manner and are used for limiting a plurality of pixel areas, each pixel area comprises a pixel electrode and a thin film transistor, the grid lines are electrically connected with the grid electrodes of the thin film transistors, the data lines are electrically connected with the source electrodes of the thin film transistors, the pixel electrodes are electrically connected with the drain electrodes of the thin film transistors, and pixel voltages are transmitted to the pixel electrodes by controlling the thin film transistors to be turned on.
The TN type TFT-LCD adopts a normally white mode. The normally white mode is that light becomes linearly polarized light after passing through the lower polarizing plate, and after passing through the liquid crystal without voltage, the optical rotation effect is generated, and the polarization direction is rotated by 90 degrees and is just the same as the optical axis direction of the upper polarizing plate, so that when the liquid crystal is not powered, the TFT-LCD is bright and is in the normally white mode. For the normally white mode, if the pixel defect is generated in the production process and is displayed as a bright spot at the rear end, the dark spot maintenance is needed, namely, the connection between the drain electrode and the pixel electrode is cut off by cutting, and the corresponding gate signal is introduced into the pixel electrode by welding so as to achieve the purpose of dark spot.
However, since the pixel electrode is made of a transparent conductive material, it is brittle and easily broken, resulting in low welding success rate.
Disclosure of Invention
The invention provides a display substrate, a manufacturing method thereof, a display device and a maintenance method thereof, which are used for solving the problem of low welding success rate when a grid line signal is introduced into a pixel electrode in a welding mode.
In order to solve the above technical problems, an embodiment of the present invention provides a display substrate, including:
a plurality of gate lines and a plurality of data lines, the gate lines and the data lines being alternately distributed to define a plurality of pixel regions;
a plurality of display units, each display unit comprising:
a pixel electrode disposed in the pixel region;
a thin film transistor for transmitting voltage to the pixel electrode, wherein the gate electrode of the thin film transistor is electrically connected with the gate line, the source electrode is electrically connected with the data line, the drain electrode is electrically connected with the pixel electrode,
the orthographic projection of the drain electrode on the plane of the display substrate is overlapped with the orthographic projection of the grid line on the plane of the display substrate to form an overlapped area.
As described above, preferably, the thin film transistor further includes an active layer, and the drain electrode includes a first portion and a second portion, where a front projection of the first portion on a plane of the display substrate at least partially overlaps a front projection of the active layer on the plane of the display substrate, and a front projection of the second portion on the plane of the display substrate does not completely overlap a front projection of the active layer on the plane of the display substrate;
the width of the second part is larger than that of the first part, and the orthographic projection of the second part on the plane of the display substrate overlaps with the orthographic projection of the grid line on the plane of the display substrate to form the overlapping area.
The display substrate as described above, preferably, the thin film transistor includes a gate electrode, and the gate electrode and the gate line are integrally formed;
the pixel electrode and the thin film transistor of each display unit are positioned on two opposite sides of the grid line, and the drain electrode extends to at least the upper part of the grid line from one side of the grid line and is electrically connected with the corresponding pixel electrode.
As described above, the display substrate preferably has two gate lines between two adjacent pixel regions;
each pixel region comprises two pixel electrodes which are arranged at a certain distance in the extending direction of the grid line, and the thin film transistors corresponding to two adjacent rows of pixel electrodes positioned at two sides of one data line are electrically connected with the data line and are electrically connected with different grid lines.
As described above, it is preferable that the thin film transistor is located between two gate lines between two adjacent pixel regions, and in the thin film transistors of the same two gate lines, orthographic projection portions of the two adjacent thin film transistors on a first plane parallel to an extending direction of the data line and perpendicular to a plane in which the display substrate is located overlap.
As described above, in the display substrate, it is preferable that for two pixel electrodes of a pixel region, one of the thin film transistors corresponding to one pixel electrode is electrically connected to one gate line located on one side of the pixel region, and the other of the thin film transistors corresponding to the other pixel electrode is electrically connected to one gate line located on the opposite side of the pixel region.
As described above, the display substrate preferably has a first gate line and a second gate line disposed between two adjacent pixel regions;
the thin film transistor comprises a first thin film transistor and a second thin film transistor, wherein a first gate electrode of the first thin film transistor and the first gate line are of an integrated structure, and a second gate electrode of the second thin film transistor and the second gate line are of an integrated structure;
the first gate electrode is positioned on one side of the first gate line, which is away from the second gate line, and the second gate electrode is positioned between the first gate line and the second gate line;
the first grid line and the second grid electrode are provided with bending structures matched with the second grid electrode in shape at the positions corresponding to the first grid line and the second grid electrode.
The embodiment of the invention also provides a display device which comprises the display substrate.
The embodiment of the invention also provides a manufacturing method of the display substrate, which comprises the following steps:
forming a plurality of gate lines and a plurality of data lines, the gate lines and the data lines being alternately distributed to define a plurality of pixel regions;
forming a plurality of display units, the step of forming each display unit comprising:
forming a pixel electrode in the pixel region;
and forming a thin film transistor for transmitting voltage to the pixel electrode, wherein a gate electrode of the thin film transistor is electrically connected with a gate line, a source electrode of the thin film transistor is electrically connected with a data line, and a drain electrode of the thin film transistor is electrically connected with the pixel electrode, wherein orthographic projection of the drain electrode on a plane of the display substrate is overlapped with orthographic projection of the gate line on the plane of the display substrate to form an overlapped area.
The embodiment of the invention also provides a maintenance method of the display device, which comprises the following steps:
cutting a drain electrode at a position close to an active layer of the thin film transistor, dividing the drain electrode into a first part and a second part which are insulated from each other, wherein the first part is close to the active layer of the thin film transistor, the second part is electrically connected with a pixel electrode, and the orthographic projection of the second part on a plane of the display substrate overlaps with the orthographic projection of the grid line on the plane of the display substrate to form the overlapping region;
welding is carried out in the overlapping area, and the second part of the drain electrode and the grid line are short-circuited;
the voltage signal is transmitted to the pixel electrode through the gate line.
The technical scheme of the invention has the following beneficial effects:
according to the technical scheme, the overlapping area is formed by overlapping the orthographic projection of the drain electrode on the plane of the display substrate and the orthographic projection of the grid line on the plane of the display substrate, so that welding can be performed in the overlapping area to short-circuit the pixel electrode and the grid line, the drain electrode is cut, a test signal on the grid line is transmitted to the pixel electrode, and poor pixel of the display device is maintained. In order to achieve the purpose of shorting the pixel electrode and the grid line, the drain electrode and the grid line are actually welded, and as the drain electrode and the grid line are both made of metal materials, the welding success rate is improved, and the product maintenance success rate is facilitated.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.
FIG. 1 is a schematic diagram of a display substrate according to an embodiment of the invention;
FIG. 2 shows a partial schematic view of the structure of FIG. 1;
FIG. 3 is a schematic diagram showing a second structure of a display substrate according to an embodiment of the invention;
fig. 4 shows a partial schematic structure of fig. 3.
Detailed Description
The following describes in further detail the embodiments of the present invention with reference to the drawings and examples. The following examples are illustrative of the invention and are not intended to limit the scope of the invention.
Referring to fig. 1 and 3, a display substrate according to an embodiment of the present invention includes:
a plurality of gate lines 10 and a plurality of data lines 60, the gate lines 10 and the data lines 60 being alternately distributed to define a plurality of pixel regions;
a plurality of display units, each display unit comprising:
a pixel electrode 1 disposed in the pixel region;
a thin film transistor for transmitting voltage to the pixel electrode 1, wherein the gate electrode 2 of the thin film transistor is electrically connected with the gate line 10, the source electrode 3 is electrically connected with the data line 60, and the drain electrode 4 is electrically connected with the pixel electrode 1, wherein the orthographic projection of the drain electrode 4 on the plane of the display substrate overlaps with the orthographic projection of the gate line 10 on the plane of the display substrate to form an overlapping region 100.
Correspondingly, the manufacturing method of the display substrate comprises the following steps:
forming a plurality of gate lines and a plurality of data lines, the gate lines and the data lines being alternately distributed to define a plurality of pixel regions;
forming a plurality of display units, the step of forming each display unit comprising:
forming a pixel electrode in the pixel region;
and forming a thin film transistor for transmitting voltage to the pixel electrode, wherein a gate electrode of the thin film transistor is electrically connected with a gate line, a source electrode of the thin film transistor is electrically connected with a data line, and a drain electrode of the thin film transistor is electrically connected with the pixel electrode, wherein orthographic projection of the drain electrode on the substrate and orthographic projection of the gate line on the substrate are overlapped to form an overlapping region.
In the technical solution of the present invention, the front projection of the drain electrode 4 on the plane of the display substrate overlaps with the front projection of the gate line 10 on the plane of the display substrate to form the overlapping region 100, so that the drain electrode 4 can be cut near the active layer of the thin film transistor (for example, the drain electrode 4 is cut along the dotted line in fig. 1 and 3), the drain electrode 4 is divided into a first portion 40 and a second portion 41 insulated from each other, the first portion 40 is disposed in contact with the active layer of the thin film transistor, the second portion 41 is electrically connected with the pixel electrode 1, and the front projection of the second portion 41 on the plane of the display substrate overlaps with the front projection of the gate line 10 on the plane of the display substrate to form the overlapping region 100. And welding is performed at the overlap region 100 to short the second portion 41 of the drain electrode 4 and the gate line 10, i.e., to short the pixel electrode 1 and the gate line 10. After the short circuit is successful, a voltage signal can be transmitted to the pixel electrode 1 through the grid line 10, and the pixel defect of the display device is maintained. In order to achieve the purpose of shorting the pixel electrode 1 and the gate line 10, it is actually welded that the second portion 41 of the drain electrode 4 and the gate line 10 are both made of metal materials, so that the welding success rate is improved, and the maintenance success rate is improved.
It should be noted that, in the present invention, each display unit corresponds to one pixel, and each display unit includes one thin film transistor and one pixel electrode.
The gate electrode 2 of the thin film transistor may be integrally formed with the gate line 10 and made of the same gate metal film. The source electrode 3 and the data line 60 can be integrally formed, and the drain electrode 4 and the source electrode 3 are of the same layer structure and are made of the same source-drain metal film. The gate metal and the source-drain metal may be Cu, al, ag, mo, cr, nd, ni, mn, ti, ta, W, etc. metals and alloys of these metals, and the gate metal film and the source-drain metal film may be of a single-layer structure or a multi-layer structure, such as Cu/Mo, ti/Cu/Ti, mo/Al/Mo, etc. A passivation layer is provided between the drain electrode 4 and the pixel electrode 1, and the drain electrode 4 and the pixel electrode 1 may be electrically connected through a via hole located in the passivation layer.
The display substrate in this embodiment may adopt a dual-gate structure, and the specific structure is: two gate lines 10 are disposed between two adjacent rows of pixel regions, and the number of the gate lines 10 is doubled. Each pixel region defined by the gate line 10 and the data line 60 includes two pixel electrodes 1 disposed at a certain distance in the extending direction of the gate line 10, and the thin film transistors corresponding to two adjacent columns of pixel electrodes 1 located at two sides of the data line 60 are electrically connected with the data line 60 and electrically connected with different gate lines 10, so that half of the data lines 60 are reduced, frames are reduced, and production cost is reduced. For a dual gate structure, each pixel region includes two pixel electrodes corresponding to two pixels.
For convenience of description, it is assumed that the drain electrode 4 includes a first portion 40 and a second portion 41, the first portion 40 and the second portion 41 are integrally formed, and the first portion 40 is disposed in contact with the active layer of the thin film transistor, that is, the orthographic projection of the first portion 40 on the plane of the display substrate at least partially overlaps with the orthographic projection of the active layer on the plane of the display substrate. The second portion 41 is electrically connected to the pixel electrode 1, and the orthographic projection of the second portion 41 on the plane of the display substrate and the orthographic projection of the active layer on the plane of the display substrate do not overlap at all. Wherein, the orthographic projection of the second portion 41 on the plane of the display substrate overlaps with the orthographic projection of the grid line 10 on the plane of the display substrate to form an overlapping region 100.
In this embodiment, the width of the second portion 41 of the drain electrode 4 is set to be larger than the width of the first portion 40, and by increasing the width of the second portion 41, the area of the formed overlap region 100 can be increased, further improving the welding success rate.
In order to realize that the orthographic projection of the drain electrode 4 on the plane of the display substrate overlaps with the orthographic projection part of the grid line 10 on the plane of the display substrate (hereinafter referred to as the drain electrode 4 and the grid line 10 are opposite), an overlapping region 100 is formed, and the position relationship of the thin film transistor, the grid line and the pixel electrode can be reasonably set on the premise of not changing the structure of the drain electrode 4; this can also be achieved by changing the structure of the drain electrode 4, for example: an integrally formed branch structure is added on the drain electrode 4, and the branch structure is partially opposite to the grid line 10 to form an overlapping region 100.
In a specific embodiment, the partial facing of the drain electrode 4 with the gate line 10 is achieved by:
as shown in fig. 1 and 2, the gate electrode 2 and the gate line 10 of the thin film transistor are integrally formed. The pixel electrode 1 and the thin film transistor of each display unit are located at two opposite sides of the gate line 10, the drain electrode 4 extends from one side of the gate line 10 at least to the upper side of the gate line 10 and is electrically connected with the corresponding pixel electrode 1, so that the drain electrode 4 is partially opposite to the gate line 10 to form an overlapping region 100.
Wherein the drain electrode 4 extends from one side of the gate line 10 at least to above the gate line 10 includes the following two cases: the drain electrode 4 extends from one side of the gate line 10 to above the gate line 10 (illustrated in fig. 1); the drain electrode 4 extends from one side of the gate line 10 to the opposite side, both of which enable the drain electrode 4 to be aligned with a portion of the gate line 10.
Further, the line width of the second portion 41 of the drain electrode 4 may be set to be larger than that of the first portion 40, so as to increase the area of the overlap region 100 and improve the welding success rate.
For a display substrate employing a dual gate structure, two gate lines 10 are provided between two adjacent pixel regions. Each pixel region includes two pixel electrodes 1 disposed at a certain distance in the extending direction of the gate line 10, and the thin film transistors corresponding to two adjacent rows of pixel electrodes 1 disposed at two sides of a data line 60 are electrically connected to the data line 60 and electrically connected to different gate lines 10. The method specifically comprises the following steps: for two pixel electrodes 1 of a pixel region, a thin film transistor corresponding to one pixel electrode 1 is electrically connected to one gate line 10 located on one side of the pixel region, and a thin film transistor corresponding to the other pixel electrode 1 is electrically connected to one gate line 10 located on the opposite side of the pixel region. The thin film transistor may be disposed between two gate lines 10 between two pixel regions, so that the pixel electrode 1 and the corresponding thin film transistor are located at two opposite sides of the gate line 10, and the drain electrode 4 extends from one side of the gate line 10 to at least above the gate line 10 and is electrically connected to the corresponding pixel electrode 1, so that the drain electrode 4 is partially opposite to the gate line 10, and an overlapping region 100 is formed.
It is understood that the drain electrode 4 extends from one side of the gate line 10 to at least above the gate line 10, and the manner of implementing the partial facing of the drain electrode 4 and the gate line 10 is not only suitable for the display substrate with dual gate structure, but also suitable for the display substrate with single gate structure.
Since the double gate structure has two gate lines 10 between two adjacent pixel regions, the width is large, which tends to reduce the pixel aperture ratio.
In order to solve the above technical problem, the thin film transistor may be disposed between two gate lines 10 between two adjacent pixel regions and in the thin film transistors of the same two gate lines 10, and orthographic projection portions of the two adjacent thin film transistors on a first plane, which is parallel to an extending direction of the data line and perpendicular to a plane in which the display substrate is located. That is, in the extending direction of the gate line 10, the adjacent two thin film transistors are not completely staggered in the extending direction of the data line 60, thereby reducing the width of the dual gate structure and increasing the pixel aperture ratio.
According to the specific embodiment, the position relation among the thin film transistor, the grid line and the pixel electrode is changed, so that the drain electrode and the corresponding pixel electrode are positioned on two sides of the grid line, the drain electrode extends to at least the upper part of the grid line from one side of the grid line and is electrically connected with the corresponding pixel electrode, and the drain electrode and the grid line are partially opposite to each other, so that an overlapping area is formed. The welding in the overlapping area can short-circuit the drain electrode and the grid line, so as to achieve the purpose of short-circuit the pixel electrode and the grid line, and accordingly, voltage signals can be transmitted to the pixel electrode through the grid line, and the pixel defect of the display device can be maintained.
In the above-described embodiment, for the display substrate of the double gate structure, the overlapping region is formed by disposing the thin film transistor between two gate lines 10 located between adjacent two pixel regions so that the drain electrode and the gate lines are partially aligned. Further, in the extending direction of the gate line 10, two adjacent thin film transistors are not completely staggered in the extending direction of the data line 60, so as to reduce the width of the dual gate structure and increase the pixel aperture ratio.
In another specific embodiment, for the display substrate of the dual gate structure, the drain electrode 4 is partially opposite to the gate line 10 by:
as shown in fig. 3 and 4, for convenience of description, a first gate line 11 and a second gate line 12 are defined between two adjacent pixel regions, a thin film transistor connected to the first gate line 10 is defined as a first thin film transistor 20, and a thin film transistor connected to the second gate line 12 is defined as a second thin film transistor 30.
It should be noted that the "first" and "second" are merely for convenience of description, and are not meant to be limiting.
The first gate electrode 21 of the first thin film transistor 20 and the first gate line 11 are integrally formed, and the second gate electrode 31 of the second thin film transistor 30 and the second gate line 12 are integrally formed. And the first gate electrode 21 is located at a side of the first gate line 11 facing away from the second gate line 12, and the second gate electrode 31 is located between the first gate line 11 and the second gate line 12. The first gate line 11 and the second gate electrode 31 have a bent structure 50 corresponding to the second gate electrode 31, which is in a zigzag engagement design, and compared with fig. 1 and fig. 3, the present embodiment is more beneficial to reducing the width of the dual gate structure and increasing the display aperture ratio compared with the previous embodiment.
In this embodiment, the following may be set: for two pixel electrodes 1 of a pixel region, a thin film transistor corresponding to one pixel electrode 1 is electrically connected with a gate line positioned at one side of the pixel region, and a thin film transistor corresponding to the other pixel electrode 1 is electrically connected with a gate line positioned at the opposite side of the pixel region.
Further, in order to shorten the length of the drain electrode and reduce the loss, the first thin film transistor 20 is electrically connected to the pixel electrode 1 located on the same side of the first gate line 11, and the second thin film transistor 30 is electrically connected to the pixel electrode 1 located on the opposite side of the second gate line 12. Although the first thin film transistor 20 and the corresponding pixel electrode 1 are located on the same side of the first gate line 11, since the first gate electrode 21 and the first gate line 11 are integrally formed, the portion of the drain electrode 4 opposite to the first gate electrode 21 is opposite to the portion corresponding to the drain electrode 4 opposite to the first gate line 11. The area of the first gate electrode 21 may be increased to increase the area of the overlap region 100, improving the welding success rate. The second thin film transistor 30 and the corresponding pixel electrode 1 are located at two sides of the second gate line 12, and the drain electrode 4 extends from one side of the second gate line 12 at least to above the second gate line 12, and is partially opposite to the second gate line 12, so as to form an overlapping region 100.
The above technical solution realizes that the drain electrode 4 is opposite to the gate line part in two ways, so as to form an overlapping region 100. It can be understood that the thin film transistor and the corresponding pixel electrode are located on the same side of the gate line, and the mode of realizing the opposite connection of the drain electrode and the gate line by the opposite connection of the drain electrode and the gate electrode is also suitable for the display substrate with a single gate structure, and only the area of the gate electrode is required to be increased so as to ensure that the overlapping area has enough area.
In the above two embodiments, the width of the second portion 41 of the drain electrode 4 may be greater than the width of the first portion 40, and the orthographic projection of the second portion 41 on the plane of the display substrate overlaps with the orthographic projection of the gate line 10 on the plane of the display substrate to form the overlapping region 100. By increasing the width of the second portion 41, the area of the formed overlap region 100 can be increased, further improving the welding success rate. The definition of the first portion 40 and the second portion 41 of the drain electrode 4 has been described above and will not be described in detail here.
It should be noted that, in the above description, the electrical connection between the thin film transistor and the gate line means: the gate electrode of the thin film transistor is electrically connected with the gate line, and the thin film transistor is electrically connected with the data line: the source electrode of the thin film transistor is electrically connected with the data line. The thin film transistor and the pixel electrode corresponding to the thin film transistor refer to the thin film transistor and the pixel electrode of the same display unit.
The embodiment of the invention also provides a display device which comprises the display substrate, so that the pixel electrode and the grid line are short-circuited in a welding mode, and the welding success rate is improved. Then, a voltage signal can be transmitted to the pixel electrode through the gate line, so as to repair the pixel defect of the display device, for example: and the hidden maintenance of the normally white mode display device is performed, so that the maintenance success rate is improved.
The embodiment of the invention also provides a maintenance method of the display device, which comprises the following steps:
cutting a drain electrode at a position close to an active layer of the thin film transistor, dividing the drain electrode into a first part and a second part which are insulated from each other, wherein the first part is close to the active layer of the thin film transistor, the second part is electrically connected with a pixel electrode, and the orthographic projection of the second part on a plane of the display substrate overlaps with the orthographic projection of the grid line on the plane of the display substrate to form the overlapping region;
welding is carried out in the overlapping area, and the second part of the drain electrode and the grid line are short-circuited;
the voltage signal is transmitted to the pixel electrode through the gate line.
The maintenance method can improve the welding success rate, so that the shorting success rate of the second part of the drain electrode and the grid line is improved, and the pixel electrode is electrically connected with the grid line through the second part. And then, voltage signals are transmitted to the pixel electrode through the grid line, so that the pixel defect of the display substrate is maintained, and the maintenance success rate is improved.
The technical scheme of the invention is particularly suitable for repairing a normally white mode display device (such as a TN type TFT-LCD), after cutting a drain electrode, shorting a pixel electrode and a grid line in a welding mode, and introducing a grid signal on the grid line to the pixel electrode to carry out dark spot repair.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and substitutions can be made by those skilled in the art without departing from the technical principles of the present invention, and these modifications and substitutions should also be considered as being within the scope of the present invention.
Claims (10)
1. A display substrate, comprising:
a plurality of gate lines and a plurality of data lines, the gate lines and the data lines being alternately distributed to define a plurality of pixel regions;
a plurality of display units, each display unit comprising:
a pixel electrode disposed in the pixel region;
a thin film transistor for transmitting voltage to the pixel electrode, wherein the gate electrode of the thin film transistor is electrically connected with the gate line, the source electrode is electrically connected with the data line, the drain electrode is electrically connected with the pixel electrode,
the orthographic projection of the drain electrode on the plane of the display substrate is overlapped with the orthographic projection part of the grid line on the plane of the display substrate to form an overlapped area;
wherein, the source electrode and the data line are integrally formed.
2. The display substrate according to claim 1, wherein the thin film transistor further comprises an active layer, the drain electrode comprises a first portion and a second portion, the front projection of the first portion on the plane of the display substrate at least partially overlaps with the front projection of the active layer on the plane of the display substrate, and the front projection of the second portion on the plane of the display substrate does not completely overlap with the front projection of the active layer on the plane of the display substrate;
the width of the second part is larger than that of the first part, and the orthographic projection of the second part on the plane of the display substrate overlaps with the orthographic projection of the grid line on the plane of the display substrate to form the overlapping area.
3. The display substrate according to claim 2, wherein the thin film transistor includes a gate electrode, the gate electrode being integrally formed with the gate line;
the pixel electrode and the thin film transistor of each display unit are positioned on two opposite sides of the grid line, and the drain electrode extends to at least the upper part of the grid line from one side of the grid line and is electrically connected with the corresponding pixel electrode.
4. A display substrate according to claim 3, wherein two gate lines are provided between two adjacent pixel regions;
each pixel region comprises two pixel electrodes which are arranged at a certain distance in the extending direction of the grid line, and the thin film transistors corresponding to two adjacent rows of pixel electrodes positioned at two sides of one data line are electrically connected with the data line and are electrically connected with different grid lines.
5. The display substrate according to claim 4, wherein the thin film transistor is located between two gate lines between two adjacent pixel regions, and orthographic projection portions of two adjacent thin film transistors among the thin film transistors located between the same two gate lines overlap on a first plane parallel to an extending direction of the data line and perpendicular to a plane in which the display substrate is located.
6. The display substrate according to claim 4, wherein for two pixel electrodes of a pixel region, one of the thin film transistors corresponding to one pixel electrode is electrically connected to one gate line located on one side of the pixel region, and the other of the thin film transistors corresponding to the other pixel electrode is electrically connected to one gate line located on the opposite side of the pixel region.
7. The display substrate according to claim 2, wherein a first gate line and a second gate line are provided between two adjacent pixel regions;
the thin film transistor comprises a first thin film transistor and a second thin film transistor, wherein a first gate electrode of the first thin film transistor and the first gate line are of an integrated structure, and a second gate electrode of the second thin film transistor and the second gate line are of an integrated structure;
the first gate electrode is positioned on one side of the first gate line, which is away from the second gate line, and the second gate electrode is positioned between the first gate line and the second gate line;
the first grid line and the second grid electrode are provided with bending structures matched with the second grid electrode in shape at the positions corresponding to the first grid line and the second grid electrode.
8. A display device comprising the display substrate according to any one of claims 1 to 7.
9. A method of manufacturing the display substrate of any one of claims 1-7, comprising:
forming a plurality of gate lines and a plurality of data lines, the gate lines and the data lines being alternately distributed to define a plurality of pixel regions;
forming a plurality of display units, the step of forming each display unit comprising:
forming a pixel electrode in the pixel region;
the method is characterized in that the orthographic projection of the drain electrode on the plane of the display substrate is overlapped with the orthographic projection part of the grid line on the plane of the display substrate to form an overlapped area.
10. A method of repairing a display device according to claim 8, comprising:
cutting a drain electrode at a position close to an active layer of the thin film transistor, dividing the drain electrode into a first part and a second part which are insulated from each other, wherein the first part is close to the active layer of the thin film transistor, the second part is electrically connected with a pixel electrode, and the orthographic projection of the second part on a plane of the display substrate overlaps with the orthographic projection of the grid line on the plane of the display substrate to form the overlapping region;
welding is carried out in the overlapping area, and the second part of the drain electrode and the grid line are short-circuited;
the voltage signal is transmitted to the pixel electrode through the gate line.
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| CN107065361B (en) * | 2017-06-09 | 2020-01-07 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN110649179B (en) * | 2019-09-29 | 2023-05-23 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof, display device and mask plate |
| CN113946074B (en) | 2020-07-17 | 2023-04-07 | 合肥京东方显示技术有限公司 | Display panel and display device |
| CN111856239B (en) * | 2020-07-29 | 2023-05-12 | 京东方科技集团股份有限公司 | Test method of cutting repair equipment and display panel |
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