CN106353930A - Display panel and electronic equipment - Google Patents
Display panel and electronic equipment Download PDFInfo
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- CN106353930A CN106353930A CN201610934109.1A CN201610934109A CN106353930A CN 106353930 A CN106353930 A CN 106353930A CN 201610934109 A CN201610934109 A CN 201610934109A CN 106353930 A CN106353930 A CN 106353930A
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- 230000004888 barrier function Effects 0.000 claims abstract description 80
- 239000000758 substrate Substances 0.000 claims abstract description 66
- 239000004020 conductor Substances 0.000 claims abstract description 42
- 230000000903 blocking effect Effects 0.000 claims abstract description 3
- 239000002184 metal Substances 0.000 claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 35
- 239000012528 membrane Substances 0.000 claims description 29
- 239000010409 thin film Substances 0.000 claims description 29
- 239000010408 film Substances 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000006748 scratching Methods 0.000 abstract description 2
- 230000002393 scratching effect Effects 0.000 abstract description 2
- 210000004027 cell Anatomy 0.000 description 87
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 208000035126 Facies Diseases 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a display panel and an electronic device, the display panel includes: the color film substrate and the array substrate are oppositely arranged; the array substrate comprises a first substrate and a plurality of pixel units arranged in an array manner, wherein the pixel units are arranged on one side of the first substrate facing the color film substrate; a plurality of supporting columns are arranged on one side, facing the array substrate, of the color film substrate; the supporting columns are positioned between two adjacent pixel units in the column direction of the array; in the column direction, for two pixel units on both sides of any one of the support columns: at least one end of the pixel unit facing the supporting column is provided with a blocking structure consisting of a conductor block and an insulating layer covering the conductor block. The barrier structure can prevent the support column from sliding on the pixel unit with the barrier structure, so that the problem of scratching of the alignment layer caused by the movement of the support column is avoided, and the image display quality is improved.
Description
Technical field
The present invention relates to display device technology field, in particular, it is related to a kind of display floater and electronic equipment.
Background technology
With scientific and technical development, the electronic equipment more and more with display function is widely used in people's
Daily life and work in the middle of, be daily life and work bring huge facility, become current people not
The important tool that can or lack.
The primary structure that display function realized by electronic equipment is display floater.Display panels are current more conventional
A kind of display floater.With reference to Fig. 1, Fig. 1 is a kind of structural representation of display panels in prior art, display panels
Including the color membrane substrates being oppositely arranged and array base palte.There is between color membrane substrates and array base palte liquid crystal layer.Color membrane substrates
Towards the surface of array base palte, there is support column 14, support column 14 is used for carrying out mechanical support, prevent liquid crystal layer to be squeezed change
Shape and lead to image display abnormal.
Gate line 12 and the data wire 11 of a plurality of parallel distribution are provided with array base palte.Gate line 12 and data wire 11
Insulation intersects the pixel region 15 limiting multiple array distribution, and each pixel region 15 is provided with a pixel cell 16.Grid
X extends polar curve 12 in the row direction.Data wire 11 extends along column direction y.Each pixel cell 16 pass through independent transistor 13 with
Corresponding gate line 12 and data wire 11 electrically connect.Array base palte is provided with both alignment layers towards a side surface of liquid crystal layer, joins
To layer, there is orientation groove, so that liquid crystal molecule has default initial deflection angle.General, support column 14 is located at column direction y
Between upper two adjacent pixel cells 16.
In existing display panels, display panels are squeezed or during Bending Deformation, support column 14 direction
One end of array base palte is susceptible to move, and when support column 14 moves in a column direction, easily scratches battle array in moving process
The both alignment layers of row substrate surface respective pixel unit, and then affect image displaying quality.
Content of the invention
In order to solve the above problems, the invention provides a kind of display floater and electronic equipment, solve due to supporting
Post is susceptible to the problem that movement leads to both alignment layers to scratch, and improves image displaying quality.
To achieve these goals, the following technical scheme of present invention offer:
A kind of display floater, described display floater includes: the color membrane substrates being oppositely arranged and array base palte；
Described array base palte includes first substrate and is arranged on described first substrate towards described color membrane substrates side
The pixel cell of multiple array arrangements；
Described color membrane substrates are provided with multiple support columns towards the side of described array base palte；Described support column is located in institute
State between adjacent two described pixel cells on the column direction of array；Described support column is along perpendicular to the side of described color membrane substrates
To extension；
In the column direction, for two described pixel cells of arbitrary described support column both sides: described at least one
Pixel cell has, towards one end of described support column, the stop being made up of conductor block with the insulating barrier being covered on conductor block
Structure.
Present invention also offers a kind of electronic equipment, described electronic equipment includes above-mentioned display floater.
In the display floater of technical solution of the present invention offer and electronic equipment, setting support column is located at adjacent on column direction
Two pixel cells between, and arrange in a column direction, for two pixel cells of arbitrary support column both sides: at least one
Pixel cell has, towards one end of support column, the barrier structure being made up of conductor block with the insulating barrier being covered on conductor block.
Barrier structure can be used for barrier support post and slide on the pixel cell have barrier structure, thus avoid being held due to support column
Easily be moved the problem leading to both alignment layers to scratch, and improves image displaying quality.
Brief description
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
Have technology description in required use accompanying drawing be briefly described it should be apparent that, drawings in the following description be only this
Inventive embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing providing obtains other accompanying drawings.
Fig. 1 is a kind of structural representation of display panels in prior art；
Fig. 2 is a kind of structural representation of display floater provided in an embodiment of the present invention；
Fig. 3 is a kind of top view of array base palte provided in an embodiment of the present invention；
Fig. 4 is a kind of partial enlarged drawing of array base palte provided in an embodiment of the present invention；
Fig. 5 is array base palte shown in Fig. 4 in the sectional drawing in qq ' direction；
Fig. 6 is array base palte shown in Fig. 4 in the sectional drawing in pp ' direction；
Fig. 7 is the partial enlarged drawing of another kind array base palte provided in an embodiment of the present invention；
Fig. 8 is the partial enlarged drawing of another array base palte provided in an embodiment of the present invention；
Fig. 9 is the structural representation of a kind of electronic equipment provided in an embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation description is it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of not making creative work
Embodiment, broadly falls into the scope of protection of the invention.
As described in background technology, in existing display panels, display panels are squeezed or bend
During deformation, support column 14 is susceptible to move towards one end of array base palte, when support column 14 moves in a column direction, is moving
Easily scratch the both alignment layers of array base palte surface respective pixel unit during dynamic, and then affect image displaying quality.
In order to solve the above problems, embodiments provide a kind of display floater, this display floater includes: relatively set
The color membrane substrates put and array base palte；
Described array base palte includes first substrate and is arranged on described first substrate towards described color membrane substrates side
The pixel cell of multiple array arrangements；
Described color membrane substrates are provided with multiple support columns towards the side of described array base palte；Described support column is located in institute
State between adjacent two described pixel cells on the column direction of array；Described support column is along perpendicular to the side of described color membrane substrates
To extension；
In the column direction, for two described pixel cells of arbitrary described support column both sides: described at least one
Pixel cell has, towards one end of described support column, the stop being made up of conductor block with the insulating barrier being covered on conductor block
Structure.
In display floater provided in an embodiment of the present invention, setting support column is located at adjacent two pixel lists on column direction
Between unit, and arrange in a column direction, for two pixel cells of arbitrary support column both sides: at least one pixel cell direction
One end of support column has the barrier structure being made up of conductor block with the insulating barrier being covered on conductor block.Barrier structure can be used
Slide on the pixel cell have barrier structure in barrier support post, thus avoid leading because support column is susceptible to movement
The problem causing both alignment layers to scratch, improves image displaying quality.
In order that technical scheme provided in an embodiment of the present invention is clearer, below in conjunction with the accompanying drawings such scheme is carried out in detail
Thin description.
Referring to figs. 2 and 3 Fig. 2 is a kind of structural representation of display floater provided in an embodiment of the present invention, and Fig. 3 is this
A kind of top view of array base palte that inventive embodiments provide.In display floater provided in an embodiment of the present invention, this display surface
Plate includes: the color membrane substrates 21 being oppositely arranged and array base palte 22.This display floater is display panels, in color membrane substrates
It is additionally provided with liquid crystal layer 23 between 21 and array base palte.
It should be noted that for the ease of illustrating relative position relation on array base palte for the support column 24, in figure 3
Show the plan structure of support column 24.Support column 24 can be column structure or prism structure or truncation vertebral body structure.
Described array base palte 22 includes first substrate 31 and is arranged on described first substrate 31 towards described color membrane substrates
The pixel cell 32 of multiple array arrangements of 21 sides.
Described color membrane substrates 21 are provided with multiple support columns 24 towards the side of described array base palte 22.Described support column 24
It is located between adjacent two described pixel cells 32 on the column direction y of described array.Described support column 24 is along perpendicular to institute
The direction stating color membrane substrates 21 extends.
Specifically, one end of support column 24 is fixed on color membrane substrates 21, and the other end is contacted with array base palte 22.In order to protect
Card liquid crystal molecule has default initial deflection angle, and array base palte has orientation towards 22 towards a side surface of liquid crystal layer 23
Layer, both alignment layers have orientation groove.Therefore, support column 24 needs to be produced on the surface of color membrane substrates 21.
On described column direction y, for two described pixel cells 32 of arbitrary described support column 24 both sides: at least one
Described pixel cell 32 has by conductor block and the insulating barrier structure being covered on conductor block towards one end of described support column 24
The barrier structure 33 becoming.It is mobile towards corresponding pixel cell 32, thus avoiding that barrier structure 33 is used for barrier support post 24
Support column 24 scratches both alignment layers.
It can be seen that, in display floater provided in an embodiment of the present invention, by being provided for barrier support post 24 towards blocking junction
Pixel cell 32 corresponding to structure 23 is mobile, thus avoiding support column 24 to scratch both alignment layers, improves image displaying quality.
As shown in figure 3, on described column direction y, for two described pixel cells of arbitrary described support column 24 both sides
32, two described pixel cells 32 are respectively provided with described barrier structure 33 towards one end of described support column 24, thus both can be
On column direction y limit support column 24 movement it is also possible to column direction y in the reverse direction limit support column 24 movement, to
On dagger 24 column direction y, two pixel cells of both sides are respectively formed protection.
Described array base palte 22 also includes: is arranged on first substrate 31 towards a plurality of parallel distribution of color membrane substrates 21 side
Gate line 35 and a plurality of parallel distribution data wire 34.Gate line 35 extends along the line direction x of described array.Data wire 34
Extend along column direction y.Gate line 35 intersects, with data wire 34 insulation, the pixel region 37 limiting multiple array arrangements.Each pixel region
One pixel cell 32 of setting in 37.
There is between pixel cell 32 described in adjacent rows the gate line 35 extending along described line direction y；Perpendicular to institute
State on the direction of first substrate 31, two described pixel cells 32 of described support column 24 and its both sides on described column direction y
Between described gate line 35 at least partly overlap.
Support column 24 is arranged between adjacent two pixel cells 32 on column direction y, and is placed perpendicular to described
On the direction of first substrate 31, two described pixel cells 32 of described support column 24 and its both sides on described column direction y it
Between described gate line 35 at least partly overlap, the impact to aperture opening ratio for the support column 24 can be avoided it is ensured that display floater bright
Degree.
It should be noted that in the embodiment of the present invention, support column 23 is not limited to the viewing area positioned at array base palte 22,
Rim area can be arranged on.For the support column positioned at rim area, due to there are not the both alignment layers scratching pixel cell surface
Without setting barrier structure, problem, can stop that it is mobile it is also possible to setting barrier structure stops its movement, steady to ensure machinery
Qualitative.
As shown in figure 3, described pixel cell 32 includes pixel electrode 30, described pixel electrode 30 is corresponding to connect a thin film crystalline substance
Body pipe 36；Described thin film transistor (TFT) 36 includes grid, active area, drain electrode and source electrode, described pixel electrode 30 and described thin film
The source electrode electrical connection of transistor 36.
The pixel cell 32 of same row is passed through the corresponding thin film transistor (TFT) 36 connecting and is electrically connected with same data line 34, no
The pixel cell 32 of same column is passed through the corresponding thin film transistor (TFT) 36 connecting and is electrically connected from different data wires 34.Pixel with a line
Unit 32 is passed through the corresponding thin film transistor (TFT) 36 connecting and is electrically connected with same gate line 35, and the pixel cell 32 of different rows passes through
The corresponding thin film transistor (TFT) 36 connecting is electrically connected from different gate lines 35.
For two described pixel cells 32 in described column direction y both sides for arbitrary described support column 24, define wherein one
Individual described pixel cell 32 is the first pixel cell p1, and another described pixel cell 32 is the second pixel cell p2, described the
Described gate line 35 between one pixel cell p1 and described second pixel cell p2 is first grid polar curve g1.Described first pixel
The corresponding thin film transistor (TFT) 36 connecting of unit p1 is located at described first pixel cell p1 one end towards described first grid polar curve g1.
First pixel cell p1 has pixel electrode 301, and the second pixel cell p2 has pixel electrode 302.Described second pixel cell
The corresponding thin film transistor (TFT) 36 connecting of p2 deviates from one end of described first grid polar curve g1 positioned at described second pixel cell p2.
With reference to Fig. 4-Fig. 6, Fig. 4 is a kind of partial enlarged drawing of array base palte provided in an embodiment of the present invention, and Fig. 5 is Fig. 4
In the sectional drawing in qq ' direction, Fig. 6 is array base palte shown in Fig. 4 in the sectional drawing in pp ' direction to shown array base palte.For the ease of
Illustrate relative position relation on array base palte for the support column 24, Fig. 4 and Fig. 6 shows the vertical view knot of support column 24
Structure.The corresponding thin film transistor (TFT) 36 connecting of first pixel cell p1 has grid g, source electrode s, drain electrode d and active area a.Pixel
Electrode 301 passes through the drain electrode d electrical connection of the thin film transistor (TFT) 36 of via 41 connection corresponding with the first pixel cell p1.Source electrode s with
Data wire 34 electrically connects.First grid polar curve g1 is electrically connected with grid g.
The drain electrode d of the corresponding thin film transistor (TFT) 36 connecting of the first pixel cell p1 includes at least two parallel arrangements, one end
The strip electrode d1 of electrical connection, described strip electrode d1 extends along described line direction x, between two neighboring described strip electrode d1
There is gap k.Described strip electrode d1 is the described conductor block of the barrier structure z1 of described first pixel cell p1, and described bar
Shape electrode d1 makes the structure that described barrier structure z1 is surface irregularity.
Second pixel cell p2 is provided with barrier structure z2 in the one end near first grid polar curve g1.Barrier structure z2 is court
To the bulge-structure of the second pixel cell p2, it is used for avoiding support column 24 to move towards the second pixel cell p2, it is to avoid scratch the
The corresponding both alignment layers of two pixel cell p2, both alignment layers not shown in Fig. 4-Fig. 6.
It should be noted that the number of the strip electrode d1 and gap k width on column direction y can be according to display surface
The specifications parameter of plate sets, and here no longer limits.Pixel electrode phase with each pixel cell is provided with first substrate 31
To common electrode layer 42, common electrode layer 42 position relative with each pixel electrode is provided with cracks 43.Common electrode layer
42 receive drive signal with pixel electrode, realize image by the deflection of electric field driven liquid crystal molecule therebetween and show.
As shown in figure 5, grid g is located at first substrate 31 surface, gate line is made by same conductor layer with grid g, is located at
The same side.Gate surface is coated with the first insulating barrier 51.The first insulating barrier 51 surface position relative with grid g is provided with active
Area a.Active area a surface is provided with source electrode s and drain electrode d.Source electrode s is all at least partly electrically connected with active area a with drain electrode d.Source
Pole s, drain electrode d and active area a surface are coated with the second insulating barrier 52.Second surface of insulating layer is formed with the first pixel electrode
301.The pixel electrode of all pixels unit is prepared by same layer conductive layer, such as can be prepared by one layer of ito.First pixel electrode
301 pass through via 41 and corresponding drain electrode electrical connection.The surface of pixel electrode is coated with the 3rd insulating barrier 53.3rd insulating barrier 53
Surface is formed with public electrode 42.
As shown in fig. 6, first grid polar curve g1 is arranged on first substrate 31 surface, with the grid of thin film transistor (TFT) by same layer
Prepared by conductive layer.First grid polar curve g1 surface covers the first insulating barrier 51, and the first insulating barrier 51 surface is provided with as the second picture
The drain electrode layer metal derby 61 of the conductor block of barrier structure z2 of plain unit, and it is provided with the corresponding thin film connecting of the first pixel cell
The strip electrode d1 of the drain electrode of transistor.Drain electrode layer metal derby 61 is located at the second pixel cell one end towards support column 24.Bar
Shape electrode d1 and drain electrode layer metal derby 61 surface are coated with the second insulating barrier 52.Second insulating barrier 52 is provided with the first pixel electricity
Pole 301 and the second pixel electrode 302.First pixel electrode 301 and the second pixel electrode 302 surface are provided with the 3rd insulation
Layer 52, the 3rd insulating barrier 53 surface is formed with public electrode 42.Public electrode 42 is provided with and cracks 43.In figure 6, the first pixel
The barrier structure z1 of unit includes the surface relief structure of the insulating barrier composition of strip electrode d1 and its top.Second pixel cell
Barrier structure z2 drain electrode layer metal derby 61 and its top insulating barrier constitute bulge-structure.By barrier structure z1 and resistance
Gear structure z2 can avoid support column 24 to move in a column direction, it is to avoid the both alignment layers on pixel cell surface are caused to scratch.
By Fig. 4-Fig. 6 it can be deduced that can be used as the structure not office of the conductor block of the barrier structure z2 of the second pixel cell
It is limited to drain electrode layer metal derby 61, in other embodiments, described second pixel cell is towards one end of described first grid polar curve
There is one of second grid layer metal derby, drain electrode layer metal derby, active region layer conductor block or multiple as described second
The conductor block of the barrier structure of pixel cell is so that the barrier structure of described second pixel cell is towards described color membrane substrates
Bulge-structure.Described second grid layer metal derby and described grid form with layer and separate are not connected to.Described drain electrode layer gold
Belong to block and separate to be not connected to layer formation with described drain electrode.Described active region layer conductor block and described active area are formed with layer
And separate be not connected to.On the direction perpendicular to described first substrate, described support column and described second pixel cell
Barrier structure does not overlap.
It should be noted that in the embodiment of the present invention, common electrode layer can be arranged on array base palte it is also possible to be arranged on
On color membrane substrates.According to the type of drive of liquid crystal molecule, the position of public electrode is set.When pixel electrode is same with common electrode layer
When being located on array base palte, the relative position of public electrode and pixel electrode is not limited to embodiment party shown in Fig. 5 and Fig. 6
Formula, can also arrange the two and be located at same conductive layer, or setting pixel electrode is located at public electrode towards color membrane substrates
Side.In the embodiment of the present invention, display floater can be used for the display panels of tn pattern or the LCD of ips pattern
Plate or the display panels of sft pattern.
The drain electrode arranging the corresponding thin film transistor (TFT) connecting of the first pixel cell has multiple strip electrodes, by bar shaped electricity
During the described conductor block of the barrier structure as described first pixel cell for the pole, described first substrate can be placed perpendicular to
On direction, described support column is not overlapped with the described barrier structure of described first pixel cell, or partly overlaps.
With reference to Fig. 7, Fig. 7 is the partial enlarged drawing of another kind array base palte provided in an embodiment of the present invention, described first base
Between the drain electrode d of thin film transistor (TFT) of plate connection corresponding with described first pixel cell, there is first grid layer metal derby 71；Institute
State first grid layer metal derby 71 and described thin film transistor (TFT) grid g formed with layer and separate be not connected to, described first
Grid layer metal derby 71 overlaps formation storage capacitance with the drain electrode d of the foamed film transistor of described first pixel cell.Drain electrode d
Electrically connected with the pixel electrode 301 of the first pixel cell by via 41.
The leakage of the foamed film transistor of described first grid layer metal derby 71 connection corresponding with described first pixel cell
Pole d is the described conductor block of described barrier structure z1, and makes the barrier structure z1 of described first pixel cell be towards described
The bulge-structure of color membrane substrates.On the direction perpendicular to described first substrate, described support column 24 and described barrier structure z1
Do not overlap.
It should be noted that not shown in Fig. 7 the second facies unit barrier structure, the barrier structure of the second pixel cell can
Referring to above-mentioned embodiment, will not be described here.
With reference to Fig. 8, Fig. 8 is the partial enlarged drawing of another array base palte provided in an embodiment of the present invention, in Fig. 8, described
Between the drain electrode d of thin film transistor (TFT) of first substrate connection corresponding with described first pixel cell p1, there is second grid layer metal
Block g2 and active region layer metal a1 block, second grid layer metal derby g2 and active region layer metal a1 block are collectively as the first picture
The conductor block of the barrier structure z1 of plain unit p1 is so that the barrier structure z1 of described first pixel cell p1 is towards described coloured silk film
The bulge-structure of substrate.In Fig. 8 embodiment, the first pixel cell p1 corresponds to the thin film transistor (TFT) connecting and the first pixel cell
Data wire 34 on the left of p1 electrically connects.In other embodiments, can arrange the barrier structure z1's of the first pixel cell p1
Conductor block includes any one of second grid layer metal derby g2 and active region layer metal a1 block.Described second grid layer metal
The grid g of block g2 and described thin film transistor (TFT) formed with layer and separate be not connected to, described active region layer conductor block a1 and institute
State the active area a of thin film transistor (TFT) to be formed with layer and separate be not connected to.
The conductor block of the barrier structure z2 of the second pixel cell p2 includes: grid layer metal derby g2, active region layer conductor block
A2 and drain electrode layer metal derby 61.In other embodiments, the metal derby of barrier structure z2 can include the 3rd grid layer gold
Belong to one of block g3, active region layer conductor block a2 and drain electrode layer metal derby 61 or multiple.3rd grid layer metal derby g3
Formed with layer with the grid g of described thin film transistor (TFT) and separate be not connected to, described drain electrode layer metal derby 61 and described drain electrode d
Formed with layer and separate be not connected to, described active region layer conductor block a2 and described active area a are with layer formation and separate
It is not connected to；
In the embodiment shown in fig. 8, on the direction perpendicular to described first substrate, described support column 24 and described the
The barrier structure z1 of one pixel cell p1 does not overlap；And the barrier structure z2 of described support column 24 and described second pixel cell p2
Do not overlap.
By foregoing description, in display floater provided in an embodiment of the present invention, in pixel cell near support column
One end arranges barrier structure, can be slided in respective pixel unit with barrier support post by barrier structure, it is to avoid scratch pixel
The both alignment layers of cell surface, thus ensure that display quality.Meanwhile, for forming the conductor block multiplexed arrays substrate of barrier structure
Middle conductor layer is formed, and directly can form this conductor block, need not increase film layer and make work in the corresponding conductor layer of patterning
Skill step, process is simple, low cost.
Based on above-mentioned display floater embodiment, another embodiment of the present invention additionally provides a kind of electronic equipment, and this electronics sets
For as shown in figure 9, Fig. 9 is the structural representation of a kind of electronic equipment provided in an embodiment of the present invention, this electronic equipment includes showing
Show panel 91, this display floater 91 is the display floater in above-described embodiment.
This electronic equipment can have the electronic equipment of touch display function for mobile phone, panel computer and television set etc..
This electronic equipment adopts above-mentioned display floater, crosses barrier structure and can be slided in respective pixel unit with barrier support post, it is to avoid
Scratch the both alignment layers on pixel cell surface, thus ensure that display quality.Meanwhile, processing technology is simple, low cost.
In this specification, each embodiment is described by the way of going forward one by one, and what each embodiment stressed is and other
The difference of embodiment, between each embodiment identical similar portion mutually referring to.For electronics disclosed in embodiment
For apparatus embodiments, because it is corresponding with display floater disclosed in embodiment, so description is fairly simple, in place of correlation
Referring to method part illustration.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses the present invention.
Multiple modifications to these embodiments will be apparent from for those skilled in the art, as defined herein
General Principle can be realized without departing from the spirit or scope of the present invention in other embodiments.Therefore, the present invention
It is not intended to be limited to the embodiments shown herein, and be to fit to and principles disclosed herein and features of novelty phase one
The scope the widest causing.
Claims (10)
1. a kind of display floater is it is characterised in that include: the color membrane substrates being oppositely arranged and array base palte；
Described array base palte includes first substrate and to be arranged on described first substrate multiple towards described color membrane substrates side
The pixel cell of array arrangement；
Described color membrane substrates are provided with multiple support columns towards the side of described array base palte；Described support column is located in described battle array
On the column direction of row between two adjacent described pixel cells；
In the column direction, for two described pixel cells of arbitrary described support column both sides: at least one described pixel
Unit has, towards one end of described support column, the barrier structure being made up of conductor block with the insulating barrier being covered on conductor block.
2. display floater according to claim 1 it is characterised in that in the column direction, for arbitrary described support
Two described pixel cells of post both sides, two described pixel cells are respectively provided with described blocking junction towards one end of described support column
Structure.
3. display floater according to claim 2 is it is characterised in that have between pixel cell along institute described in adjacent rows
State the gate line that the line direction of array extends；
On the direction perpendicular to described first substrate, two described pictures of described support column and its both sides in the column direction
Described gate line between plain unit at least partly overlaps.
4. display floater according to claim 3 is it is characterised in that described pixel cell includes pixel electrode, described picture
Plain electrode pair should connect a thin film transistor (TFT)；Described thin film transistor (TFT) includes grid, active area, drain electrode and source electrode, described picture
Plain electrode is electrically connected with described source electrode；
For two described pixel cells in described column direction both sides for arbitrary described support column, the one of described pixel of definition
Unit is the first pixel cell, and another described pixel cell is the second pixel cell, described first pixel cell and described the
Described gate line between two pixel cells is first grid polar curve；
The corresponding thin film transistor (TFT) connecting of described first pixel cell is located at described first pixel cell towards described first grid
One end of line.
5. display floater according to claim 4 is it is characterised in that the corresponding thin film connecting of described first pixel cell is brilliant
The drain electrode of body pipe includes at least two parallel arrangements, the strip electrode of one end electrical connection, and described strip electrode is along described line direction
Extend, between two neighboring described strip electrode, there is gap；
Described strip electrode is the described conductor block of the barrier structure of described first pixel cell, and described strip electrode makes institute
State the structure that barrier structure is surface irregularity.
6. display floater according to claim 5 is it is characterised in that on the direction perpendicular to described first substrate, institute
The described barrier structure stating support column with described first pixel cell does not overlap, or partly overlaps.
7. display floater according to claim 4 is it is characterised in that described first substrate and described first pixel cell pair
There is between the drain electrode of the thin film transistor (TFT) that should connect first grid layer metal derby；Described first grid layer metal derby is thin with described
The grid of film transistor formed with layer and separate be not connected to, described first grid layer metal derby and described first pixel cell
Foamed film transistor drain electrode overlap formed storage capacitance；
The drain electrode of the foamed film transistor of described first grid layer metal derby connection corresponding with described first pixel cell is institute
State conductor block described in barrier structure, and make the barrier structure of described first pixel cell be projection towards described color membrane substrates
Structure；
On the direction perpendicular to described first substrate, described support column is not overlapped with described barrier structure.
8. display floater according to claim 4 it is characterised in that
Between the drain electrode of thin film transistor (TFT) of described first substrate connection corresponding with described first pixel cell, there is second grid
Layer metal derby, one of active region layer conductor block or multiple conductor block as described barrier structure are so that described first
The barrier structure of pixel cell is the bulge-structure towards described color membrane substrates；Described second grid layer metal derby and described grid
Formed with layer and separate be not connected to, described active region layer conductor block and described active area with layer formation and separate do not connect
Connect；
On the direction perpendicular to described first substrate, the barrier structure of described support column and described first pixel cell is not handed over
Folded.
9. display floater according to claim 4 is it is characterised in that the corresponding thin film connecting of described second pixel cell is brilliant
Body pipe deviates from one end of described first grid polar curve positioned at described second pixel cell；
Described second pixel cell has the 3rd grid layer metal derby, drain electrode layer metal towards one end of described first grid polar curve
The conductor block of one of block, active region layer conductor block or multiple barrier structure as described second pixel cell so that
The barrier structure of described second pixel cell is the bulge-structure towards described color membrane substrates；
Described 3rd grid layer metal derby and described grid formed with layer and separate be not connected to, described drain electrode layer metal derby with
Described drain electrode formed with layer and separate be not connected to, described active region layer conductor block and described active area are formed with layer and mutually
Independently it is not connected to；
On the direction perpendicular to described first substrate, the barrier structure of described support column and described second pixel cell is not handed over
Folded.
10. a kind of electronic equipment is it is characterised in that include: the display floater as described in any one of claim 1-10.
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